From 9791c31c1b5a1f4834d83a1899d6bb200add29f2 Mon Sep 17 00:00:00 2001 From: Gavin Liu Date: Thu, 19 Sep 2019 08:45:26 +0800 Subject: [PATCH] imxrt:uart: Add PINs init for each uart port Add PINs init function based on the selected UART port. In general, user should configure all necessary PINs based on the specific imxrt board in: bsp/imxrt/xxxx/board/MCUX_Config/pin_mux.c There is a convenient GUI tool named MCUXpresso Config Tools, it's free and can be obtained from NXP offical website. Open the file: bsp/imxrt/imxrt1052-nxp-evk/board/MCUX_Config/MCUX_Config.mex with MCUXpresso Config Tools, set the necessary PINs (or clocks) and generate the new code of pin_mux.c (or clock_config.c), the project can get right configurations based on specific imxrt board. But, there is no relation between RT-Thread Kconfig and MCUXpresso Config Tools. User selects one driver in RT-Thread menuconfig, then the ping_mux.c should be udpated by MCUXpresso Config Tools to set the right PIN configurations for the selected driver. It's clear but a little complex. We add the PIN init functions for some drivers in the board.c file, 1. It's convenient to usr a driver in RT-Thread. Just select the driver, then the code will include all necessary parts, and the driver can work well. 2. User can also configure the PINs with MCUXpresso Config Tools. 3. The drivers in bsp/imxrt/libraries/drivers are common for all imxrt boards. They may have different PIN configurations based on different hardware design. So we put the PIN init functions in each board.c file following each different imxrt board. Signed-off-by: Gavin Liu --- bsp/imxrt/imxrt1052-nxp-evk/board/board.c | 147 ++++++++++++++++++++++ 1 file changed, 147 insertions(+) diff --git a/bsp/imxrt/imxrt1052-nxp-evk/board/board.c b/bsp/imxrt/imxrt1052-nxp-evk/board/board.c index 2027d9b561..25ab97b01b 100644 --- a/bsp/imxrt/imxrt1052-nxp-evk/board/board.c +++ b/bsp/imxrt/imxrt1052-nxp-evk/board/board.c @@ -12,6 +12,7 @@ #include #include "board.h" #include "pin_mux.h" +#include "fsl_iomuxc.h" #ifdef BSP_USING_DMA #include "fsl_dmamux.h" @@ -109,6 +110,148 @@ void imxrt_dma_init(void) EDMA_Init(DMA0, &config); } #endif + +#ifdef BSP_USING_LPUART +void imxrt_uart_pins_init(void) +{ +#ifdef BSP_USING_LPUART1 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */ + 0x10B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Keeper + Pull Up / Down Config. Field: 100K Ohm Pull Down + Hyst. Enable Field: Hysteresis Disabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */ + 0x10B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Keeper + Pull Up / Down Config. Field: 100K Ohm Pull Down + Hyst. Enable Field: Hysteresis Disabled */ +#endif +#ifdef BSP_USING_LPUART2 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B1_02_LPUART2_TX, + 0U); + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B1_03_LPUART2_RX, + 0U); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B1_02_LPUART2_TX, + 0x10B0u); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B1_03_LPUART2_RX, + 0x10B0u); + +#endif +#ifdef BSP_USING_LPUART3 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B1_06_LPUART3_TX, + 0U); + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B1_07_LPUART3_RX, + 0U); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B1_06_LPUART3_TX, + 0x10B0u); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B1_07_LPUART3_RX, + 0x10B0u); +#endif +#ifdef BSP_USING_LPUART4 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_00_LPUART4_TX, + 0U); + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_01_LPUART4_RX, + 0U); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_00_LPUART4_TX, + 0x10B0u); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_01_LPUART4_RX, + 0x10B0u); +#endif +#ifdef BSP_USING_LPUART5 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_12_LPUART5_TX, + 0U); + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_13_LPUART5_RX, + 0U); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_12_LPUART5_TX, + 0x10B0u); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_13_LPUART5_RX, + 0x10B0u); +#endif +#ifdef BSP_USING_LPUART6 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B0_02_LPUART6_TX, + 0U); + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B0_03_LPUART6_RX, + 0U); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B0_02_LPUART6_TX, + 0x10B0u); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B0_03_LPUART6_RX, + 0x10B0u); +#endif +#ifdef BSP_USING_LPUART7 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_EMC_31_LPUART7_TX, + 0U); + IOMUXC_SetPinMux( + IOMUXC_GPIO_EMC_32_LPUART7_RX, + 0U); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_EMC_31_LPUART7_TX, + 0x10B0u); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_EMC_32_LPUART7_RX, + 0x10B0u); +#endif +#ifdef BSP_USING_LPUART8 + + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B1_10_LPUART8_TX, + 0U); + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B1_11_LPUART8_RX, + 0U); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B1_10_LPUART8_TX, + 0x10B0u); + IOMUXC_SetPinConfig( + IOMUXC_GPIO_AD_B1_11_LPUART8_RX, + 0x10B0u); +#endif +} +#endif /* BSP_USING_LPUART */ + /** * This function will initial rt1050 board. */ @@ -121,6 +264,10 @@ void rt_hw_board_init() NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); +#ifdef BSP_USING_LPUART + imxrt_uart_pins_init(); +#endif + #ifdef BSP_USING_DMA imxrt_dma_init(); #endif -- GitLab