diff --git a/courses/free-courses-en.md b/courses/free-courses-en.md index 27a6b8fb840a430b6085f96ca4772bb2abf894c7..c87e8aa849aeb924a6182bd516e512e8f9341fb7 100644 --- a/courses/free-courses-en.md +++ b/courses/free-courses-en.md @@ -895,6 +895,7 @@ ### Verilog / VHDL / SystemVerilog +* [nand2tetris](https://www.nand2tetris.org) - Shimon Schocken, Noam Nisan (Coursera) * [SOC Verification Using SystemVerilog](http://verificationexcellence.in/online-courses/soc-verification-using-systemverilog) * [SystemVerilog - Learn basics of SystemVerilog for Hardware Verification](https://verificationexcellence.teachable.com/p/learn-systemverilog) * [SystemVerilog based UVM Methodology - Learn to build UVM based Testbenches in SystemVerilog](https://verificationexcellence.teachable.com/p/learn-ovm-uvm)