From bebefe39320755a2dd6395e6c830e533e96e96c8 Mon Sep 17 00:00:00 2001 From: m0_56903617 Date: Fri, 28 May 2021 06:23:32 +0800 Subject: [PATCH] 202105280623 --- CMakeLists.txt | 1 - parser/CMakeLists.txt | 2 +- parser/verilog_keyword.c | 38 +++++++- parser/verilog_keyword.h | 183 +++++++++++++++++++++++++++++++++++++++ parser/verilog_parser.y | 3 +- 5 files changed, 223 insertions(+), 4 deletions(-) create mode 100644 parser/verilog_keyword.h diff --git a/CMakeLists.txt b/CMakeLists.txt index 8755dff..9cd5969 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -7,7 +7,6 @@ project ("hdl4se") # 包含子项目。 add_subdirectory ("preprocess") -add_subdirectory ("parser") add_subdirectory ("testpreprocess") add_subdirectory ("hdl4secell") add_subdirectory ("hdl4sesim") diff --git a/parser/CMakeLists.txt b/parser/CMakeLists.txt index b07962d..6547d3f 100644 --- a/parser/CMakeLists.txt +++ b/parser/CMakeLists.txt @@ -15,7 +15,7 @@ add_library (verilog_parser STATIC "verilog_root.c" "verilog_root.h" "verilog_scanner.c" - ) + "verilog_keyword.h") include_directories("../../lcom/include") include_directories("../hdl4secell/include") diff --git a/parser/verilog_keyword.c b/parser/verilog_keyword.c index 5cb3c2a..04eacfd 100644 --- a/parser/verilog_keyword.c +++ b/parser/verilog_keyword.c @@ -1,5 +1,41 @@ +/* +** HDL4SE: VerilogۺϷƽ̨ +** Copyright (C) 2021-2021, raoxianhong +** LCOM: ģ +** Copyright (C) 2021-2021, raoxianhong +** All rights reserved. +** +** Redistribution and use in source and binary forms, with or without +** modification, are permitted provided that the following conditions are met: +** +** * Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** * Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** * The name of the author may be used to endorse or promote products +** derived from this software without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +** THE POSSIBILITY OF SUCH DAMAGE. +*/ -#include "verilog_parser.tab.h" +/* +* verilog_keyword.c + ޸ļ¼ + 202105280619: rxh, initial version +*/ + +#include "verilog_keyword.h" #include "string.h" #define DEFKEYWORD(id, n) {KW_##id, n} diff --git a/parser/verilog_keyword.h b/parser/verilog_keyword.h new file mode 100644 index 0000000..3ee9468 --- /dev/null +++ b/parser/verilog_keyword.h @@ -0,0 +1,183 @@ +/* +** HDL4SE: VerilogۺϷƽ̨ +** Copyright (C) 2021-2021, raoxianhong +** LCOM: ģ +** Copyright (C) 2021-2021, raoxianhong +** All rights reserved. +** +** Redistribution and use in source and binary forms, with or without +** modification, are permitted provided that the following conditions are met: +** +** * Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** * Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** * The name of the author may be used to endorse or promote products +** derived from this software without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +** THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/* +* verilog_keyword.h + ޸ļ¼ + 202105280612: rxh, initial version +*/ +#ifndef __VERILOG_KEYWORD_H +#define __VERILOG_KEYWORD_H + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef _ASMLANGUAGE + + typedef enum verilog_keyword + { + KW_ALWAYS, + KW_AND, + KW_ASSIGN, + KW_AUTOMATIC, + KW_BEGIN, + KW_BUF, + KW_BUFIF0, + KW_BUFIF1, + KW_CASE, + KW_CASEX, + KW_CASEZ, + KW_CELL, + KW_CMOS, + KW_CONFIG, + KW_DEASSIGN, + KW_DEFAULT, + KW_DEFPARAM, + KW_DESIGN, + KW_DISABLE, + KW_EDGE, + KW_ELSE, + KW_END, + KW_ENDCASE, + KW_ENDCONFIG, + KW_ENDFUNCTION, + KW_ENDGENERATE, + KW_ENDMODULE, + KW_ENDPRIMITIVE, + KW_ENDSPECIFY, + KW_ENDTABLE, + KW_ENDTASK, + KW_EVENT, + KW_FOR, + KW_FORCE, + KW_FOREVER, + KW_FORK, + KW_FUNCTION, + KW_GENERATE, + KW_GENVAR, + KW_HIGHZ0, + KW_HIGHZ1, + KW_IF, + KW_IFNONE, + KW_INCDIR, + KW_INCLUDE, + KW_INITIAL, + KW_INOUT, + KW_INPUT, + KW_INSTANCE, + KW_INTEGER, + KW_JOIN, + KW_LARGE, + KW_LIBLIST, + KW_LIBRARY, + KW_LOCALPARAM, + KW_MACROMODULE, + KW_MEDIUM, + KW_MODULE, + KW_NAN, + KW_NEGEDGE, + KW_NMOS, + KW_NOR, + KW_NOSHOWCANCELLED, + KW_NOT, + KW_NOTIF0, + KW_NOTIF1, + KW_OR, + KW_OUTPUT, + KW_PARAMETER, + KW_PATHPULSE, + KW_PMOS, + KW_POSEDGE, + KW_PRIMITIVE, + KW_PULL0, + KW_PULL1, + KW_PULLDOWN, + KW_PULLUP, + KW_PULSESTYLE_ONEVENT, + KW_PULSESTYLE_ONDETECT, + KW_RCMOS, + KW_REAL, + KW_REALTIME, + KW_REG, + KW_RELEASE, + KW_REPEAT, + KW_RNMOS, + KW_RPMOS, + KW_RTRAN, + KW_RTRANIF0, + KW_RTRANIF1, + KW_SCALARED, + KW_SHOWCANCELLED, + KW_SIGNED, + KW_SMALL, + KW_SPECIFY, + KW_SPECPARAM, + KW_STRONG0, + KW_STRONG1, + KW_SUPPLY0, + KW_SUPPLY1, + KW_TABLE, + KW_TASK, + KW_TIME, + KW_TRAN, + KW_TRANIF0, + KW_TRANIF1, + KW_TRI, + KW_TRI0, + KW_TRI1, + KW_TRIAND, + KW_TRIOR, + KW_TRIREG, + KW_UNSIGNED, + KW_USE, + KW_VECTORED, + KW_WAIT, + KW_WAND, + KW_WEAK0, + KW_WEAK1, + KW_WHILE, + KW_WIRE, + KW_WOR, + KW_XNOR, + KW_XOR, + KW_NAND, + }verilog_keyword_t; + +#endif + +int verilog_find_keyword_word(const char* ident); + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/parser/verilog_parser.y b/parser/verilog_parser.y index 55d820a..9300e68 100644 --- a/parser/verilog_parser.y +++ b/parser/verilog_parser.y @@ -36,6 +36,7 @@ HOBJECT treenode; char * string; int token; + int keyword; int operator; IDListVar list; } @@ -79,7 +80,7 @@ %token MACRO_TEXT MACRO_IDENTIFIER -%token KW_ALWAYS KW_AND KW_ASSIGN KW_AUTOMATIC KW_BEGIN KW_BUF KW_BUFIF0 KW_BUFIF1 KW_CASE KW_CASEX +%token KW_ALWAYS KW_AND KW_ASSIGN KW_AUTOMATIC KW_BEGIN KW_BUF KW_BUFIF0 KW_BUFIF1 KW_CASE KW_CASEX KW_CASEZ KW_CELL KW_CMOS KW_CONFIG KW_DEASSIGN KW_DEFAULT KW_DEFPARAM KW_DESIGN KW_DISABLE KW_EDGE KW_ELSE KW_END KW_ENDCASE KW_ENDCONFIG KW_ENDFUNCTION KW_ENDGENERATE KW_ENDMODULE KW_ENDPRIMITIVE KW_ENDSPECIFY KW_ENDTABLE KW_ENDTASK KW_EVENT KW_FOR KW_FORCE KW_FOREVER KW_FORK -- GitLab