From 1a8b9097293fe0a305f57bf5a9a358d32b0a1141 Mon Sep 17 00:00:00 2001 From: m0_56903617 Date: Wed, 7 Jul 2021 17:26:14 +0800 Subject: [PATCH] 202107071726 --- examples/hdl4secnn/cnn/cnncell/cnncell_buf.c | 99 +++++++++++++++---- .../hdl4secnn/cnn/cnncell/cnncell_coeffbuf.c | 47 +++++++++ examples/hdl4secnn/googlenet/verilog/main.c | 24 ++++- hdl4secell/include/hdl4secell.h | 9 ++ 4 files changed, 159 insertions(+), 20 deletions(-) diff --git a/examples/hdl4secnn/cnn/cnncell/cnncell_buf.c b/examples/hdl4secnn/cnn/cnncell/cnncell_buf.c index e76715f..c16aeef 100644 --- a/examples/hdl4secnn/cnn/cnncell/cnncell_buf.c +++ b/examples/hdl4secnn/cnn/cnncell/cnncell_buf.c @@ -65,19 +65,22 @@ module hdl4se_cnn_buf 6 output [31:0]bDataReadData, 7 input wDataReadComplete, -26 output wDataWriteEnable, -27 input wDataWrite, -28 input [31:0] bDataWriteAddr, -29 input [31:0] bDataWriteData, -30 input wDataWriteComplete +8 output wDataWriteEnable, +9 input wDataWrite, +10 input [31:0] bDataWriteAddr, +11 input [31:0] bDataWriteData, +12 input wDataWriteComplete ); endmodule */ /* wClk不算 */ -#define INPUTPORTCOUNT 8 -#define PARAMCOUNT 2 -#define READPORT 1 +#define READPORT 1 + +#define PARAMCOUNT 2 +#define SGLPERREADPORT 6 +#define INPUTPERREADPORT 3 +#define INPUTPORTCOUNT (READPORT * INPUTPERREADPORT + 5) typedef struct _sCNNCellBuf { OBJECT_HEADER @@ -112,6 +115,9 @@ typedef struct _sCNNCellBuf { }readport[READPORT]; int writeenable, writeenable_reg; + int readcomplete, readcomplete_reg; + int readenable, readenable_reg; + int readportindex, readportindex_reg; }sCNNCellBuf; @@ -232,14 +238,14 @@ static int cnncell_buf_hdl4se_unit_Connect(HOBJECT object, int index, HOBJECT fr CONNECTPORT(1, 0); /* nwReset */ inputind = 1; for (i = 0; i < READPORT; i++) { - CONNECTPORT(3 + i * 6, 1 + i * 3); /* wDataRead_i */ - CONNECTPORT(5 + i * 6, 2 + i * 3); /* bDataReadAddr_i */ - CONNECTPORT(7 + i * 6, 3 + i * 3); /* wDataReadComplete_i */ + CONNECTPORT(3 + i * SGLPERREADPORT, 1 + i * INPUTPERREADPORT); /* wDataRead_i */ + CONNECTPORT(5 + i * SGLPERREADPORT, 2 + i * INPUTPERREADPORT); /* bDataReadAddr_i */ + CONNECTPORT(7 + i * SGLPERREADPORT, 3 + i * INPUTPERREADPORT); /* wDataReadComplete_i */ } - CONNECTPORT(27, 13); /* wDataWrite */ - CONNECTPORT(28, 14); /* bDataWriteAddr */ - CONNECTPORT(29, 15); /* bDataWriteData */ - CONNECTPORT(30, 16); /* wDataWriteComplete */ + CONNECTPORT(READPORT * SGLPERREADPORT + 3, READPORT * INPUTPERREADPORT + 1); /* wDataWrite */ + CONNECTPORT(READPORT * SGLPERREADPORT + 4, READPORT * INPUTPERREADPORT + 2); /* bDataWriteAddr */ + CONNECTPORT(READPORT * SGLPERREADPORT + 5, READPORT * INPUTPERREADPORT + 3); /* bDataWriteData */ + CONNECTPORT(READPORT * SGLPERREADPORT + 6, READPORT * INPUTPERREADPORT + 4); /* wDataWriteComplete */ return 0; } @@ -248,7 +254,7 @@ static int cnncell_buf_hdl4se_unit_GetValue(HOBJECT object, int index, int width { sCNNCellBuf* pobj; pobj = (sCNNCellBuf*)objectThis(object); - if (index == 26) { + if (index == (READPORT * SGLPERREADPORT + 2)) { if (width <= 0) { objectCall1(value, SetUnsigned, 1); objectCall1(value, SetWidth, 1); @@ -258,8 +264,8 @@ static int cnncell_buf_hdl4se_unit_GetValue(HOBJECT object, int index, int width else { int port; int offset; - port = (index - 2) / 6; - offset = (index - 2) % 6; + port = (index - 2) / SGLPERREADPORT; + offset = (index - 2) % SGLPERREADPORT; if (offset == 0) { /* wDataReadEnable_i */ } @@ -273,8 +279,62 @@ static int cnncell_buf_hdl4se_unit_GetValue(HOBJECT object, int index, int width static int cnncell_buf_hdl4se_unit_ClkTick(HOBJECT object) { +#define GetInputValue(ind, v) \ +do { \ + objectCall3(pobj->input_unit[ind], GetValue, pobj->input_index[ind], 32, pobj->inputdata); \ + objectCall1(pobj->inputdata, GetUint32, &v); \ +} while (0) + int i; + int reset; sCNNCellBuf* pobj; pobj = (sCNNCellBuf*)objectThis(object); + /* 复位 */ + GetInputValue(0, reset); + if (reset == 0) {/* 低电平有效 */ + for (i = 0; i < READPORT; i++) { + pobj->readport[i].datareadenable = 0; + } + pobj->readenable = 0; + pobj->writeenable = 1; + pobj->readcomplete = 0; + } + else { + int v; + pobj->readcomplete = pobj->readcomplete_reg; + pobj->readenable = pobj->readenable_reg; + pobj->writeenable = pobj->writeenable_reg; + pobj->readportindex = pobj->readportindex_reg; + for (i = 0; i < READPORT; i++) { + pobj->readport[i].readcmd = 0; + pobj->readport[i].readaddr = 0; + } + if (pobj->writeenable_reg) { + GetInputValue(12, v); /*wDataWriteComplete*/ + if (v) { + pobj->writeenable = 0; + pobj->readenable = 1; + pobj->readportindex = 0; + } + } + if (pobj->readenable_reg) { + if (pobj->readcomplete_reg != (0xffff >> (16 - READPORT))) { + for (i = 0; i < READPORT; i++) { + if ((pobj->readcomplete_reg & (1 << i)) == 0) { + GetInputValue(3 + i * INPUTPERREADPORT, v); + GetInputValue(1 + i * INPUTPERREADPORT, pobj->readport[i].readcmd); + GetInputValue(2 + i * INPUTPERREADPORT, pobj->readport[i].readaddr); + if (v) { + pobj->readcomplete = pobj->readcomplete_reg | (1 << i); + } + } + } + } + else { + pobj->readenable = 0; + } + pobj->readportindex = pobj->readportindex_reg + 1; + } + } return 0; } @@ -284,11 +344,14 @@ static int cnncell_buf_hdl4se_unit_Setup(HOBJECT object) sCNNCellBuf* pobj; pobj = (sCNNCellBuf*)objectThis(object); pobj->writeenable_reg = pobj->writeenable; + pobj->readenable_reg = pobj->readenable; + pobj->readcomplete_reg = pobj->readcomplete; for (i = 0; i < READPORT; i++) { pobj->readport[i].read_reg = pobj->readport[i].readcmd; pobj->readport[i].readaddr_reg = pobj->readport[i].readaddr; pobj->readport[i].readcomplete_reg = pobj->readport[i].readcomplete; } + pobj->readportindex_reg = pobj->readportindex; return 0; } diff --git a/examples/hdl4secnn/cnn/cnncell/cnncell_coeffbuf.c b/examples/hdl4secnn/cnn/cnncell/cnncell_coeffbuf.c index fd3e2eb..51384c2 100644 --- a/examples/hdl4secnn/cnn/cnncell/cnncell_coeffbuf.c +++ b/examples/hdl4secnn/cnn/cnncell/cnncell_coeffbuf.c @@ -46,6 +46,7 @@ #define HDL4SEDEBUG 0 /* + (* HDL4SE="LCOM", CLSID="C72D0D42-2D4D-4DC3-9DDA-4F58CE7569BC", @@ -63,6 +64,52 @@ module hdl4se_cnn_coeffbuf ); endmodule +MODULE(cnncell_coeffbuf) { + MODULE_PARAM { + HDL_STRING_PARAM(filename, ""); + } + + MODULE_PORT { + HDL_IN(wClk, 1); + HDL_IN(nwReset, 1); + HDL_IN(wCoeffRead, 1); + HDL_OUT(wCoeffReadValid, 1); + HDL_IN(bCoeffReadAddr, 32); + HDL_OUT(bCoeffReadData, 32); + } + + MODULE_VARIABLE { + HDL_REG(readcmd, 1); + HDL_REG(read_addr, 32); + HDL_INT(tt, 32); + HDL_UINT(utt, 58); + FILE * pFile; + } + + DEFINE_SUBMODULE { + } + + pFile = fopen(GET_PARAM(filename), "r"); + if (pFile == NULL) { + HDL_RETURN(-1); + } +} + +ON_DESTROY() { + if (OBJ(pFile) != NULL) { + fclose(OBJ(pFile)); + OBJ(pFile) = NULL; + } +} + +GENERATE_OUTPUT() { +} + +ON_CLOCK() { +} + +ENDMODULE; + */ #ifdef WIN32 diff --git a/examples/hdl4secnn/googlenet/verilog/main.c b/examples/hdl4secnn/googlenet/verilog/main.c index 0e4f8b6..1d7b537 100644 --- a/examples/hdl4secnn/googlenet/verilog/main.c +++ b/examples/hdl4secnn/googlenet/verilog/main.c @@ -49,7 +49,7 @@ unsigned long long clocks = 0; static int running = 1; -#define VCDOUTPUT 0 +#define VCDOUTPUT 1 int cnnInit(); @@ -78,10 +78,27 @@ int main(int argc, char* argv[]) objectPrintInfo(stdout, fprintf); #if VCDOUTPUT vcdfile = hdl4sesimCreateVCDFile("googlenet.vcd"); - objectCall2(vcdfile, AddSignal, "/top/terrisctrl", "bWriteAddr"); + objectCall2(vcdfile, AddSignal, "/top/wSrcDataWrite", "out"); + objectCall2(vcdfile, AddSignal, "/top/bSrcDataWriteAddr", "out"); + objectCall2(vcdfile, AddSignal, "/top/bSrcDataWriteData", "out"); + objectCall2(vcdfile, AddSignal, "/top/wSrcDataWriteEnable", "out"); + objectCall2(vcdfile, AddSignal, "/top/wSrcDataWriteComplete", "out"); + objectCall2(vcdfile, AddSignal, "/top/wSrcDataReadEnable", "out"); + objectCall2(vcdfile, AddSignal, "/top/wSrcDataRead", "out"); + objectCall2(vcdfile, AddSignal, "/top/wSrcDataReadValid", "out"); + objectCall2(vcdfile, AddSignal, "/top/bSrcDataReadAddr", "out"); + objectCall2(vcdfile, AddSignal, "/top/bSrcDataReadData", "out"); + objectCall2(vcdfile, AddSignal, "/top/wSrcDataReadComplete", "out"); + objectCall2(vcdfile, AddSignal, "/top/wDstDataReadEnable", "out"); + objectCall2(vcdfile, AddSignal, "/top/wDstDataRead", "out"); + objectCall2(vcdfile, AddSignal, "/top/wDstDataReadValid", "out"); + objectCall2(vcdfile, AddSignal, "/top/bDstDataReadAddr", "out"); + objectCall2(vcdfile, AddSignal, "/top/bDstDataReadData", "out"); + objectCall2(vcdfile, AddSignal, "/top/wDstDataReadComplete", "out"); objectCall1(vcdfile, SetTopModule, topmodule); objectCall0(vcdfile, StartRecord); #endif + clocks = 0; do { objectCall0(sim_unit, ClkTick); #if VCDOUTPUT @@ -90,6 +107,9 @@ int main(int argc, char* argv[]) objectCall0(sim_unit, Setup); if (clocks == 2) objectCall1(sim, SetReset, 1); + clocks++; + if ((clocks & 0xFFF) == 0) + printf("clocks: %lld\n", clocks); } while (running); #if VCDOUTPUT objectCall0(vcdfile, StopRecord); diff --git a/hdl4secell/include/hdl4secell.h b/hdl4secell/include/hdl4secell.h index 2a1cc9a..310ea65 100644 --- a/hdl4secell/include/hdl4secell.h +++ b/hdl4secell/include/hdl4secell.h @@ -260,6 +260,15 @@ DEFINE_GUID(CLSID_HDL4SE_MODULE,0x167d115e, 0x0c1e, 0x484e, 0x8b, 0xf3, 0xa7, 0x IHDL4SEUnit** hdl4seCreateUnit(IHDL4SEModule** parent, IIDTYPE clsid, const char* instanceparam, const char* name); IHDL4SEUnit** hdl4seCreateUnit2(IHDL4SEModule** parent, const char * clsid, const char* instanceparam, const char* name); +typedef struct sHDL4SEREG { + unsigned int vin, vout; +}HDL4SEREG; + +#define REG_GET(r) ((r).vout) +#define REG_SET(r, v) ((r).vin = (v)) +#define REG_SETUP(r) ((r).vout = (r).vin) +#define REG_KEEP(r) ((r).vin = (r).vout) + #endif /* _ASMLANGUAGE */ #ifdef __cplusplus -- GitLab