diff --git a/arch/arm/arm/src/los_hw_exc.S b/arch/arm/arm/src/los_hw_exc.S index 98ebba86792c7bb2d9571ab275ed912c017ee32c..0ef952d29ea2ae9b551d591a5b2ab2d2137fe890 100644 --- a/arch/arm/arm/src/los_hw_exc.S +++ b/arch/arm/arm/src/los_hw_exc.S @@ -181,6 +181,7 @@ _osExceptUndefInstrHdl: MOV R2, #0 MOV R3, #0 STMFD SP!, {R2-R3} @ far and fsr fields, are 0 under this anomaly + STMFD SP!, {R4-R11} MOV R0, #OS_EXCEPT_UNDEF_INSTR @ Set exception ID to OS_EXCEPT_UNDEF_INSTR. B _osExceptDispatch @ Branch to global exception handler. @@ -240,6 +241,7 @@ _osKernelSVCHandler: MOV R0, #0 STR R0, [SP, #0] STR R0, [SP, #4] + STMFD SP!, {R4-R11} MOV R0, #OS_EXCEPT_SWI @ Set exception ID to OS_EXCEPT_SWI. B _osExceptDispatch @ Branch to global exception handler. @@ -261,9 +263,10 @@ _osExceptPrefetchAbortHdl: MRC P15, 0, R2, C6, C0, 2 MRC P15, 0, R3, C5, C0, 1 STMFD SP!, {R2-R3} @ Save far and fsr + STMFD SP!, {R4-R11} #ifdef LOSCFG_KERNEL_VM - LDR R0, [SP, #(11 * 4)] + LDR R0, [SP, #(19 * 4)] AND R0, R0, #CPSR_MASK_MODE @ Interrupted mode CMP R0, #CPSR_USER_MODE @ User mode BNE _osKernelExceptPrefetchAbortHdl @@ -302,6 +305,7 @@ _osExceptDataAbortHdl: MRC P15, 0, R2, C6, C0, 0 MRC P15, 0, R3, C5, C0, 0 STMFD SP!, {R2-R3} @ Save far and fsr + STMFD SP!, {R4-R11} #ifdef LOSCFG_KERNEL_VM MOV R1, SP @@ -320,6 +324,7 @@ _osExceptDataAbortHdl: #ifdef LOSCFG_KERNEL_VM _osExcPageFaultReturn: + LDMFD SP!, {R4-R11} ADD SP, SP, #(2 * 4) LDMFD SP, {R13, R14}^ ADD SP, SP, #(2 * 4) @ Jump reserved fileds @@ -340,6 +345,7 @@ _osExceptAddrAbortHdl: MOV R2, #0 MOV R3, #0 STMFD SP!, {R2-R3} @ far and fsr fields, are 0 under this anomaly + STMFD SP!, {R4-R11} MOV R0, #OS_EXCEPT_ADDR_ABORT @ Set exception ID to OS_EXCEPT_ADDR_ABORT. B _osExceptDispatch @ Branch to global exception handler. @@ -357,12 +363,12 @@ _osExceptFiqHdl: MOV R2, #0 MOV R3, #0 STMFD SP!, {R2-R3} @ far and fsr fields, are 0 under this anomaly + STMFD SP!, {R4-R11} @ Description: Exception handler @ Parameter : R0 Exception Type @ Regs Hold : R3 Exception`s CPSR _osExceptDispatch: - STMFD SP!, {R4-R11} LDR R8, [SP, #(8 * 4)] @ Get far LDR R9, [SP, #(9 * 4)] @ Get fsr