From 6a1fee138cf799194fe9faf9cb17aa8c19306c80 Mon Sep 17 00:00:00 2001 From: zhuangwei123 Date: Fri, 11 May 2018 10:15:32 +0800 Subject: [PATCH] =?UTF-8?q?[bsp/ls1cdev]=201=E3=80=81astyle=E6=A0=BC?= =?UTF-8?q?=E5=BC=8F=E5=8C=96drv=5Fuart=E4=BB=A3=E7=A0=81=202=E3=80=81?= =?UTF-8?q?=E4=BF=AE=E6=94=B9drv=5Fuart.h=E5=A4=B4=E6=96=87=E4=BB=B6?= =?UTF-8?q?=E5=A3=B0=E6=98=8E?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/ls1cdev/drivers/drv_uart.c | 134 ++++++++++++++--------------- bsp/ls1cdev/drivers/drv_uart.h | 150 ++++++++++++++++++--------------- 2 files changed, 147 insertions(+), 137 deletions(-) diff --git a/bsp/ls1cdev/drivers/drv_uart.c b/bsp/ls1cdev/drivers/drv_uart.c index 3466c07bd3..de0fe1f852 100644 --- a/bsp/ls1cdev/drivers/drv_uart.c +++ b/bsp/ls1cdev/drivers/drv_uart.c @@ -32,102 +32,102 @@ struct rt_uart_ls1c { ls1c_uart_t UARTx; - rt_uint32_t IRQ; + rt_uint32_t IRQ; }; static rt_err_t ls1c_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { - struct rt_uart_ls1c *uart_dev = RT_NULL; - ls1c_uart_info_t uart_info = {0}; + struct rt_uart_ls1c *uart_dev = RT_NULL; + ls1c_uart_info_t uart_info = {0}; - RT_ASSERT(serial != RT_NULL); - RT_ASSERT(cfg != RT_NULL); + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); - uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; + uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; - // 初始化串口 - uart_info.UARTx = uart_dev->UARTx; - uart_info.baudrate = cfg->baud_rate; - uart_info.rx_enable= TRUE; + // 初始化串口 + uart_info.UARTx = uart_dev->UARTx; + uart_info.baudrate = cfg->baud_rate; + uart_info.rx_enable = TRUE; uart_init(&uart_info); - return RT_EOK; + return RT_EOK; } static rt_err_t ls1c_uart_control(struct rt_serial_device *serial, int cmd, void *arg) { - struct rt_uart_ls1c *uart_dev = RT_NULL; - - RT_ASSERT(serial != RT_NULL); - uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; - - switch (cmd) - { - case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ + struct rt_uart_ls1c *uart_dev = RT_NULL; + + RT_ASSERT(serial != RT_NULL); + uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; + + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ rt_hw_interrupt_mask(uart_dev->IRQ); - break; + break; - case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ - rt_hw_interrupt_umask(uart_dev->IRQ); - break; + case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ + rt_hw_interrupt_umask(uart_dev->IRQ); + break; - default: - break; - } + default: + break; + } - return RT_EOK; + return RT_EOK; } static int ls1c_uart_putc(struct rt_serial_device *serial, char c) { - struct rt_uart_ls1c *uart_dev = RT_NULL; - - RT_ASSERT(serial != RT_NULL); + struct rt_uart_ls1c *uart_dev = RT_NULL; + + RT_ASSERT(serial != RT_NULL); - uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; - uart_putc(uart_dev->UARTx, c); + uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; + uart_putc(uart_dev->UARTx, c); - return 1; + return 1; } static int ls1c_uart_getc(struct rt_serial_device *serial) { - struct rt_uart_ls1c *uart_dev = RT_NULL; - - RT_ASSERT(serial != RT_NULL); - - uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; - void *uart_base = uart_get_base(uart_dev->UARTx); - - if(LSR_RXRDY & reg_read_8(uart_base + LS1C_UART_LSR_OFFSET)) - { - return reg_read_8(uart_base + LS1C_UART_DAT_OFFSET); - } - - return -1; + struct rt_uart_ls1c *uart_dev = RT_NULL; + + RT_ASSERT(serial != RT_NULL); + + uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; + void *uart_base = uart_get_base(uart_dev->UARTx); + + if (LSR_RXRDY & reg_read_8(uart_base + LS1C_UART_LSR_OFFSET)) + { + return reg_read_8(uart_base + LS1C_UART_DAT_OFFSET); + } + + return -1; } /* UART interrupt handler */ static void uart_irq_handler(int vector, void *param) { - struct rt_serial_device *serial = (struct rt_serial_device*)param; - struct rt_uart_ls1c *uart_dev = RT_NULL; - - RT_ASSERT(serial != RT_NULL); - - uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; - void *uart_base = uart_get_base(uart_dev->UARTx); - unsigned char iir = reg_read_8(uart_base + LS1C_UART_IIR_OFFSET); - - // 判断是否为接收超时或接收到有效数据 - if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir)) - { - rt_interrupt_enter(); - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); - rt_interrupt_leave(); - } + struct rt_serial_device *serial = (struct rt_serial_device *)param; + struct rt_uart_ls1c *uart_dev = RT_NULL; + + RT_ASSERT(serial != RT_NULL); + + uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data; + void *uart_base = uart_get_base(uart_dev->UARTx); + unsigned char iir = reg_read_8(uart_base + LS1C_UART_IIR_OFFSET); + + // 判断是否为接收超时或接收到有效数据 + if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir)) + { + rt_interrupt_enter(); + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + rt_interrupt_leave(); + } } @@ -159,12 +159,12 @@ void rt_hw_uart_init(void) serial2.ops = &stm32_uart_ops; serial2.config = config; - pin_set_purpose(36, PIN_PURPOSE_OTHER); - pin_set_purpose(37, PIN_PURPOSE_OTHER); - pin_set_remap(36, PIN_REMAP_SECOND); - pin_set_remap(37, PIN_REMAP_SECOND); + pin_set_purpose(36, PIN_PURPOSE_OTHER); + pin_set_purpose(37, PIN_PURPOSE_OTHER); + pin_set_remap(36, PIN_REMAP_SECOND); + pin_set_remap(37, PIN_REMAP_SECOND); - rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial2, "UART2"); + rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial2, "UART2"); /* register UART1 device */ rt_hw_serial_register(&serial2, diff --git a/bsp/ls1cdev/drivers/drv_uart.h b/bsp/ls1cdev/drivers/drv_uart.h index 0904df5b10..2c6553bffd 100644 --- a/bsp/ls1cdev/drivers/drv_uart.h +++ b/bsp/ls1cdev/drivers/drv_uart.h @@ -1,11 +1,21 @@ /* * File : drv_uart.h * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team + * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * * Change Logs: * Date Author Notes @@ -18,84 +28,84 @@ #include "ls1c.h" #define DEV_CLK 252000000 // 252MHz -#define UART_BAUDRATE 115200 - -#define UART0_BASE 0xBFE40000 -//#define UART0_1_BASE 0xBFE41000 -#define UART1_BASE 0xBFE44000 -#define UART2_BASE 0xBFE48000 -#define UART3_BASE 0xBFE4C000 -#define UART4_BASE 0xBFE4C400 -#define UART5_BASE 0xBFE4C500 -#define UART6_BASE 0xBFE4C600 -#define UART7_BASE 0xBFE4C700 -#define UART8_BASE 0xBFE4C800 -#define UART9_BASE 0xBFE4C900 -#define UART10_BASE 0xBFE4Ca00 -#define UART11_BASE 0xBFE4Cb00 +#define UART_BAUDRATE 115200 + +#define UART0_BASE 0xBFE40000 +//#define UART0_1_BASE 0xBFE41000 +#define UART1_BASE 0xBFE44000 +#define UART2_BASE 0xBFE48000 +#define UART3_BASE 0xBFE4C000 +#define UART4_BASE 0xBFE4C400 +#define UART5_BASE 0xBFE4C500 +#define UART6_BASE 0xBFE4C600 +#define UART7_BASE 0xBFE4C700 +#define UART8_BASE 0xBFE4C800 +#define UART9_BASE 0xBFE4C900 +#define UART10_BASE 0xBFE4Ca00 +#define UART11_BASE 0xBFE4Cb00 /* UART registers */ -#define UART_DAT(base) __REG8(base + 0x00) -#define UART_IER(base) __REG8(base + 0x01) -#define UART_IIR(base) __REG8(base + 0x02) -#define UART_FCR(base) __REG8(base + 0x02) -#define UART_LCR(base) __REG8(base + 0x03) -#define UART_MCR(base) __REG8(base + 0x04) -#define UART_LSR(base) __REG8(base + 0x05) -#define UART_MSR(base) __REG8(base + 0x06) - -#define UART_LSB(base) __REG8(base + 0x00) -#define UART_MSB(base) __REG8(base + 0x01) +#define UART_DAT(base) __REG8(base + 0x00) +#define UART_IER(base) __REG8(base + 0x01) +#define UART_IIR(base) __REG8(base + 0x02) +#define UART_FCR(base) __REG8(base + 0x02) +#define UART_LCR(base) __REG8(base + 0x03) +#define UART_MCR(base) __REG8(base + 0x04) +#define UART_LSR(base) __REG8(base + 0x05) +#define UART_MSR(base) __REG8(base + 0x06) + +#define UART_LSB(base) __REG8(base + 0x00) +#define UART_MSB(base) __REG8(base + 0x01) /* UART0 registers */ -#define UART0_DAT __REG8(UART0_BASE + 0x00) -#define UART0_IER __REG8(UART0_BASE + 0x01) -#define UART0_IIR __REG8(UART0_BASE + 0x02) -#define UART0_FCR __REG8(UART0_BASE + 0x02) -#define UART0_LCR __REG8(UART0_BASE + 0x03) -#define UART0_MCR __REG8(UART0_BASE + 0x04) -#define UART0_LSR __REG8(UART0_BASE + 0x05) -#define UART0_MSR __REG8(UART0_BASE + 0x06) - -#define UART0_LSB __REG8(UART0_BASE + 0x00) -#define UART0_MSB __REG8(UART0_BASE + 0x01) +#define UART0_DAT __REG8(UART0_BASE + 0x00) +#define UART0_IER __REG8(UART0_BASE + 0x01) +#define UART0_IIR __REG8(UART0_BASE + 0x02) +#define UART0_FCR __REG8(UART0_BASE + 0x02) +#define UART0_LCR __REG8(UART0_BASE + 0x03) +#define UART0_MCR __REG8(UART0_BASE + 0x04) +#define UART0_LSR __REG8(UART0_BASE + 0x05) +#define UART0_MSR __REG8(UART0_BASE + 0x06) + +#define UART0_LSB __REG8(UART0_BASE + 0x00) +#define UART0_MSB __REG8(UART0_BASE + 0x01) /* UART1 registers */ -#define UART1_DAT __REG8(UART1_BASE + 0x00) -#define UART1_IER __REG8(UART1_BASE + 0x01) -#define UART1_IIR __REG8(UART1_BASE + 0x02) -#define UART1_FCR __REG8(UART1_BASE + 0x02) -#define UART1_LCR __REG8(UART1_BASE + 0x03) -#define UART1_MCR __REG8(UART1_BASE + 0x04) -#define UART1_LSR __REG8(UART1_BASE + 0x05) -#define UART1_MSR __REG8(UART1_BASE + 0x06) - -#define UART1_LSB __REG8(UART1_BASE + 0x00) -#define UART1_MSB __REG8(UART1_BASE + 0x01) +#define UART1_DAT __REG8(UART1_BASE + 0x00) +#define UART1_IER __REG8(UART1_BASE + 0x01) +#define UART1_IIR __REG8(UART1_BASE + 0x02) +#define UART1_FCR __REG8(UART1_BASE + 0x02) +#define UART1_LCR __REG8(UART1_BASE + 0x03) +#define UART1_MCR __REG8(UART1_BASE + 0x04) +#define UART1_LSR __REG8(UART1_BASE + 0x05) +#define UART1_MSR __REG8(UART1_BASE + 0x06) + +#define UART1_LSB __REG8(UART1_BASE + 0x00) +#define UART1_MSB __REG8(UART1_BASE + 0x01) /* UART interrupt enable register value */ -#define UARTIER_IME (1 << 3) -#define UARTIER_ILE (1 << 2) -#define UARTIER_ITXE (1 << 1) -#define UARTIER_IRXE (1 << 0) +#define UARTIER_IME (1 << 3) +#define UARTIER_ILE (1 << 2) +#define UARTIER_ITXE (1 << 1) +#define UARTIER_IRXE (1 << 0) /* UART line control register value */ -#define UARTLCR_DLAB (1 << 7) -#define UARTLCR_BCB (1 << 6) -#define UARTLCR_SPB (1 << 5) -#define UARTLCR_EPS (1 << 4) -#define UARTLCR_PE (1 << 3) -#define UARTLCR_SB (1 << 2) +#define UARTLCR_DLAB (1 << 7) +#define UARTLCR_BCB (1 << 6) +#define UARTLCR_SPB (1 << 5) +#define UARTLCR_EPS (1 << 4) +#define UARTLCR_PE (1 << 3) +#define UARTLCR_SB (1 << 2) /* UART line status register value */ -#define UARTLSR_ERROR (1 << 7) -#define UARTLSR_TE (1 << 6) -#define UARTLSR_TFE (1 << 5) -#define UARTLSR_BI (1 << 4) -#define UARTLSR_FE (1 << 3) -#define UARTLSR_PE (1 << 2) -#define UARTLSR_OE (1 << 1) -#define UARTLSR_DR (1 << 0) +#define UARTLSR_ERROR (1 << 7) +#define UARTLSR_TE (1 << 6) +#define UARTLSR_TFE (1 << 5) +#define UARTLSR_BI (1 << 4) +#define UARTLSR_FE (1 << 3) +#define UARTLSR_PE (1 << 2) +#define UARTLSR_OE (1 << 1) +#define UARTLSR_DR (1 << 0) void rt_hw_uart_init(void); -- GitLab