From 57f34f60319538ec7116970c3bf84e33745e5961 Mon Sep 17 00:00:00 2001 From: "dzzxzz@gmail.com" Date: Sat, 14 Apr 2012 11:41:15 +0000 Subject: [PATCH] fixed compiling error git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2054 bbd45198-f89e-11dd-88c7-29a3b14d5316 --- bsp/lpc178x/lpc17xx_rom.ld | 133 ++++++++++++++++++++++++++++++++++++ bsp/mini4020/rtconfig.py | 9 ++- bsp/mini4020/startup.c | 3 +- bsp/stm32f40x/stm32_rom.sct | 15 ++++ 4 files changed, 156 insertions(+), 4 deletions(-) create mode 100644 bsp/lpc178x/lpc17xx_rom.ld create mode 100644 bsp/stm32f40x/stm32_rom.sct diff --git a/bsp/lpc178x/lpc17xx_rom.ld b/bsp/lpc178x/lpc17xx_rom.ld new file mode 100644 index 0000000000..872f55dd9f --- /dev/null +++ b/bsp/lpc178x/lpc17xx_rom.ld @@ -0,0 +1,133 @@ +/* + * linker script for LPC1788 (512kB Flash, 48kB + 48kB SRAM ) with GNU ld + * yiyue.fang 2012-04-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 + DATA (rw) : ORIGIN = 0x10000000, LENGTH = 0x00010000 +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + KEEP(*(.interrupt_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/mini4020/rtconfig.py b/bsp/mini4020/rtconfig.py index 2e2fb3c4eb..b0002ddf9c 100644 --- a/bsp/mini4020/rtconfig.py +++ b/bsp/mini4020/rtconfig.py @@ -3,6 +3,7 @@ import os # toolchains options ARCH = 'arm' CPU = 'sep4020' +TextBase = '0x30100000' CROSS_TOOL = 'keil' @@ -10,8 +11,10 @@ if os.getenv('RTT_CC'): CROSS_TOOL = os.getenv('RTT_CC') if CROSS_TOOL == 'gcc': - PLATFORM = 'gcc' - EXEC_PATH = 'E:/Program Files/CodeSourcery/Sourcery G++ Lite/bin' + print '================ERROR============================' + print 'Not support iar yet!' + print '=================================================' + exit(0) elif CROSS_TOOL == 'keil': PLATFORM = 'armcc' EXEC_PATH = 'c:/Keil' @@ -41,7 +44,7 @@ if PLATFORM == 'gcc': DEVICE = ' -mcpu=arm720t' CFLAGS = DEVICE AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase - LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_mini4020.map,-cref,-u,_start -T mini4020_ram.ld' + ' -Ttext ' + TextBase + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_mini4020.map,-cref,-u,_start -T mini4020_rom.ld' + ' -Ttext ' + TextBase CPATH = '' LPATH = '' diff --git a/bsp/mini4020/startup.c b/bsp/mini4020/startup.c index 7b21ec4fc3..f4ff6822fb 100644 --- a/bsp/mini4020/startup.c +++ b/bsp/mini4020/startup.c @@ -15,9 +15,10 @@ #define SDRAM_BASE 0x30000000 - #ifdef __CC_ARM extern int Image$$RW_RAM1$$ZI$$Limit; +#elif (defined (__GNUC__)) + extern unsigned char __bss_end; #endif extern void rt_application_init(void); diff --git a/bsp/stm32f40x/stm32_rom.sct b/bsp/stm32f40x/stm32_rom.sct new file mode 100644 index 0000000000..0d7c47992d --- /dev/null +++ b/bsp/stm32f40x/stm32_rom.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00100000 { ; load region size_region + ER_IROM1 0x08000000 0x00100000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00020000 { ; RW data + .ANY (+RW +ZI) + } +} + -- GitLab