Skip to content

cloud-kernel
cloud-kernel

_Walt / cloud-kernel
与 Fork 源项目一致

Fork自 openanolis / cloud-kernel

通知 1
Star 0
Fork 0
cloud-kernel
cloud-kernel

体验新版 GitCode，发现更多精彩内容 >>

切换分支/标签
  1. 02 2月, 2007 1 次提交
  3. 30 1月, 2007 1 次提交
  5. 13 12月, 2006 1 次提交
  7. 30 11月, 2006 1 次提交
  9. 22 11月, 2006 1 次提交
  11. 25 10月, 2006 1 次提交
  13. 21 10月, 2006 1 次提交
  15. 05 10月, 2006 1 次提交
    • D
      IRQ: Maintain regs pointer globally rather than passing to IRQ handlers · 7d12e780
      由 David Howells 提交于 
      Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.

The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around.  On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).

Where appropriate, an arch may override the generic storage facility and do
something different with the variable.  On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.

Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions.  Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller.  A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.

I've build this code with allyesconfig for x86_64 and i386.  I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.

This will affect all archs.  Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:

	struct pt_regs *old_regs = set_irq_regs(regs);

And put the old one back at the end:

	set_irq_regs(old_regs);

Don't pass regs through to generic_handle_irq() or __do_IRQ().

In timer_interrupt(), this sort of change will be necessary:

	-	update_process_times(user_mode(regs));
	-	profile_tick(CPU_PROFILING, regs);
	+	update_process_times(user_mode(get_irq_regs()));
	+	profile_tick(CPU_PROFILING);

I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().

Some notes on the interrupt handling in the drivers:

 (*) input_dev() is now gone entirely.  The regs pointer is no longer stored in
     the input_dev struct.

 (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking.  It does
     something different depending on whether it's been supplied with a regs
     pointer or not.

 (*) Various IRQ handler function pointers have been moved to type
     irq_handler_t.
Signed-Off-By: NDavid Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
      7d12e780
  17. 28 9月, 2006 5 次提交
  19. 14 9月, 2006 1 次提交
  21. 01 9月, 2006 4 次提交
  23. 30 8月, 2006 1 次提交
  25. 20 8月, 2006 1 次提交
  27. 17 8月, 2006 2 次提交
  29. 03 7月, 2006 1 次提交
  31. 01 7月, 2006 1 次提交
  33. 28 6月, 2006 1 次提交
  35. 09 6月, 2006 1 次提交
  37. 16 3月, 2006 1 次提交
  39. 05 3月, 2006 1 次提交
  41. 07 2月, 2006 1 次提交
  43. 18 1月, 2006 3 次提交
  45. 15 1月, 2006 1 次提交
  47. 13 1月, 2006 1 次提交
    • O
      [PATCH] corruption during e100 MDI register access · ac7c6669
      由 ODonnell, Michael 提交于 
      We have identified two related bugs in the e100 driver.

Both bugs are related to manipulation of the MDI control register.

The first problem is that the Ready bit is being ignored when writing to
the Control register; we noticed this because the Linux bonding driver
would occasionally come to the spurious conclusion that the link was down
when querying Link State.  It turned out that by failing to wait for a
previous command to complete it was selecting what was essentially a random
register in the MDI register set.  When we added code that waits for the
Ready bit (as shown in the patch file below) all such problems ceased.

The second problem is that, although access to the MDI registers involves
multiple steps which must not be intermixed, nothing was defending against
two or more threads attempting simultaneous access.  The most obvious
situation where such interference could occur involves the watchdog versus
ioctl paths, but there are probably others, so we recommend the locking
shown in our patch file.
Signed-off-by: NMichael O'Donnell <Michael.ODonnell@stratus.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Garzik <jgarzik@pobox.com>
Cc: John Ronciak <john.ronciak@intel.com>
Cc: Ganesh Venkatesan <ganesh.venkatesan@intel.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      ac7c6669
  49. 19 11月, 2005 1 次提交
    • J
      [PATCH] e100: re-enable microcode with more useful defaults · 2afecc04
      由 Jesse Brandeburg 提交于 
      For the four versions of hardware that we (currently) support microcode
download on, the default configuration of our receive interrupt mitigation
microcode was too aggressive, and caused unnecessary delays when pinging,
and low(er) throughput on single connection latency sensitive performance
tests.

This code adds microcode support, and sets the defaults to more reasonable
settings. It also explains the functionality in the code in more detail.
Compile and load tested, shows expected behavior for slight delay of ping
packets (1-2ms) when ucode is loaded, and decent interrupt moderation for
small packets, while maintaining good throughput.
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      2afecc04
  51. 08 11月, 2005 1 次提交
  53. 11 10月, 2005 1 次提交
    • J
      e100: revert CPU cycle saver microcode, it causes severe problems · 875521dd
      由 Jeff Garzik 提交于 
      for certain NICs

Reverting 685fac63:
> [PATCH] e100: CPU cycle saver microcode
>
>
> Add cpu cycle saver microcode to 8086:{1209/1229} other than ICH devices.
>
> Signed-off-by: Mallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com>
> Signed-off-by: Ganesh Venkatesan <ganesh.venkatesan@intel.com>
> Signed-off-by: John Ronciak <john.ronciak@intel.com>
> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
      875521dd
  55. 14 9月, 2005 2 次提交
  57. 26 8月, 2005 1 次提交