From c6be6441574abae01ba89f4bcca57958e1123a1d Mon Sep 17 00:00:00 2001 From: SummerGift Date: Wed, 26 Dec 2018 10:43:16 +0800 Subject: [PATCH] [bsp][stm32] update stm32 mul-series drivers --- bsp/stm32/libraries/HAL_Drivers/drv_adc.c | 12 +- bsp/stm32/libraries/HAL_Drivers/drv_common.c | 13 +- bsp/stm32/libraries/HAL_Drivers/drv_config.h | 11 +- bsp/stm32/libraries/HAL_Drivers/drv_dma.h | 2 +- bsp/stm32/libraries/HAL_Drivers/drv_gpio.c | 56 ++++++++- bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c | 32 +++-- bsp/stm32/libraries/HAL_Drivers/drv_pwm.c | 15 ++- bsp/stm32/libraries/HAL_Drivers/drv_qspi.c | 63 +++------- bsp/stm32/libraries/HAL_Drivers/drv_rtc.c | 6 +- bsp/stm32/libraries/HAL_Drivers/drv_sdio.c | 6 - bsp/stm32/libraries/HAL_Drivers/drv_spi.c | 12 +- bsp/stm32/libraries/HAL_Drivers/drv_usart.c | 115 +++++------------- bsp/stm32/libraries/HAL_Drivers/drv_usart.h | 11 +- bsp/stm32/libraries/HAL_Drivers/drv_wdt.c | 2 +- 14 files changed, 191 insertions(+), 165 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c index ed2513c3bb..3bf0c2d8fd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c @@ -127,7 +127,7 @@ static rt_uint32_t stm32_adc_get_channel(rt_uint32_t channel) case 17: stm32_channel = ADC_CHANNEL_17; break; -#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) case 18: stm32_channel = ADC_CHANNEL_18; break; @@ -149,7 +149,7 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch #if defined(SOC_SERIES_STM32F1) if (channel <= 17) -#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) if (channel <= 18) #endif { @@ -160,13 +160,15 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch { #if defined(SOC_SERIES_STM32F1) LOG_E("ADC channel must be between 0 and 17."); -#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) LOG_E("ADC channel must be between 0 and 18."); #endif return -RT_ERROR; } ADC_ChanConf.Rank = 1; -#if defined(SOC_SERIES_STM32F1) +#if defined(SOC_SERIES_STM32F0) + ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_71CYCLES_5; +#elif defined(SOC_SERIES_STM32F1) ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_55CYCLES_5; #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_112CYCLES; @@ -186,7 +188,7 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch HAL_ADC_Start(stm32_adc_handler); /* Wait for the ADC to convert */ - HAL_ADC_PollForConversion(stm32_adc_handler, 10); + HAL_ADC_PollForConversion(stm32_adc_handler, 100); /* get ADC value */ *value = (rt_uint32_t)HAL_ADC_GetValue(stm32_adc_handler); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.c b/bsp/stm32/libraries/HAL_Drivers/drv_common.c index 1f54ebc800..f67a498a26 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c @@ -95,6 +95,16 @@ void _Error_Handler(char *s, int num) */ RT_WEAK void rt_hw_board_init() { +#ifdef SCB_EnableICache + /* Enable I-Cache---------------------------------------------------------*/ + SCB_EnableICache(); +#endif + +#ifdef SCB_EnableDCache + /* Enable D-Cache---------------------------------------------------------*/ + SCB_EnableDCache(); +#endif + /* HAL_Init() function is called at the beginning of the program */ HAL_Init(); @@ -102,9 +112,6 @@ RT_WEAK void rt_hw_board_init() SystemClock_Config(); rt_hw_systick_init(); - /* Hardware GPIO initialization */ - MX_GPIO_Init(); - /* Heap initialization */ #if defined(RT_USING_HEAP) rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h index d188bf60e8..dc0bf5d33e 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-10-30 SummerGift change to new framework + * 2018-10-30 SummerGift first version */ #ifndef __DRV_CONFIG_H__ @@ -14,7 +14,13 @@ #include #include -#if defined(SOC_SERIES_STM32F1) +#if defined(SOC_SERIES_STM32F0) +#include "f0/uart_config.h" +#include "f0/spi_config.h" +#include "f0/tim_config.h" +#include "f0/pwm_config.h" +#include "f0/adc_config.h" +#elif defined(SOC_SERIES_STM32F1) #include "f1/uart_config.h" #include "f1/spi_config.h" #include "f1/adc_config.h" @@ -38,6 +44,7 @@ #elif defined(SOC_SERIES_STM32L4) #include "l4/uart_config.h" #include "l4/spi_config.h" +#include "l4/qspi_config.h" #include "l4/adc_config.h" #include "l4/tim_config.h" #include "l4/pwm_config.h" diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h index 99b73f5f7c..4c266eafce 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h @@ -16,7 +16,7 @@ #include #include -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32F0) || (SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) #define DMA_INSTANCE_TYPE DMA_Channel_TypeDef #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) #define DMA_INSTANCE_TYPE DMA_Stream_TypeDef diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c index 0d71c06763..e4b742a4a1 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-06 balanceTWK change to new framework + * 2018-11-06 balanceTWK first version */ #include @@ -217,6 +217,24 @@ static const struct pin_index pins[] = static const struct pin_irq_map pin_irq_map[] = { +#if defined(SOC_SERIES_STM32F0) + {GPIO_PIN_0, EXTI0_1_IRQn}, + {GPIO_PIN_1, EXTI0_1_IRQn}, + {GPIO_PIN_2, EXTI2_3_IRQn}, + {GPIO_PIN_3, EXTI2_3_IRQn}, + {GPIO_PIN_4, EXTI4_15_IRQn}, + {GPIO_PIN_5, EXTI4_15_IRQn}, + {GPIO_PIN_6, EXTI4_15_IRQn}, + {GPIO_PIN_7, EXTI4_15_IRQn}, + {GPIO_PIN_8, EXTI4_15_IRQn}, + {GPIO_PIN_9, EXTI4_15_IRQn}, + {GPIO_PIN_10, EXTI4_15_IRQn}, + {GPIO_PIN_11, EXTI4_15_IRQn}, + {GPIO_PIN_12, EXTI4_15_IRQn}, + {GPIO_PIN_13, EXTI4_15_IRQn}, + {GPIO_PIN_14, EXTI4_15_IRQn}, + {GPIO_PIN_15, EXTI4_15_IRQn}, +#else {GPIO_PIN_0, EXTI0_IRQn}, {GPIO_PIN_1, EXTI1_IRQn}, {GPIO_PIN_2, EXTI2_IRQn}, @@ -233,6 +251,7 @@ static const struct pin_irq_map pin_irq_map[] = {GPIO_PIN_13, EXTI15_10_IRQn}, {GPIO_PIN_14, EXTI15_10_IRQn}, {GPIO_PIN_15, EXTI15_10_IRQn}, +#endif }; static struct rt_pin_irq_hdr pin_irq_hdr_tab[] = @@ -608,6 +627,41 @@ void EXTI15_10_IRQHandler(void) rt_interrupt_leave(); } +void EXTI0_1_IRQHandler(void) +{ + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1); + rt_interrupt_leave(); +} + +void EXTI2_3_IRQHandler(void) +{ + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3); + rt_interrupt_leave(); +} +void EXTI4_15_IRQHandler(void) +{ + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_14); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_15); +} + int rt_hw_pin_init(void) { #if defined(__HAL_RCC_GPIOA_CLK_ENABLE) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c index 4f17425d86..fa77bb8d91 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c @@ -168,11 +168,13 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) if (0) #endif { +#ifndef SOC_SERIES_STM32F0 prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * 2 / 10000) - 1; +#endif } else { @@ -190,7 +192,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) tim->Init.CounterMode = TIM_COUNTERMODE_DOWN; } tim->Init.RepetitionCounter = 0; -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; #endif if (HAL_TIM_Base_Init(tim) != HAL_OK) @@ -280,19 +282,23 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) if (0) #endif { #if defined(SOC_SERIES_STM32L4) val = HAL_RCC_GetPCLK2Freq() / freq; -#else +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) val = HAL_RCC_GetPCLK2Freq() * 2 / freq; #endif } else { +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) val = HAL_RCC_GetPCLK1Freq() * 2 / freq; +#elif defined(SOC_SERIES_STM32F0) + val = HAL_RCC_GetPCLK1Freq() / freq; +#endif } __HAL_TIM_SET_PRESCALER(tim, val - 1); @@ -393,7 +399,11 @@ void TIM8_UP_TIM13_IRQHandler(void) } #endif #ifdef BSP_USING_TIM14 -void TIM8_TRG_COM_TIM14_IRQHandler(void) +#if defined(SOC_SERIES_STM32F4) + void TIM8_TRG_COM_TIM14_IRQHandler(void) +#elif defined(SOC_SERIES_STM32F0) + void TIM14_IRQHandler(void) +#endif { /* enter interrupt */ rt_interrupt_enter(); @@ -413,7 +423,11 @@ void TIM1_BRK_TIM15_IRQHandler(void) } #endif #ifdef BSP_USING_TIM16 -void TIM1_UP_TIM16_IRQHandler(void) +#if defined(SOC_SERIES_STM32L4) + void TIM1_UP_TIM16_IRQHandler(void) +#elif defined(SOC_SERIES_STM32F0) + void TIM16_IRQHandler(void) +#endif { /* enter interrupt */ rt_interrupt_enter(); @@ -423,7 +437,11 @@ void TIM1_UP_TIM16_IRQHandler(void) } #endif #ifdef BSP_USING_TIM17 -void TIM1_TRG_COM_TIM17_IRQHandler(void) +#if defined(SOC_SERIES_STM32L4) + void TIM1_TRG_COM_TIM17_IRQHandler(void) +#elif defined(SOC_SERIES_STM32F0) + void TIM17_IRQHandler(void) +#endif { /* enter interrupt */ rt_interrupt_enter(); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c index 5fa290c1bb..0bc5aa314e 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c @@ -189,15 +189,17 @@ static rt_err_t drv_pwm_get(TIM_HandleTypeDef *htim, struct rt_pwm_configuration if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) if (0) #endif { +#ifndef SOC_SERIES_STM32F0 tim_clock = HAL_RCC_GetPCLK2Freq() * 2; +#endif } else { -#if defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) tim_clock = HAL_RCC_GetPCLK1Freq(); #else tim_clock = HAL_RCC_GetPCLK1Freq() * 2; @@ -232,15 +234,17 @@ static rt_err_t drv_pwm_set(TIM_HandleTypeDef *htim, struct rt_pwm_configuration if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) if (0) #endif { +#ifndef SOC_SERIES_STM32F0 tim_clock = HAL_RCC_GetPCLK2Freq() * 2; +#endif } else { -#if defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) tim_clock = HAL_RCC_GetPCLK1Freq(); #else tim_clock = HAL_RCC_GetPCLK1Freq() * 2; @@ -407,6 +411,9 @@ __exit: static void pwm_get_channel(void) { +#ifdef BSP_USING_PWM2_CH1 + stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 0; +#endif #ifdef BSP_USING_PWM2_CH4 stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 3; #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c index 94ac8d8df3..95b7cf10ad 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c @@ -5,8 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-27 zylx change to new framework - * 2018-12-12 greedyhao Porting for stm32f7xx + * 2018-11-27 zylx first version */ #include "board.h" @@ -21,14 +20,6 @@ #if defined(BSP_USING_QSPI) -#if defined (SOC_SERIES_STM32L4) -#define QUADSPI_DMA_IRQ DMA1_Channel5_IRQn -#define QUADSPI_DMA_IRQHandler DMA1_Channel5_IRQHandler -#elif defined (SOC_SERIES_STM32F7) -#define QUADSPI_DMA_IRQ DMA2_Stream2_IRQn -#define QUADSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler -#endif /* SOC_SERIES_STM32L4 */ - struct stm32_hw_spi_cs { uint16_t Pin; @@ -58,6 +49,9 @@ static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configu struct stm32_qspi_bus *qspi_bus = device->parent.bus->parent.user_data; rt_memset(&qspi_bus->QSPI_Handler, 0, sizeof(qspi_bus->QSPI_Handler)); + QSPI_HandleTypeDef QSPI_Handler_config = QSPI_BUS_CONFIG; + qspi_bus->QSPI_Handler = QSPI_Handler_config; + while (cfg->max_hz < HAL_RCC_GetHCLKFreq() / (i + 1)) { i++; @@ -84,14 +78,6 @@ static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configu /* flash size */ qspi_bus->QSPI_Handler.Init.FlashSize = POSITION_VAL(qspi_cfg->medium_size) - 1; - qspi_bus->QSPI_Handler.Instance = QUADSPI; - /* fifo threshold is 4 byte */ - qspi_bus->QSPI_Handler.Init.FifoThreshold = 4; - /* Sampling shift half a cycle */ - qspi_bus->QSPI_Handler.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE; - /* cs high time */ - qspi_bus->QSPI_Handler.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_4_CYCLE; - result = HAL_QSPI_Init(&qspi_bus->QSPI_Handler); if (result == HAL_OK) { @@ -104,34 +90,23 @@ static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configu #ifdef BSP_QSPI_USING_DMA /* QSPI interrupts must be enabled when using the HAL_QSPI_Receive_DMA */ - HAL_NVIC_SetPriority(QUADSPI_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(QUADSPI_IRQn); - HAL_NVIC_SetPriority(QUADSPI_DMA_IRQ, 0, 0); - HAL_NVIC_EnableIRQ(QUADSPI_DMA_IRQ); + HAL_NVIC_SetPriority(QSPI_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(QSPI_IRQn); + HAL_NVIC_SetPriority(QSPI_DMA_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(QSPI_DMA_IRQn); - /* init QSPI DMA */ - __HAL_RCC_DMA1_CLK_ENABLE(); + /* init QSPI DMA */ + QSPI_DMA_CLK_ENABLE; HAL_DMA_DeInit(qspi_bus->QSPI_Handler.hdma); -#if defined(SOC_SERIES_STM32F4) - qspi_bus->hdma_quadspi.Instance = DMA1_Channel5; - qspi_bus->hdma_quadspi.Init.Request = DMA_REQUEST_5; -#elif defined(SOC_SERIES_STM32F7) - qspi_bus->hdma_quadspi.Instance = DMA2_Stream2; - qspi_bus->hdma_quadspi.Init.channel = DMA_CHANNEL_11; -#endif - qspi_bus->hdma_quadspi.Init.Direction = DMA_PERIPH_TO_MEMORY; - qspi_bus->hdma_quadspi.Init.PeriphInc = DMA_PINC_DISABLE; - qspi_bus->hdma_quadspi.Init.MemInc = DMA_MINC_ENABLE; - qspi_bus->hdma_quadspi.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - qspi_bus->hdma_quadspi.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - qspi_bus->hdma_quadspi.Init.Mode = DMA_NORMAL; - qspi_bus->hdma_quadspi.Init.Priority = DMA_PRIORITY_LOW; + DMA_HandleTypeDef hdma_quadspi_config = QSPI_DMA_CONFIG; + qspi_bus->hdma_quadspi = hdma_quadspi_config; + if (HAL_DMA_Init(&qspi_bus->hdma_quadspi) != HAL_OK) { LOG_E("qspi dma init failed (%d)!", result); } - - __HAL_LINKDMA(&qspi_bus->QSPI_Handler,hdma,qspi_bus->hdma_quadspi); + + __HAL_LINKDMA(&qspi_bus->QSPI_Handler, hdma, qspi_bus->hdma_quadspi); #endif /* BSP_QSPI_USING_DMA */ return result; @@ -269,8 +244,8 @@ static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message #endif { len = length; -#ifdef BSP_QSPI_USING_DMA - while(qspi_bus->QSPI_Handler.RxXferCount != 0); +#ifdef BSP_QSPI_USING_DMA + while (qspi_bus->QSPI_Handler.RxXferCount != 0); #endif } else @@ -380,7 +355,7 @@ __exit: } #ifdef BSP_QSPI_USING_DMA -void QUADSPI_IRQHandler(void) +void QSPI_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); @@ -391,7 +366,7 @@ void QUADSPI_IRQHandler(void) rt_interrupt_leave(); } -void QUADSPI_DMA_IRQHandler(void) +void QSPI_DMA_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c index 0f6ac24dfe..66b0ca7bd9 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c @@ -110,9 +110,13 @@ static rt_err_t rt_rtc_config(struct rt_device *dev) #if defined(SOC_SERIES_STM32F1) RTC_Handler.Init.OutPut = RTC_OUTPUTSOURCE_NONE; RTC_Handler.Init.AsynchPrediv = RTC_AUTO_1_SECOND; -#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32L4) RTC_Handler.Init.AsynchPrediv = 0X7F; +#ifndef SOC_SERIES_STM32F0 RTC_Handler.Init.SynchPrediv = 0XFF; +#else + RTC_Handler.Init.SynchPrediv = 0x0130; +#endif RTC_Handler.Init.HourFormat = RTC_HOURFORMAT_24; RTC_Handler.Init.OutPut = RTC_OUTPUT_DISABLE; RTC_Handler.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c index 3294b89190..c2d7708575 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c @@ -19,12 +19,6 @@ #define LOG_TAG "drv.sdio" #include -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) -#define SDCARD_INSTANCE SDIO -#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) -#define SDCARD_INSTANCE SDMMC1 -#endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) */ - static struct stm32_sdio_config sdio_config = SDIO_BUS_CONFIG; static struct stm32_sdio_class sdio_obj; static struct rt_mmcsd_host *host; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c index 36cf7fa401..fd70be7d2b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c @@ -143,7 +143,11 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur uint32_t SPI_APB_CLOCK; +#ifdef SOC_SERIES_STM32F0 + SPI_APB_CLOCK = HAL_RCC_GetPCLK1Freq(); +#else SPI_APB_CLOCK = HAL_RCC_GetPCLK2Freq(); +#endif if (cfg->max_hz >= SPI_APB_CLOCK / 2) { @@ -202,7 +206,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur return RT_EIO; } -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0)|| defined(SOC_SERIES_STM32F7) SET_BIT(spi_handle->Instance->CR2, SPI_RXFIFO_THRESHOLD_HF); #endif @@ -356,7 +360,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * *(volatile rt_uint8_t *)(&spi_handle->Instance->DR) = data; /* receive data once */ -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F7) SET_BIT(spi_handle->Instance->CR2, SPI_RXFIFO_THRESHOLD_HF); #endif while (__HAL_SPI_GET_FLAG(spi_handle, SPI_FLAG_RXNE) == RESET); @@ -387,7 +391,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * *(volatile rt_uint16_t *)(&spi_handle->Instance->DR) = data; /* receive data once */ -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F7) SET_BIT(spi_handle->Instance->CR2, SPI_RXFIFO_THRESHOLD_HF); #endif while (__HAL_SPI_GET_FLAG(spi_handle, SPI_FLAG_RXNE) == RESET); @@ -757,5 +761,5 @@ int rt_hw_spi_init(void) } INIT_BOARD_EXPORT(rt_hw_spi_init); -#endif /* BSP_USING_SPI1 || BSP_USING_SPI2 || BSP_USING_SPI3 || BSP_USING_SPI4 || BSP_USING_SPI5 || BSP_USING_SPI6 */ +#endif /* BSP_USING_SPI1 || BSP_USING_SPI2 || BSP_USING_SPI3 || BSP_USING_SPI4 || BSP_USING_SPI5 */ #endif /* RT_USING_SPI */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index acf7222470..916d0ed2d2 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -23,13 +23,7 @@ /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ #endif -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) -#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG -#elif defined(SOC_SERIES_STM32F7) -#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_IT -#endif - -#ifdef BSP_UART_USING_DMA_RX +#ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial); #endif @@ -137,7 +131,7 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg) { struct stm32_uart *uart; -#ifdef BSP_UART_USING_DMA_RX +#ifdef RT_SERIAL_USING_DMA rt_ubase_t ctrl_arg = (rt_ubase_t)arg; #endif @@ -162,7 +156,7 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE); break; -#ifdef BSP_UART_USING_DMA_RX +#ifdef RT_SERIAL_USING_DMA case RT_DEVICE_CTRL_CONFIG: if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) { @@ -181,7 +175,7 @@ static int stm32_putc(struct rt_serial_device *serial, char c) uart = (struct stm32_uart *)serial->parent.user_data; UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC); -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) uart->handle.Instance->TDR = c; #else uart->handle.Instance->DR = c; @@ -201,7 +195,7 @@ static int stm32_getc(struct rt_serial_device *serial) ch = -1; if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) { -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) ch = uart->handle.Instance->RDR & 0xff; #else ch = uart->handle.Instance->DR & 0xff; @@ -226,7 +220,7 @@ static const struct rt_uart_ops stm32_uart_ops = static void uart_isr(struct rt_serial_device *serial) { struct stm32_uart *uart; -#ifdef BSP_UART_USING_DMA_RX +#ifdef RT_SERIAL_USING_DMA rt_size_t recv_total_index, recv_len; rt_base_t level; #endif @@ -244,7 +238,7 @@ static void uart_isr(struct rt_serial_device *serial) /* Clear RXNE interrupt flag */ UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE); } -#ifdef BSP_UART_USING_DMA_RX +#ifdef RT_SERIAL_USING_DMA else if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET)) { @@ -258,50 +252,37 @@ static void uart_isr(struct rt_serial_device *serial) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); } - - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_IDLE); - rt_uint32_t ch; -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) - ch = uart->handle.Instance->RDR; -#else - ch = uart->handle.Instance->DR; -#endif - ch = ch; + __HAL_UART_CLEAR_IDLEFLAG(&uart->handle); } #endif else { if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET) { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_ORE); + __HAL_UART_CLEAR_OREFLAG(&uart->handle); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET) { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_NE); + __HAL_UART_CLEAR_NEFLAG(&uart->handle); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET) { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_FE); + __HAL_UART_CLEAR_FEFLAG(&uart->handle); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET) { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_PE); + __HAL_UART_CLEAR_PEFLAG(&uart->handle); } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS); - } -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) +#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD); } -#elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBDF) != RESET) +#endif + if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET) { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBDF); + UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS); } -#endif if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE); @@ -314,40 +295,6 @@ static void uart_isr(struct rt_serial_device *serial) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE); } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_IDLE); - } -#if defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TEACK) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TEACK); - } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_SBKF) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_SBKF); - } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CMF) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CMF); - } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_BUSY) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_BUSY); - } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ABRF) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_ABRF); - } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ABRE) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_ABRE); - } - if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTSIF) != RESET) - { - UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTSIF); - } -#endif } } @@ -362,7 +309,7 @@ void USART1_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#if defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR) +#if defined(RT_SERIAL_USING_DMA) && defined(USART1_RX_DMA_ISR) void USART1_RX_DMA_ISR(void) { /* enter interrupt */ @@ -373,7 +320,7 @@ void USART1_RX_DMA_ISR(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR) */ +#endif /* defined(RT_SERIAL_USING_DMA) && defined(USART1_RX_DMA_ISR) */ #endif /* BSP_USING_UART1 */ #if defined(BSP_USING_UART2) @@ -387,7 +334,7 @@ void USART2_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#if defined(BSP_UART_USING_DMA_RX) && defined(USART2_RX_DMA_ISR) +#if defined(RT_SERIAL_USING_DMA) && defined(USART2_RX_DMA_ISR) void USART2_RX_DMA_ISR(void) { /* enter interrupt */ @@ -398,7 +345,7 @@ void USART2_RX_DMA_ISR(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART2_RX_DMA_ISR) */ +#endif /* defined(RT_SERIAL_USING_DMA) && defined(USART2_RX_DMA_ISR) */ #endif /* BSP_USING_UART2 */ #if defined(BSP_USING_UART3) @@ -412,7 +359,7 @@ void USART3_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#if defined(BSP_UART_USING_DMA_RX) && defined(USART3_RX_DMA_ISR) +#if defined(RT_SERIAL_USING_DMA) && defined(USART3_RX_DMA_ISR) void USART3_RX_DMA_ISR(void) { /* enter interrupt */ @@ -437,7 +384,7 @@ void UART4_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#if defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR) +#if defined(RT_SERIAL_USING_DMA) && defined(USART1_RX_DMA_ISR) void USART4_RX_DMA_ISR(void) { /* enter interrupt */ @@ -462,7 +409,7 @@ void UART5_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#if defined(BSP_UART_USING_DMA_RX) && defined(USART5_RX_DMA_ISR) +#if defined(RT_SERIAL_USING_DMA) && defined(USART5_RX_DMA_ISR) void USART5_RX_DMA_ISR(void) { /* enter interrupt */ @@ -473,10 +420,10 @@ void USART5_RX_DMA_ISR(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART5_RX_DMA_ISR) */ +#endif /* defined(RT_SERIAL_USING_DMA) && defined(USART5_RX_DMA_ISR) */ #endif /* BSP_USING_UART5*/ -#ifdef BSP_UART_USING_DMA_RX +#ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial) { RT_ASSERT(serial != RT_NULL); @@ -488,7 +435,7 @@ static void stm32_dma_config(struct rt_serial_device *serial) { rt_uint32_t tmpreg= 0x00U; -#if defined(SOC_SERIES_STM32F1) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHBENR, uart->config->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rcc); @@ -502,7 +449,7 @@ static void stm32_dma_config(struct rt_serial_device *serial) __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle); -#if defined(SOC_SERIES_STM32F1) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) uart->dma.handle.Instance = uart->config->dma.Instance; #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) uart->dma.handle.Instance = uart->config->dma.Instance; @@ -544,10 +491,10 @@ static void stm32_dma_config(struct rt_serial_device *serial) __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE); /* enable rx irq */ - HAL_NVIC_SetPriority(uart->config->dma_irq, 1, 0); + HAL_NVIC_SetPriority(uart->config->dma_irq, 0, 0); HAL_NVIC_EnableIRQ(uart->config->dma_irq); - HAL_NVIC_SetPriority(uart->config->irq_type, 0, 0); + HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0); HAL_NVIC_EnableIRQ(uart->config->irq_type); LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance); @@ -598,7 +545,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); } } -#endif /* BSP_UART_USING_DMA_RX */ +#endif /* RT_SERIAL_USING_DMA */ int rt_hw_usart_init(void) { @@ -619,7 +566,7 @@ int rt_hw_usart_init(void) /* register UART device */ result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX -#if defined(BSP_UART_USING_DMA_RX) +#if defined(RT_SERIAL_USING_DMA) | RT_DEVICE_FLAG_DMA_RX #endif ,&uart_obj[i]); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h index 9fed7b8f98..7f6a359826 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h @@ -18,12 +18,19 @@ int rt_hw_usart_init(void); -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) + +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) #define DMA_INSTANCE_TYPE DMA_Channel_TypeDef #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) #define DMA_INSTANCE_TYPE DMA_Stream_TypeDef #endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */ +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) +#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG +#elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) +#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_IT +#endif + /* stm32 config class */ struct stm32_uart_config { @@ -69,7 +76,7 @@ struct stm32_uart const struct stm32_uart_config *config; -#ifdef BSP_UART_USING_DMA_RX +#ifdef RT_SERIAL_USING_DMA struct { DMA_HandleTypeDef handle; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c b/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c index ee150fe85d..e7c22e55ab 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c @@ -26,7 +26,7 @@ static rt_err_t wdt_init(rt_watchdog_t *wdt) hiwdg.Init.Prescaler = IWDG_PRESCALER_32; hiwdg.Init.Reload = 0x00000FFE; -#if defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) hiwdg.Init.Window = 0x00000FFF; #endif -- GitLab