From a8828eee89f9311d1dad5a3d0f1cc6822957b979 Mon Sep 17 00:00:00 2001 From: ardafu Date: Tue, 29 Sep 2015 11:53:23 +0800 Subject: [PATCH] [bsp][stm32f746-disco] Add support of IAR tool chain 1. Add IAR project template and link scripts. Add missing CXX configuration for IAR tool chain in rtconfg.py. 2. Modify all link scripts, Using ITCM interface.(Changing flash start address from 0x0800_0000 to 0x0020_0000). --- bsp/stm32f7-disco/rtconfig.py | 16 +- bsp/stm32f7-disco/rtthread-stm32f7xx.icf | 33 + bsp/stm32f7-disco/rtthread-stm32f7xx.ld | 2 +- bsp/stm32f7-disco/rtthread-stm32f7xx.sct | 4 +- bsp/stm32f7-disco/template.ewp | 1919 ++++++++++++++++++++++ 5 files changed, 1965 insertions(+), 9 deletions(-) create mode 100644 bsp/stm32f7-disco/rtthread-stm32f7xx.icf create mode 100644 bsp/stm32f7-disco/template.ewp diff --git a/bsp/stm32f7-disco/rtconfig.py b/bsp/stm32f7-disco/rtconfig.py index 8fd7dd9094..0741e1931c 100644 --- a/bsp/stm32f7-disco/rtconfig.py +++ b/bsp/stm32f7-disco/rtconfig.py @@ -19,10 +19,8 @@ elif CROSS_TOOL == 'keil': PLATFORM = 'armcc' EXEC_PATH = r'C:/Keil_v5' elif CROSS_TOOL == 'iar': - print '================ERROR============================' - print 'Not support iar yet!' - print '=================================================' - exit(0) + PLATFORM = 'iar' + IAR_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.2' if os.getenv('RTT_EXEC_PATH'): EXEC_PATH = os.getenv('RTT_EXEC_PATH') @@ -99,6 +97,7 @@ elif PLATFORM == 'armcc': elif PLATFORM == 'iar': # toolchains CC = 'iccarm' + CXX = 'iccarm' AS = 'iasmarm' AR = 'iarchive' LINK = 'ilinkarm' @@ -123,18 +122,23 @@ elif PLATFORM == 'iar': CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"' CFLAGS += ' -Ol' CFLAGS += ' --use_c++_inline' - + CFLAGS += ' --silent' + AFLAGS = '' AFLAGS += ' -s+' AFLAGS += ' -w+' AFLAGS += ' -r' AFLAGS += ' --cpu Cortex-M7' AFLAGS += ' --fpu None' - + AFLAGS += ' -S' + LFLAGS = ' --config rtthread-stm32f7xx.icf' LFLAGS += ' --redirect _Printf=_PrintfTiny' LFLAGS += ' --redirect _Scanf=_ScanfSmall' LFLAGS += ' --entry __iar_program_start' + LFLAGS += ' --silent' + + CXXFLAGS = CFLAGS EXEC_PATH = IAR_PATH + '/arm/bin/' POST_ACTION = '' diff --git a/bsp/stm32f7-disco/rtthread-stm32f7xx.icf b/bsp/stm32f7-disco/rtthread-stm32f7xx.icf new file mode 100644 index 0000000000..73cbc1c601 --- /dev/null +++ b/bsp/stm32f7-disco/rtthread-stm32f7xx.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x00200000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x00200000; +define symbol __ICFEDIT_region_ROM_end__ = 0x002FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, block CSTACK, block HEAP }; +keep { section FSymTab }; +keep { section VSymTab }; +keep { section .rti_fn* }; diff --git a/bsp/stm32f7-disco/rtthread-stm32f7xx.ld b/bsp/stm32f7-disco/rtthread-stm32f7xx.ld index a841a10714..16f747b83a 100644 --- a/bsp/stm32f7-disco/rtthread-stm32f7xx.ld +++ b/bsp/stm32f7-disco/rtthread-stm32f7xx.ld @@ -6,7 +6,7 @@ /* Program Entry, set to mark it as "used" and avoid gc */ MEMORY { - CODE (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */ + CODE (rx) : ORIGIN = 0x00200000, LENGTH = 1024k /* 1024KB flash */ DATA (rw) : ORIGIN = 0x20010000, LENGTH = 256k /* 256K sram */ } ENTRY(Reset_Handler) diff --git a/bsp/stm32f7-disco/rtthread-stm32f7xx.sct b/bsp/stm32f7-disco/rtthread-stm32f7xx.sct index a084b410ca..f9e5ff5279 100644 --- a/bsp/stm32f7-disco/rtthread-stm32f7xx.sct +++ b/bsp/stm32f7-disco/rtthread-stm32f7xx.sct @@ -2,8 +2,8 @@ ; *** Scatter-Loading Description File generated by uVision *** ; ************************************************************* -LR_IROM1 0x08000000 0x00100000 { ; load region size_region - ER_IROM1 0x08000000 0x00100000 { ; load address = execution address +LR_IROM1 0x00200000 0x00100000 { ; load region size_region + ER_IROM1 0x00200000 0x00100000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) diff --git a/bsp/stm32f7-disco/template.ewp b/bsp/stm32f7-disco/template.ewp new file mode 100644 index 0000000000..5f300148cc --- /dev/null +++ b/bsp/stm32f7-disco/template.ewp @@ -0,0 +1,1919 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 24 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 24 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + + -- GitLab