diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h index 938d291ee96a73b3c96ca38224c3bb58b37f4b02..0c16ccd066573a1a86ef5980416a0fbb6f2a5c53 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h @@ -36,6 +36,12 @@ extern "C" { #define SPI1_TX_DMA_INSTANCE DMA1_Channel3 #define SPI1_TX_DMA_REQUEST DMA_REQUEST_1 #define SPI1_TX_DMA_IRQ DMA1_Channel3_IRQn +#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) +#define UART3_DMA_RX_IRQHandler DMA1_Channel3_IRQHandler +#define UART3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define UART3_RX_DMA_INSTANCE DMA1_Channel3 +#define UART3_RX_DMA_REQUEST DMA_REQUEST_2 +#define UART3_RX_DMA_IRQ DMA1_Channel3_IRQn #endif /* DMA1 channel4 */ @@ -45,6 +51,12 @@ extern "C" { #define UART1_TX_DMA_INSTANCE DMA1_Channel4 #define UART1_TX_DMA_REQUEST DMA_REQUEST_2 #define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn +#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE) +#define SPI2_DMA_RX_IRQHandler DMA1_Channel4_IRQHandler +#define SPI2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define SPI2_RX_DMA_INSTANCE DMA1_Channel4 +#define SPI2_RX_DMA_REQUEST DMA_REQUEST_1 +#define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn #endif /* DMA1 channel5 */ @@ -60,9 +72,22 @@ extern "C" { #define QSPI_DMA_INSTANCE DMA1_Channel5 #define QSPI_DMA_REQUEST DMA_REQUEST_5 #define QSPI_DMA_IRQ DMA1_Channel5_IRQn +#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE) +#define SPI2_DMA_TX_IRQHandler DMA1_Channel5_IRQHandler +#define SPI2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define SPI2_TX_DMA_INSTANCE DMA1_Channel5 +#define SPI2_TX_DMA_REQUEST DMA_REQUEST_1 +#define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn #endif /* DMA1 channel6 */ +#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) +#define UART2_DMA_RX_IRQHandler DMA1_Channel6_IRQHandler +#define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define UART2_RX_DMA_INSTANCE DMA1_Channel6 +#define UART2_RX_DMA_REQUEST DMA_REQUEST_2 +#define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn +#endif /* DMA1 channel7 */ @@ -126,6 +151,12 @@ extern "C" { #define QSPI_DMA_INSTANCE DMA2_Channel7 #define QSPI_DMA_REQUEST DMA_REQUEST_3 #define QSPI_DMA_IRQ DMA2_Channel7_IRQn +#elif defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE) +#define LPUART1_DMA_RX_IRQHandler DMA2_Channel7_IRQHandler +#define LPUART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN +#define LPUART1_RX_DMA_INSTANCE DMA2_Channel7 +#define LPUART1_RX_DMA_REQUEST DMA_REQUEST_4 +#define LPUART1_RX_DMA_IRQ DMA2_Channel7_IRQn #endif #ifdef __cplusplus diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h new file mode 100644 index 0000000000000000000000000000000000000000..71811dba84621cb6edc71f882d04eeec6c48f40d --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-12-13 BalanceTWK first version + */ + +#ifndef __SDIO_CONFIG_H__ +#define __SDIO_CONFIG_H__ + +#include +#include "stm32l4xx_hal.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef BSP_USING_SDIO +#define SDIO_BUS_CONFIG \ + { \ + .Instance = SDMMC1, \ + .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \ + .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \ + .dma_rx.Instance = DMA2_Channel4, \ + .dma_rx.request = DMA_REQUEST_7, \ + .dma_rx.dma_irq = DMA2_Channel4_IRQn, \ + .dma_tx.Instance = DMA2_Channel5, \ + .dma_tx.request = DMA_REQUEST_7, \ + .dma_tx.dma_irq = DMA2_Channel5_IRQn, \ + } + +#endif + +#ifdef __cplusplus +} +#endif + +#endif /*__SDIO_CONFIG_H__ */ + + + diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h index c9c248d6d473e14eb2e603386fe64c70641fb3d0..72f28404bdcacf5a76f73007888461d02522fcfe 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h @@ -52,21 +52,38 @@ extern "C" { #endif /* BSP_SPI1_RX_USING_DMA */ #ifdef BSP_USING_SPI2 +#ifndef SPI2_BUS_CONFIG #define SPI2_BUS_CONFIG \ { \ .Instance = SPI2, \ .bus_name = "spi2", \ - .dma_rx.dma_rcc = RCC_AHB1ENR_DMA1EN, \ - .dma_tx.dma_rcc = RCC_AHB1ENR_DMA1EN, \ - .dma_rx.Instance = DMA1_Channel4, \ - .dma_rx.request = DMA_REQUEST_1, \ - .dma_rx.dma_irq = DMA1_Channel4_IRQn, \ - .dma_tx.Instance = DMA1_Channel5, \ - .dma_tx.request = DMA_REQUEST_1, \ - .dma_tx.dma_irq = DMA1_Channel5_IRQn, \ } +#endif /* SPI2_BUS_CONFIG */ +#endif /* BSP_USING_SPI2 */ -#endif +#ifdef BSP_SPI2_TX_USING_DMA +#ifndef SPI2_TX_DMA_CONFIG +#define SPI2_TX_DMA_CONFIG \ + { \ + .dma_rcc = SPI2_TX_DMA_RCC, \ + .Instance = SPI2_TX_DMA_INSTANCE, \ + .request = SPI2_TX_DMA_REQUEST, \ + .dma_irq = SPI2_TX_DMA_IRQ, \ + } +#endif /* SPI2_TX_DMA_CONFIG */ +#endif /* BSP_SPI2_TX_USING_DMA */ + +#ifdef BSP_SPI2_RX_USING_DMA +#ifndef SPI2_RX_DMA_CONFIG +#define SPI2_RX_DMA_CONFIG \ + { \ + .dma_rcc = SPI2_RX_DMA_RCC, \ + .Instance = SPI2_RX_DMA_INSTANCE, \ + .request = SPI2_RX_DMA_REQUEST, \ + .dma_irq = SPI2_RX_DMA_IRQ, \ + } +#endif /* SPI2_RX_DMA_CONFIG */ +#endif /* BSP_SPI2_RX_USING_DMA */ #ifdef BSP_USING_SPI3 #define SPI3_BUS_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h index 3abb984371597f57b99335bc87e14370bb1ea1ad..71d61065c90ee81d0301de8e3345854cc27389df 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h @@ -17,6 +17,28 @@ extern "C" { #endif +#if defined(BSP_USING_LPUART1) +#ifndef LPUART1_CONFIG +#define LPUART1_CONFIG \ + { \ + .name = "lpuart1", \ + .Instance = LPUART1, \ + .irq_type = LPUART1_IRQn, \ + } +#endif /* LPUART1_CONFIG */ +#if defined(BSP_LPUART1_RX_USING_DMA) +#ifndef LPUART1_DMA_CONFIG +#define LPUART1_DMA_CONFIG \ + { \ + .Instance = LPUART1_RX_DMA_INSTANCE, \ + .request = LPUART1_RX_DMA_REQUEST, \ + .dma_rcc = LPUART1_RX_DMA_RCC, \ + .dma_irq = LPUART1_RX_DMA_IRQ, \ + } +#endif /* LPUART1_DMA_CONFIG */ +#endif /* BSP_LPUART1_RX_USING_DMA */ +#endif /* BSP_USING_LPUART1 */ + #if defined(BSP_USING_UART1) #ifndef UART1_CONFIG #define UART1_CONFIG \ @@ -63,6 +85,29 @@ extern "C" { #endif /* UART2_DMA_CONFIG */ #endif /* BSP_UART2_RX_USING_DMA */ +#if defined(BSP_USING_UART3) +#ifndef UART3_CONFIG +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .Instance = USART3, \ + .irq_type = USART3_IRQn, \ + } +#endif /* UART3_CONFIG */ +#endif /* BSP_USING_UART3 */ + +#if defined(BSP_UART3_RX_USING_DMA) +#ifndef UART3_DMA_CONFIG +#define UART3_DMA_CONFIG \ + { \ + .Instance = UART3_RX_DMA_INSTANCE, \ + .request = UART3_RX_DMA_REQUEST, \ + .dma_rcc = UART3_RX_DMA_RCC, \ + .dma_irq = UART3_RX_DMA_IRQ, \ + } +#endif /* UART3_DMA_CONFIG */ +#endif /* BSP_UART3_RX_USING_DMA */ + #ifdef __cplusplus } #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h index 2c1abd9ce54c6cb6b358f9f27675138a8cc6e3ff..b6549e09e3ae17050736110d9a84567fbf443f02 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h @@ -60,6 +60,7 @@ extern "C" { #include "l4/qspi_config.h" #include "l4/adc_config.h" #include "l4/tim_config.h" +#include "l4/sdio_config.h" #include "l4/pwm_config.h" #elif defined(SOC_SERIES_STM32G0) #include "g0/dma_config.h" diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c index 84eccb519be71e3f6f31bb4c41a1306da740f9ed..335b97da1c44eee711717b90d7b1ea9e7e745ea2 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c @@ -190,13 +190,13 @@ static void rthw_sdio_wait_completed(struct rthw_sdio *sdio) cmd->cmd_code, cmd->arg, data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-', - data ? data->blks * data->blksize : 0, - data ? data->blksize : 0 - ); + data ? data->blks * data->blksize : 0, + data ? data->blksize : 0 + ); } } else -{ + { cmd->err = RT_EOK; LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); } @@ -278,9 +278,9 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg) resp_type(cmd) == RESP_R6 ? "R6" : "", resp_type(cmd) == RESP_R7 ? "R7" : "", data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-', - data ? data->blks * data->blksize : 0, - data ? data->blksize : 0 - ); + data ? data->blks * data->blksize : 0, + data ? data->blksize : 0 + ); /* config cmd reg */ reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE; @@ -293,7 +293,7 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg) /* config data reg */ if (data != RT_NULL) -{ + { rt_uint32_t dir = 0; rt_uint32_t size = data->blks * data->blksize; int order; @@ -700,6 +700,25 @@ void SD_LowLevel_DMA_TxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize) HAL_DMA_DeInit(&sdio_obj.dma.handle_tx); HAL_DMA_Init(&sdio_obj.dma.handle_tx); + HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); + +#elif defined(SOC_SERIES_STM32L4) + static uint32_t size = 0; + size += BufferSize * 4; + sdio_obj.cfg = &sdio_config; + sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_tx.Init.Request = sdio_config.dma_tx.request; + sdio_obj.dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_tx.Init.Mode = DMA_NORMAL; + sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM; + + HAL_DMA_DeInit(&sdio_obj.dma.handle_tx); + HAL_DMA_Init(&sdio_obj.dma.handle_tx); + HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); #else static uint32_t size = 0; @@ -736,38 +755,54 @@ void SD_LowLevel_DMA_RxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize) { #if defined(SOC_SERIES_STM32F1) sdio_obj.cfg = &sdio_config; - sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance; - sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY; - sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE; - sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE; - sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM; - - HAL_DMA_DeInit(&sdio_obj.dma.handle_tx); - HAL_DMA_Init(&sdio_obj.dma.handle_tx); - - HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); + sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM; + + HAL_DMA_DeInit(&sdio_obj.dma.handle_rx); + HAL_DMA_Init(&sdio_obj.dma.handle_rx); + + HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize); +#elif defined(SOC_SERIES_STM32L4) + sdio_obj.cfg = &sdio_config; + sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_rx.Init.Request = sdio_config.dma_tx.request; + sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.Mode = DMA_NORMAL; + sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_LOW; + + HAL_DMA_DeInit(&sdio_obj.dma.handle_rx); + HAL_DMA_Init(&sdio_obj.dma.handle_rx); + + HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize); #else sdio_obj.cfg = &sdio_config; - sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance; - sdio_obj.dma.handle_tx.Init.Channel = sdio_config.dma_tx.channel; - sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY; - sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE; - sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE; - sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.Mode = DMA_PFCTRL; - sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM; - sdio_obj.dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; - sdio_obj.dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - sdio_obj.dma.handle_tx.Init.MemBurst = DMA_MBURST_INC4; - sdio_obj.dma.handle_tx.Init.PeriphBurst = DMA_PBURST_INC4; - - HAL_DMA_DeInit(&sdio_obj.dma.handle_tx); - HAL_DMA_Init(&sdio_obj.dma.handle_tx); - - HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); + sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_rx.Init.Channel = sdio_config.dma_tx.channel; + sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.Mode = DMA_PFCTRL; + sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM; + sdio_obj.dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; + sdio_obj.dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + sdio_obj.dma.handle_rx.Init.MemBurst = DMA_MBURST_INC4; + sdio_obj.dma.handle_rx.Init.PeriphBurst = DMA_PBURST_INC4; + + HAL_DMA_DeInit(&sdio_obj.dma.handle_rx); + HAL_DMA_Init(&sdio_obj.dma.handle_rx); + + HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize); #endif } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c index 819b3b1da0a9b759eefed0a196a40f98a5f74fee..af89ae703abdbb1719de3d0e33af89b0ff0d176e 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c @@ -18,7 +18,7 @@ #define LOG_TAG "drv.i2c" #include -#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) +#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4) #error "Please define at least one BSP_USING_I2Cx" /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ #endif @@ -34,6 +34,9 @@ static const struct stm32_soft_i2c_config soft_i2c_config[] = #ifdef BSP_USING_I2C3 I2C3_BUS_CONFIG, #endif +#ifdef BSP_USING_I2C4 + I2C4_BUS_CONFIG, +#endif }; static struct stm32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])]; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h index e87eec8201bd07cdf913f0e45294eb107d3dcafd..31cba68f92d66065ae0af91f19e1dc5b318b7d1a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h @@ -55,7 +55,15 @@ struct stm32_i2c .bus_name = "i2c3", \ } #endif - + +#ifdef BSP_USING_I2C4 +#define I2C4_BUS_CONFIG \ + { \ + .scl = BSP_I2C4_SCL_PIN, \ + .sda = BSP_I2C4_SDA_PIN, \ + .bus_name = "i2c4", \ + } +#endif int rt_hw_i2c_init(void); #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index 3bc78acfa0eb1476587500b0fd32b6a26a583ddb..83d479a41377848a089649f87fac4f06cc6028b7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -432,7 +432,7 @@ void UART5_DMA_RX_IRQHandler(void) #endif /* BSP_USING_UART5*/ #if defined(BSP_USING_LPUART1) -void USART3_4_LPUART1_IRQHandler(void) +void LPUART1_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); @@ -442,7 +442,19 @@ void USART3_4_LPUART1_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif +#if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) +void LPUART1_DMA_RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */ +#endif /* BSP_USING_LPUART1*/ #ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial) @@ -597,6 +609,11 @@ static void stm32_uart_get_dma_config(void) static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG; uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx; #endif +#ifdef BSP_LPUART1_RX_USING_DMA + uart_obj[LPUART1_INDEX].uart_dma_flag = 1; + static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG; + uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx; +#endif } int rt_hw_usart_init(void) diff --git a/bsp/stm32/libraries/STM32L4xx_HAL/SConscript b/bsp/stm32/libraries/STM32L4xx_HAL/SConscript index 5d6f0d9032101dc53e65fe1c14c95294a311da9f..baeda8c18d91e1342a5b10abe28e7638ec8e6bda 100644 --- a/bsp/stm32/libraries/STM32L4xx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32L4xx_HAL/SConscript @@ -73,6 +73,7 @@ if GetDepend(['RT_USING_WDT']): if GetDepend(['RT_USING_SDIO']): src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c'] src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c'] + src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c'] if GetDepend(['RT_USING_AUDIO']): src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c']