diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c index a05be7ce6ba32407d3b1362f502d8aabee191a65..2f724de7187cebdde82299913c2d955d77dbd36b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c @@ -12,8 +12,8 @@ #ifdef BSP_USING_ON_CHIP_FLASH #include "drv_config.h" -#include "drv_flash.h" - +#include "drv_flash.h" + #if defined(PKG_USING_FAL) #include "fal.h" #endif @@ -53,8 +53,8 @@ static uint32_t GetPage(uint32_t Addr) static uint32_t GetBank(uint32_t Addr) { uint32_t bank = 0; -#if defined (STM32L432xx) - bank = FLASH_BANK_1; +#ifndef FLASH_BANK_2 + bank = FLASH_BANK_1; #else if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) { @@ -135,7 +135,7 @@ int stm32_flash_write(rt_uint32_t addr, const uint8_t *buf, size_t size) LOG_E("ERROR: write outrange flash size! addr is (0x%p)\n", (void*)(addr + size)); return -RT_EINVAL; } - + if(addr % 8 != 0) { LOG_E("write addr must be 8-byte alignment"); diff --git a/bsp/stm32/stm32l452-st-nucleo/board/Kconfig b/bsp/stm32/stm32l452-st-nucleo/board/Kconfig index e757acf26d3bdfe8a1e28aff9acca5ebe61d4eea..a0c9e1f00954b2040d6ffc90a65aeca7d850077d 100644 --- a/bsp/stm32/stm32l452-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l452-st-nucleo/board/Kconfig @@ -29,8 +29,8 @@ menu "On-chip Peripheral Drivers" bool "Enable UART1 RX DMA" depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA default n - - config BSP_USING_UART2 + + config BSP_USING_UART2 bool "Enable UART2" default y @@ -60,7 +60,9 @@ menu "On-chip Peripheral Drivers" select BSP_SPI1_TX_USING_DMA default n endif - + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n menuconfig BSP_USING_I2C1 bool "Enable I2C1 BUS (software simulation)" default n diff --git a/bsp/stm32/stm32l452-st-nucleo/board/SConscript b/bsp/stm32/stm32l452-st-nucleo/board/SConscript index ab57c2310ab057ee0eba44a0bd2f4df576082f14..cdc93c9ac81e5e721faaea05550197b616b10116 100644 --- a/bsp/stm32/stm32l452-st-nucleo/board/SConscript +++ b/bsp/stm32/stm32l452-st-nucleo/board/SConscript @@ -14,6 +14,7 @@ CubeMX_Config/Src/stm32l4xx_hal_msp.c path = [cwd] path += [cwd + '/CubeMX_Config/Inc'] +path += [cwd + '/ports'] startup_path_prefix = SDK_LIB diff --git a/bsp/stm32/stm32l452-st-nucleo/board/ports/fal_cfg.h b/bsp/stm32/stm32l452-st-nucleo/board/ports/fal_cfg.h new file mode 100644 index 0000000000000000000000000000000000000000..db782a599163687b7cd83ceac3ce8c41b74936a0 --- /dev/null +++ b/bsp/stm32/stm32l452-st-nucleo/board/ports/fal_cfg.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-12-5 SummerGift first version + */ + +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include + +#if defined(BSP_USING_ON_CHIP_FLASH) +extern const struct fal_flash_dev stm32_onchip_flash; +#endif /* BSP_USING_ON_CHIP_FLASH */ + +/* ========================= Device Configuration ========================== */ +#ifdef BSP_USING_ON_CHIP_FLASH +#define ONCHIP_FLASH_DEV &stm32_onchip_flash, +#else +#define ONCHIP_FLASH_DEV +#endif /* BSP_USING_ON_CHIP_FLASH */ + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ +{ \ + ONCHIP_FLASH_DEV \ +} + +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG + +#ifdef BSP_USING_ON_CHIP_FLASH +#define ONCHIP_FLASH_PATITION {FAL_PART_MAGIC_WROD, "app", "onchip_flash", 0, 496 * 1024, 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash", 496* 1024, 16 * 1024, 0}, +#else +#define ONCHIP_FLASH_PATITION +#endif + +/* partition table */ +#define FAL_PART_TABLE \ +{ \ + ONCHIP_FLASH_PATITION \ +} +#endif /* FAL_PART_HAS_TABLE_CFG */ + +#endif /* _FAL_CFG_H_ */