From 96fc6dfae06727da8766a71397dc6285e003dd39 Mon Sep 17 00:00:00 2001 From: kenneth Date: Thu, 25 Nov 2021 16:06:21 +0800 Subject: [PATCH] =?UTF-8?q?fix=EF=BC=9Aliteos-m=20arch=E7=9B=AE=E5=BD=95?= =?UTF-8?q?=E8=B0=83=E6=95=B4=E5=90=8C=E6=AD=A5=E4=BF=AE=E6=94=B9=E7=9B=B8?= =?UTF-8?q?=E5=85=B3=E6=96=87=E6=A1=A3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 修复liteos-m arch目录调整同步修改相关文档;修复工具链gcc、iar笔误。 close #I4HYAX Signed-off-by: kenneth --- en/device-dev/kernel/kernel-mini-overview.md | 4 +-- .../porting/porting-chip-kernel-overview.md | 28 +++++++++---------- .../device-dev/kernel/kernel-mini-overview.md | 4 +-- .../porting/porting-chip-kernel-overview.md | 28 +++++++++---------- 4 files changed, 32 insertions(+), 32 deletions(-) diff --git a/en/device-dev/kernel/kernel-mini-overview.md b/en/device-dev/kernel/kernel-mini-overview.md index e727b225c1..0e58d09e73 100644 --- a/en/device-dev/kernel/kernel-mini-overview.md +++ b/en/device-dev/kernel/kernel-mini-overview.md @@ -33,9 +33,9 @@ The CPU architecture includes two layers: general architecture definition layer

Header file location

-

kernel/arch/include

+

arch/include

-

kernel/arch/<arch>/<arch>/<toolchain>/

+

arch/<arch>/<arch>/<toolchain>/

Header file name

diff --git a/en/device-dev/porting/porting-chip-kernel-overview.md b/en/device-dev/porting/porting-chip-kernel-overview.md index 8f6702a151..9941b2bc5c 100644 --- a/en/device-dev/porting/porting-chip-kernel-overview.md +++ b/en/device-dev/porting/porting-chip-kernel-overview.md @@ -6,7 +6,7 @@ ## Porting Scenario -The chip architecture adaptation process is optional. If the particular chip architecture is supported in the **liteos\_m/kernel/arch** directory, you can directly implement the board adaptation. Otherwise, chip architecture porting is required. +The chip architecture adaptation process is optional. If the particular chip architecture is supported in the **liteos\_m/arch** directory, you can directly implement the board adaptation. Otherwise, chip architecture porting is required. ## Directory Specifications @@ -27,22 +27,22 @@ The directory structure of the kernel is described as follows: ``` . +├── arch --- Code of the kernel instruction architecture layer +│ ├── arm --- Code of the ARM32 architecture +│ │ ├── cortex-m3 --- Code of the Cortex-M3 architecture +│ │ │ ├── iar --- Implementation of the IAR toolchain +│ │ │ ├── keil --- Implementation of the Keil toolchain +│ │ │ └── xxx --- Implementation of the particular toolchain +│ │ └── cortex-m4 --- Code of the Cortex-M4 architecture +│ │ ├── iar --- Implementation of the IAR toolchain +│ │ ├── keil --- Implementation of the Keil toolchain +│ │ └── xxx --- Implementation of the particular toolchain +│ ├── include --- Header files that declare the APIs required, kernel-independent +│ └── risc-v --- RISK_V architecture +│ └── gcc --- Implementation of the GCC toolchain ├── components --- Components available for porting and header files exposed externally ├── kal --- APIs exposed externally, including CMSIS APIs and part of POSIX APIs ├── kernel --- Code for defining the minimum kernel function set -│ ├── arch --- Code of the kernel instruction architecture layer -│ │ ├── arm --- Code of the ARM32 architecture -│ │ │ ├── cortex-m3 --- Code of the Cortex-M3 architecture -│ │ │ │ ├── iar --- Implementation of the IAR toolchain -│ │ │ │ ├── keil --- Implementation of the Keil toolchain -│ │ │ │ └── xxx --- Implementation of the particular toolchain -│ │ │ └── cortex-m4 --- Code of the Cortex-M4 architecture -│ │ │ ├── iar --- Implementation of the IAR toolchain -│ │ │ ├── keil --- Implementation of the Keil toolchain -│ │ │ └── xxx --- Implementation of the particular toolchain -│ │ ├── include --- Header files that declare the APIs required, kernel-independent -│ │ └── risc-v --- RISK_V architecture -│ │ └── gcc --- Implementation of the IAR toolchain │ ├── include --- Code for defining the minimum kernel function set │ └── src --- Code for implementing the minimum kernel function set └──utils --- Basic code diff --git a/zh-cn/device-dev/kernel/kernel-mini-overview.md b/zh-cn/device-dev/kernel/kernel-mini-overview.md index 0966779d95..cb0c2d42c1 100644 --- a/zh-cn/device-dev/kernel/kernel-mini-overview.md +++ b/zh-cn/device-dev/kernel/kernel-mini-overview.md @@ -29,9 +29,9 @@ CPU体系架构分为通用架构定义和特定架构定义两层，通用架

头文件位置

-

kernel/arch/include

+

arch/include

-

kernel/arch/<arch>/<arch>/<toolchain>/

+

arch/<arch>/<arch>/<toolchain>/

头文件命名

diff --git a/zh-cn/device-dev/porting/porting-chip-kernel-overview.md b/zh-cn/device-dev/porting/porting-chip-kernel-overview.md index c05a50ef67..e2bc9d0558 100644 --- a/zh-cn/device-dev/porting/porting-chip-kernel-overview.md +++ b/zh-cn/device-dev/porting/porting-chip-kernel-overview.md @@ -6,7 +6,7 @@ ## 移植场景 -芯片架构适配是可选过程，如果在liteos\_m/kernel/arch目录下已经支持对应芯片架构，则可以跳过芯片架构适配，进行单板适配过程，否则需要进行芯片架构移植工作。 +芯片架构适配是可选过程，如果在liteos\_m/arch目录下已经支持对应芯片架构，则可以跳过芯片架构适配，进行单板适配过程，否则需要进行芯片架构移植工作。 ## 目录规范 @@ -25,22 +25,22 @@ ``` . +├── arch --- 内核指令架构层代码 +│ ├── arm --- arm32架构的代码 +│ │ ├── cortex-m3 --- cortex-m3架构的代码 +│ │ │ ├── iar --- iar编译工具链实现 +│ │ │ ├── keil --- keil编译工具链实现 +│ │ │ └── xxx --- xxx编译工具链实现 +│ │ └── cortex-m4 --- cortex-m4架构的代码 +│ │ ├── iar --- iar编译工具链实现 +│ │ ├── keil --- keil编译工具链实现 +│ │ └── xxx --- xxx编译工具链实现 +│ ├── include --- 所有的arch需要实现的函数定义，内核依赖 +│ └── risc-v --- risk-v架构 +│ └── gcc --- gcc编译工具链实现 ├── components --- 移植可选组件，依赖内核，单独对外提供头文件 ├── kal --- 内核抽象层，提供内核对外接口，当前支持cmsis接口和部分posix接口 ├── kernel --- 内核最小功能集代码 -│ ├── arch --- 内核指令架构层代码 -│ │ ├── arm --- arm32架构的代码 -│ │ │ ├── cortex-m3 --- cortex-m3架构的代码 -│ │ │ │ ├── iar --- iar编译工具链实现 -│ │ │ │ ├── keil --- keil编译工具链实现 -│ │ │ │ └── xxx --- xxx编译工具链实现 -│ │ │ └── cortex-m4 --- cortex-m4架构的代码 -│ │ │ ├── iar --- iar编译工具链实现 -│ │ │ ├── keil --- keil编译工具链实现 -│ │ │ └── xxx --- xxx编译工具链实现 -│ │ ├── include --- 所有的arch需要实现的函数定义，内核依赖 -│ │ └── risc-v --- risk-v架构 -│ │ └── gcc --- iar编译工具链实现 │ ├── include --- 内核最小功能集代码 │ └── src --- 内核最小功能集代码 └──utils --- 基础代码，作为依赖的最底层，被系统依赖 -- GitLab