提交 4a836e2a 编写于 作者: 1 1

添加说明,更改芯片名称

上级 91ffe90a
# FM33LC026 #
## 1. 简介
[FM33LC026](开发者论坛:http://www.fmdevelopers.com.cn/forum.php)是复旦微的MCU,使用 Cortex-M0 内核。该BSP基于FM026开发调试,LC0XX系列通用,重新选择型号即可,可能需要改变部分引脚定义。
FM33LC0xxx系列低功耗MCU,基于ARM Cortex-M0内核,集成大容量嵌入式闪存,具备丰富的模拟和数字外设,并具有优异的低功耗特性。FM33LC0xxx系列包含三个子系列,分别为支持无晶振USB FS device的FM33LC0xxU系列,和不支持USB的FM33LC0xxN系列,以及FM33LC0x4NR系列。
主要资源如下:
| 硬件 | 描述 |
| -- | -- |
|CPU| Cortex-M0|
|主频| 64MHz |
|SRAM| 24KB |
|Flash| 128KB |
## 2. 编译说明
只适配了MDK5,使用MDK5编译。
| IDE/编译器 | 已测试版本 |
| -- | -- |
| MDK5 | MDK5.27 |
## 3. 烧写及执行
下载程序:使用 J-Link 工具。
### 3.1 配置和仿真
工程已经默认使能了RT-Thread UART驱动。若想进一步配置工程请
使用ENV工具。
## 4. 驱动支持情况及计划
| 驱动 | 支持情况 | 备注 |
| ------ | ---- | :------: |
| UART | 支持 | USART0/1/4/5 |
## 5. 联系人信息
维护人:
- [jqj96](https://github.com/jqj96)
## 6. 参考
......@@ -391,11 +391,6 @@
<Group>
<GroupName>CPU</GroupName>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
......@@ -406,6 +401,11 @@
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
......@@ -427,14 +427,14 @@
<FilePath>..\..\components\drivers\serial\serial.c</FilePath>
</File>
<File>
<FileName>ringbuffer.c</FileName>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
<FilePath>..\..\components\drivers\src\pipe.c</FilePath>
</File>
<File>
<FileName>ringblk_buf.c</FileName>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
<FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
</File>
<File>
<FileName>waitqueue.c</FileName>
......@@ -442,24 +442,24 @@
<FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
</File>
<File>
<FileName>workqueue.c</FileName>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
<FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\completion.c</FilePath>
<FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
</File>
<File>
<FileName>pipe.c</FileName>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\pipe.c</FilePath>
<FilePath>..\..\components\drivers\src\completion.c</FilePath>
</File>
<File>
<FileName>dataqueue.c</FileName>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
<FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
</File>
</Files>
</Group>
......@@ -506,11 +506,6 @@
<FileType>1</FileType>
<FilePath>..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\msh.c</FilePath>
</File>
<File>
<FileName>finsh_vm.c</FileName>
<FileType>1</FileType>
......@@ -521,6 +516,11 @@
<FileType>1</FileType>
<FilePath>..\..\components\finsh\shell.c</FilePath>
</File>
<File>
<FileName>finsh_token.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
</File>
<File>
<FileName>finsh_var.c</FileName>
<FileType>1</FileType>
......@@ -547,9 +547,9 @@
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
</File>
<File>
<FileName>finsh_token.c</FileName>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
<FilePath>..\..\components\finsh\msh.c</FilePath>
</File>
<File>
<FileName>finsh_init.c</FileName>
......@@ -602,9 +602,19 @@
<GroupName>Kernel</GroupName>
<Files>
<File>
<FileName>components.c</FileName>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\components.c</FilePath>
<FilePath>..\..\src\thread.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\kservice.c</FilePath>
</File>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
......@@ -612,14 +622,14 @@
<FilePath>..\..\src\mempool.c</FilePath>
</File>
<File>
<FileName>timer.c</FileName>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\timer.c</FilePath>
<FilePath>..\..\src\ipc.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\kservice.c</FilePath>
<FilePath>..\..\src\timer.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
......@@ -632,14 +642,14 @@
<FilePath>..\..\src\object.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\thread.c</FilePath>
<FilePath>..\..\src\components.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\ipc.c</FilePath>
<FilePath>..\..\src\scheduler.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
......@@ -651,16 +661,6 @@
<FileType>1</FileType>
<FilePath>..\..\src\mem.c</FilePath>
</File>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\scheduler.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
......
// File: STM32F0x1_0x2_0x8.dbgconf
// Version: 1.0.0
// Note: refer to STM32F0x1/STM32F0x2/STM32F0x8 Reference manual (RM0091)
// refer to STM32F031x4/x6, STM32F051x4/x6/x8, STM32F071x8/xB datasheets
// STM32F091xB/xC, STM32F042x4/x6, STM32F072x8/xB, STM32F038x6 datasheets
// STM32F048x6, STM32F058x8, STM32F078xB, STM32F098xC datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// </h>
DbgMCU_CR = 0x00000006;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.25> DBG_CAN_STOP <i> CAN stopped when core is halted
// <o.21> DBG_I2C1_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM17_STOP <i> TIM17 counter stopped when core is halted
// <o.17> DBG_TIM16_STOP <i> TIM16 counter stopped when core is halted
// <o.16> DBG_TIM15_STOP <i> TIM15 counter stopped when core is halted
// <o.11> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
* 2020-03-05 redoc support stm32f103vg
*
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
/**
* @brief Gets the page of a given address
* @param Addr: Address of the FLASH Memory
* @retval The page of a given address
*/
static uint32_t GetPage(uint32_t addr)
{
uint32_t page = 0;
page = RT_ALIGN_DOWN(addr, FLASH_PAGE_SIZE);
return page;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -RT_EINVAL;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t end_addr = addr + size;
if (addr % 4 != 0)
{
LOG_E("write addr must be 4-byte alignment");
return -RT_EINVAL;
}
if ((end_addr) > STM32_FLASH_END_ADDRESS)
{
LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
while (addr < end_addr)
{
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, addr, *((rt_uint32_t *)buf)) == HAL_OK)
{
if (*(rt_uint32_t *)addr != *(rt_uint32_t *)buf)
{
result = -RT_ERROR;
break;
}
addr += 4;
buf += 4;
}
else
{
result = -RT_ERROR;
break;
}
}
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
return size;
}
/**
* Erase data on flash with bank.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param bank flash bank
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase_bank(uint32_t bank, rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
uint32_t PAGEError = 0;
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
/* Fill EraseInit structure*/
EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
EraseInitStruct.PageAddress = GetPage(addr);
EraseInitStruct.NbPages = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
EraseInitStruct.Banks = bank;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
return size;
}
/**
* Erase data on flash .
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
#if defined(FLASH_BANK2_END)
rt_err_t result = RT_EOK;
rt_uint32_t addr_bank1 = 0;
rt_uint32_t size_bank1 = 0;
rt_uint32_t addr_bank2 = 0;
rt_uint32_t size_bank2 = 0;
if((addr + size) <= FLASH_BANK1_END)
{
addr_bank1 = addr;
size_bank1 = size;
size_bank2 = 0;
}
else if(addr > FLASH_BANK1_END)
{
size_bank1 = 0;
addr_bank2 = addr;
size_bank2 = size;
}
else
{
addr_bank1 = addr;
size_bank1 = FLASH_BANK1_END + 1 - addr_bank1;
addr_bank2 = FLASH_BANK1_END + 1;
size_bank2 = addr + size - (FLASH_BANK1_END + 1);
}
if(size_bank1)
{
LOG_D("bank1: addr (0x%p), size %d", (void *)addr_bank1, size_bank1);
if(size_bank1 != stm32_flash_erase_bank(FLASH_BANK_1, addr_bank1, size_bank1))
{
result = -RT_ERROR;
goto __exit;
}
}
if(size_bank2)
{
LOG_D("bank2: addr (0x%p), size %d", (void *)addr_bank2, size_bank2);
if(size_bank2 != stm32_flash_erase_bank(FLASH_BANK_2, addr_bank2, size_bank2))
{
result = -RT_ERROR;
goto __exit;
}
}
__exit:
if(result != RT_EOK)
{
return result;
}
return size_bank1 + size_bank2;
#else
return stm32_flash_erase_bank(FLASH_BANK_1, addr, size);
#endif
}
#if defined(PKG_USING_FAL)
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash = { "onchip_flash", STM32_FLASH_START_ADRESS, STM32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} };
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_erase(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
/* Base address of the Flash sectors Bank 1 */
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */
/**
* @brief Gets the sector of a given address
* @param None
* @retval The sector of a given address
*/
static rt_uint32_t GetSector(rt_uint32_t Address)
{
rt_uint32_t sector = 0;
if((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0))
{
sector = FLASH_SECTOR_0;
}
else if((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1))
{
sector = FLASH_SECTOR_1;
}
else if((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2))
{
sector = FLASH_SECTOR_2;
}
else if((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3))
{
sector = FLASH_SECTOR_3;
}
else if((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4))
{
sector = FLASH_SECTOR_4;
}
else if((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5))
{
sector = FLASH_SECTOR_5;
}
else if((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6))
{
sector = FLASH_SECTOR_6;
}
else if((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7))
{
sector = FLASH_SECTOR_7;
}
#if defined(FLASH_SECTOR_8)
else if((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8))
{
sector = FLASH_SECTOR_8;
}
#endif
#if defined(FLASH_SECTOR_9)
else if((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9))
{
sector = FLASH_SECTOR_9;
}
#endif
#if defined(FLASH_SECTOR_10)
else if((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10))
{
sector = FLASH_SECTOR_10;
}
#endif
#if defined(FLASH_SECTOR_11)
else /* (Address < FLASH_END_ADDR) && (Address >= ADDR_FLASH_SECTOR_11) */
{
sector = FLASH_SECTOR_11;
}
#endif
return sector;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void*)(addr + size));
return -1;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t end_addr = addr + size;
if ((end_addr) > STM32_FLASH_END_ADDRESS)
{
LOG_E("write outrange flash size! addr is (0x%p)", (void*)(addr + size));
return -RT_EINVAL;
}
if (size < 1)
{
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
for (size_t i = 0; i < size; i++, addr++, buf++)
{
/* write data to flash */
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, addr, (rt_uint64_t)(*buf)) == HAL_OK)
{
if (*(rt_uint8_t *)addr != *buf)
{
result = -RT_ERROR;
break;
}
}
else
{
result = -RT_ERROR;
break;
}
}
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
return size;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t FirstSector = 0, NbOfSectors = 0;
rt_uint32_t SECTORError = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void*)(addr + size));
return -RT_EINVAL;
}
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
/* Get the 1st sector to erase */
FirstSector = GetSector(addr);
/* Get the number of sector to erase from 1st sector*/
NbOfSectors = GetSector(addr + size - 1) - FirstSector + 1;
/* Fill EraseInit structure*/
EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3;
EraseInitStruct.Sector = FirstSector;
EraseInitStruct.NbSectors = NbOfSectors;
if (HAL_FLASHEx_Erase(&EraseInitStruct, (uint32_t *)&SECTORError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void*)addr, size);
return result;
}
#if defined(PKG_USING_FAL)
static int fal_flash_read_16k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_64k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write_16k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_64k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase_16k(long offset, size_t size);
static int fal_flash_erase_64k(long offset, size_t size);
static int fal_flash_erase_128k(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash_16k = { "onchip_flash_16k", STM32_FLASH_START_ADRESS_16K, FLASH_SIZE_GRANULARITY_16K, (16 * 1024), {NULL, fal_flash_read_16k, fal_flash_write_16k, fal_flash_erase_16k} };
const struct fal_flash_dev stm32_onchip_flash_64k = { "onchip_flash_64k", STM32_FLASH_START_ADRESS_64K, FLASH_SIZE_GRANULARITY_64K, (64 * 1024), {NULL, fal_flash_read_64k, fal_flash_write_64k, fal_flash_erase_64k} };
const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS_128K, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} };
static int fal_flash_read_16k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_16k.addr + offset, buf, size);
}
static int fal_flash_read_64k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_64k.addr + offset, buf, size);
}
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_write_16k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_16k.addr + offset, buf, size);
}
static int fal_flash_write_64k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_64k.addr + offset, buf, size);
}
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_erase_16k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_16k.addr + offset, size);
}
static int fal_flash_erase_64k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_64k.addr + offset, size);
}
static int fal_flash_erase_128k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_128k.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
/* Base address of the Flash sectors Bank 1 */
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */
/* Base address of the Flash sectors Bank 2 */
#define ADDR_FLASH_SECTOR_12 ((uint32_t)0x08100000) /* Base @ of Sector 0, 16 Kbytes */
#define ADDR_FLASH_SECTOR_13 ((uint32_t)0x08104000) /* Base @ of Sector 1, 16 Kbytes */
#define ADDR_FLASH_SECTOR_14 ((uint32_t)0x08108000) /* Base @ of Sector 2, 16 Kbytes */
#define ADDR_FLASH_SECTOR_15 ((uint32_t)0x0810C000) /* Base @ of Sector 3, 16 Kbytes */
#define ADDR_FLASH_SECTOR_16 ((uint32_t)0x08110000) /* Base @ of Sector 4, 64 Kbytes */
#define ADDR_FLASH_SECTOR_17 ((uint32_t)0x08120000) /* Base @ of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_18 ((uint32_t)0x08140000) /* Base @ of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_19 ((uint32_t)0x08160000) /* Base @ of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_20 ((uint32_t)0x08180000) /* Base @ of Sector 8, 128 Kbytes */
#define ADDR_FLASH_SECTOR_21 ((uint32_t)0x081A0000) /* Base @ of Sector 9, 128 Kbytes */
#define ADDR_FLASH_SECTOR_22 ((uint32_t)0x081C0000) /* Base @ of Sector 10, 128 Kbytes */
#define ADDR_FLASH_SECTOR_23 ((uint32_t)0x081E0000) /* Base @ of Sector 11, 128 Kbytes */
/**
* @brief Gets the sector of a given address
* @param None
* @retval The sector of a given address
*/
static rt_uint32_t GetSector(rt_uint32_t Address)
{
rt_uint32_t sector = 0;
if((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0))
{
sector = FLASH_SECTOR_0;
}
else if((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1))
{
sector = FLASH_SECTOR_1;
}
else if((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2))
{
sector = FLASH_SECTOR_2;
}
else if((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3))
{
sector = FLASH_SECTOR_3;
}
else if((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4))
{
sector = FLASH_SECTOR_4;
}
else if((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5))
{
sector = FLASH_SECTOR_5;
}
else if((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6))
{
sector = FLASH_SECTOR_6;
}
else if((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7))
{
sector = FLASH_SECTOR_7;
}
#if defined(FLASH_SECTOR_8)
else if((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8))
{
sector = FLASH_SECTOR_8;
}
#endif
#if defined(FLASH_SECTOR_9)
else if((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9))
{
sector = FLASH_SECTOR_9;
}
#endif
#if defined(FLASH_SECTOR_10)
else if((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10))
{
sector = FLASH_SECTOR_10;
}
#endif
#if defined(FLASH_SECTOR_11)
else if((Address < ADDR_FLASH_SECTOR_12) && (Address >= ADDR_FLASH_SECTOR_11))
{
sector = FLASH_SECTOR_11;
}
#endif
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
else if((Address < ADDR_FLASH_SECTOR_13) && (Address >= ADDR_FLASH_SECTOR_12))
{
sector = FLASH_SECTOR_12;
}
else if((Address < ADDR_FLASH_SECTOR_14) && (Address >= ADDR_FLASH_SECTOR_13))
{
sector = FLASH_SECTOR_13;
}
else if((Address < ADDR_FLASH_SECTOR_15) && (Address >= ADDR_FLASH_SECTOR_14))
{
sector = FLASH_SECTOR_14;
}
else if((Address < ADDR_FLASH_SECTOR_16) && (Address >= ADDR_FLASH_SECTOR_15))
{
sector = FLASH_SECTOR_15;
}
else if((Address < ADDR_FLASH_SECTOR_17) && (Address >= ADDR_FLASH_SECTOR_16))
{
sector = FLASH_SECTOR_16;
}
else if((Address < ADDR_FLASH_SECTOR_18) && (Address >= ADDR_FLASH_SECTOR_17))
{
sector = FLASH_SECTOR_17;
}
else if((Address < ADDR_FLASH_SECTOR_19) && (Address >= ADDR_FLASH_SECTOR_18))
{
sector = FLASH_SECTOR_18;
}
else if((Address < ADDR_FLASH_SECTOR_20) && (Address >= ADDR_FLASH_SECTOR_19))
{
sector = FLASH_SECTOR_19;
}
else if((Address < ADDR_FLASH_SECTOR_21) && (Address >= ADDR_FLASH_SECTOR_20))
{
sector = FLASH_SECTOR_20;
}
else if((Address < ADDR_FLASH_SECTOR_22) && (Address >= ADDR_FLASH_SECTOR_21))
{
sector = FLASH_SECTOR_21;
}
else if((Address < ADDR_FLASH_SECTOR_23) && (Address >= ADDR_FLASH_SECTOR_22))
{
sector = FLASH_SECTOR_22;
}
else /* (Address < FLASH_END_ADDR) && (Address >= ADDR_FLASH_SECTOR_23) */
{
sector = FLASH_SECTOR_23;
}
#endif
return sector;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void*)(addr + size));
return -1;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t end_addr = addr + size;
rt_uint32_t written_size = 0;
rt_uint32_t write_size = 0;
if ((end_addr) > STM32_FLASH_END_ADDRESS)
{
LOG_E("write outrange flash size! addr is (0x%p)", (void*)(addr + size));
return -RT_EINVAL;
}
if (size < 1)
{
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
while (written_size < size)
{
if (((addr + written_size) % 4 == 0) && (size - written_size >= 4))
{
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, addr + written_size, *((rt_uint32_t *)(buf + written_size))) == HAL_OK)
{
if (*(rt_uint32_t *)(addr + written_size) != *(rt_uint32_t *)(buf + written_size))
{
result = -RT_ERROR;
break;
}
}
else
{
result = -RT_ERROR;
break;
}
write_size = 4;
}
else if (((addr + written_size) % 2 == 0) && (size - written_size >= 2))
{
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, addr + written_size, *((rt_uint16_t *)(buf + written_size))) == HAL_OK)
{
if (*(rt_uint16_t *)(addr + written_size) != *(rt_uint16_t *)(buf + written_size))
{
result = -RT_ERROR;
break;
}
}
else
{
result = -RT_ERROR;
break;
}
write_size = 2;
}
else
{
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, addr + written_size, *((rt_uint8_t *)(buf + written_size))) == HAL_OK)
{
if (*(rt_uint8_t *)(addr + written_size) != *(rt_uint8_t *)(buf + written_size))
{
result = -RT_ERROR;
break;
}
}
else
{
result = -RT_ERROR;
break;
}
write_size = 1;
}
written_size += write_size;
}
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
return size;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t FirstSector = 0, NbOfSectors = 0;
rt_uint32_t SECTORError = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void*)(addr + size));
return -RT_EINVAL;
}
if (size < 1)
{
return -RT_EINVAL;
}
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
/* Get the 1st sector to erase */
FirstSector = GetSector(addr);
/* Get the number of sector to erase from 1st sector*/
NbOfSectors = GetSector(addr + size - 1) - FirstSector + 1;
/* Fill EraseInit structure*/
EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3;
EraseInitStruct.Sector = FirstSector;
EraseInitStruct.NbSectors = NbOfSectors;
if (HAL_FLASHEx_Erase(&EraseInitStruct, (uint32_t *)&SECTORError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void*)addr, size);
return size;
}
#if defined(PKG_USING_FAL)
static int fal_flash_read_16k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_64k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write_16k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_64k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase_16k(long offset, size_t size);
static int fal_flash_erase_64k(long offset, size_t size);
static int fal_flash_erase_128k(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash_16k = { "onchip_flash_16k", STM32_FLASH_START_ADRESS_16K, FLASH_SIZE_GRANULARITY_16K, (16 * 1024), {NULL, fal_flash_read_16k, fal_flash_write_16k, fal_flash_erase_16k} };
const struct fal_flash_dev stm32_onchip_flash_64k = { "onchip_flash_64k", STM32_FLASH_START_ADRESS_64K, FLASH_SIZE_GRANULARITY_64K, (64 * 1024), {NULL, fal_flash_read_64k, fal_flash_write_64k, fal_flash_erase_64k} };
const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS_128K, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} };
static int fal_flash_read_16k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_16k.addr + offset, buf, size);
}
static int fal_flash_read_64k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_64k.addr + offset, buf, size);
}
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_write_16k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_16k.addr + offset, buf, size);
}
static int fal_flash_write_64k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_64k.addr + offset, buf, size);
}
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_erase_16k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_16k.addr + offset, size);
}
static int fal_flash_erase_64k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_64k.addr + offset, size);
}
static int fal_flash_erase_128k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_128k.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
* 2019-3-2 jinsheng add Macro judgment
* 2020-1-6 duminmin support single bank mode
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
#define ADDR_FLASH_SECTOR_0 ((rt_uint32_t)0x08000000) /* Base address of Sector 0, 32 Kbytes */
#define ADDR_FLASH_SECTOR_1 ((rt_uint32_t)0x08008000) /* Base address of Sector 1, 32 Kbytes */
#define ADDR_FLASH_SECTOR_2 ((rt_uint32_t)0x08010000) /* Base address of Sector 2, 32 Kbytes */
#define ADDR_FLASH_SECTOR_3 ((rt_uint32_t)0x08018000) /* Base address of Sector 3, 32 Kbytes */
#define ADDR_FLASH_SECTOR_4 ((rt_uint32_t)0x08020000) /* Base address of Sector 4, 128 Kbytes */
#define ADDR_FLASH_SECTOR_5 ((rt_uint32_t)0x08040000) /* Base address of Sector 5, 256 Kbytes */
#define ADDR_FLASH_SECTOR_6 ((rt_uint32_t)0x08080000) /* Base address of Sector 6, 256 Kbytes */
#define ADDR_FLASH_SECTOR_7 ((rt_uint32_t)0x080C0000) /* Base address of Sector 7, 256 Kbytes */
#define ADDR_FLASH_SECTOR_8 ((rt_uint32_t)0x08100000) /* Base address of Sector 8, 256 Kbytes */
#define ADDR_FLASH_SECTOR_9 ((rt_uint32_t)0x08140000) /* Base address of Sector 9, 256 Kbytes */
#define ADDR_FLASH_SECTOR_10 ((rt_uint32_t)0x08180000) /* Base address of Sector 10, 256 Kbytes */
#define ADDR_FLASH_SECTOR_11 ((rt_uint32_t)0x081C0000) /* Base address of Sector 11, 256 Kbytes */
/**
* @brief Gets the sector of a given address
* @param None
* @retval The sector of a given address
*/
static rt_uint32_t GetSector(rt_uint32_t Address)
{
uint32_t sector = 0;
#if defined (FLASH_OPTCR_nDBANK)
FLASH_OBProgramInitTypeDef OBInit;
uint32_t nbank = 0;
//get duel bank ability:nDBANK(Bit29)
HAL_FLASHEx_OBGetConfig(&OBInit);
nbank = ((OBInit.USERConfig & 0x20000000U) >> 29);
//1:single bank mode
if (1 == nbank)
{
if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0))
{
sector = FLASH_SECTOR_0;
}
else if ((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1))
{
sector = FLASH_SECTOR_1;
}
else if ((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2))
{
sector = FLASH_SECTOR_2;
}
else if ((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3))
{
sector = FLASH_SECTOR_3;
}
else if ((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4))
{
sector = FLASH_SECTOR_4;
}
else if ((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5))
{
sector = FLASH_SECTOR_5;
}
else if ((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6))
{
sector = FLASH_SECTOR_6;
}
else if ((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7))
{
sector = FLASH_SECTOR_7;
}
else if ((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8))
{
sector = FLASH_SECTOR_8;
}
else if ((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9))
{
sector = FLASH_SECTOR_9;
}
else if ((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10))
{
sector = FLASH_SECTOR_10;
}
else
{
sector = FLASH_SECTOR_11;
}
}
else //0:dual bank mode
{
LOG_E("rtthread doesn't support duel bank mode yet!");
RT_ASSERT(0);
}
#else //no dual bank ability
if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0))
{
sector = FLASH_SECTOR_0;
}
else if ((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1))
{
sector = FLASH_SECTOR_1;
}
else if ((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2))
{
sector = FLASH_SECTOR_2;
}
else if ((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3))
{
sector = FLASH_SECTOR_3;
}
else if ((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4))
{
sector = FLASH_SECTOR_4;
}
else if ((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5))
{
sector = FLASH_SECTOR_5;
}
else if ((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6))
{
sector = FLASH_SECTOR_6;
}
else if ((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7))
{
sector = FLASH_SECTOR_7;
}
else if ((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8))
{
sector = FLASH_SECTOR_8;
}
else if ((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9))
{
sector = FLASH_SECTOR_9;
}
else if ((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10))
{
sector = FLASH_SECTOR_10;
}
else
{
sector = FLASH_SECTOR_11;
}
#endif
return sector;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -1;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t end_addr = addr + size;
if ((end_addr) > STM32_FLASH_END_ADDRESS)
{
LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -RT_EINVAL;
}
if (size < 1)
{
return -RT_EINVAL;
}
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR);
for (size_t i = 0; i < size; i++, addr++, buf++)
{
/* write data to flash */
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, addr, (rt_uint64_t)(*buf)) == HAL_OK)
{
if (*(rt_uint8_t *)addr != *buf)
{
result = -RT_ERROR;
break;
}
}
else
{
result = -RT_ERROR;
break;
}
}
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
return size;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t FirstSector = 0, NbOfSectors = 0;
rt_uint32_t SECTORError = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
return -RT_EINVAL;
}
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
/* Get the 1st sector to erase */
FirstSector = GetSector(addr);
/* Get the number of sector to erase from 1st sector*/
NbOfSectors = GetSector(addr + size) - FirstSector + 1;
/* Fill EraseInit structure*/
EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3;
EraseInitStruct.Sector = FirstSector;
EraseInitStruct.NbSectors = NbOfSectors;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &SECTORError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
return size;
}
#if defined(PKG_USING_FAL)
#define FLASH_SIZE_GRANULARITY_32K (4 * 32 * 1024)
#define FLASH_SIZE_GRANULARITY_128K (128 * 1024)
#define FLASH_SIZE_GRANULARITY_256K (7 * 256 *1024)
#define STM32_FLASH_START_ADRESS_32K (STM32_FLASH_START_ADRESS)
#define STM32_FLASH_START_ADRESS_128K (STM32_FLASH_START_ADRESS_32K + FLASH_SIZE_GRANULARITY_32K)
#define STM32_FLASH_START_ADRESS_256K (STM32_FLASH_START_ADRESS_128K + FLASH_SIZE_GRANULARITY_128K)
static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_256k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_256k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase_32k(long offset, size_t size);
static int fal_flash_erase_128k(long offset, size_t size);
static int fal_flash_erase_256k(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash_32k = { "onchip_flash_32k", STM32_FLASH_START_ADRESS_32K, FLASH_SIZE_GRANULARITY_32K, (32 * 1024), {NULL, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} };
const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS_128K, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} };
const struct fal_flash_dev stm32_onchip_flash_256k = { "onchip_flash_256k", STM32_FLASH_START_ADRESS_256K, FLASH_SIZE_GRANULARITY_256K, (256 * 1024), {NULL, fal_flash_read_256k, fal_flash_write_256k, fal_flash_erase_256k} };
static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_32k.addr + offset, buf, size);
}
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_read_256k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_256k.addr + offset, buf, size);
}
static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_32k.addr + offset, buf, size);
}
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_write_256k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_256k.addr + offset, buf, size);
}
static int fal_flash_erase_32k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_32k.addr + offset, size);
}
static int fal_flash_erase_128k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_128k.addr + offset, size);
}
static int fal_flash_erase_256k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_256k.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-27 NU-LL first version
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
// #define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
/**
* @brief Gets the page of a given address
* @param Addr: Address of the FLASH Memory
* @retval The page of a given address
*/
static uint32_t GetPage(uint32_t addr)
{
uint32_t page = 0;
page = RT_ALIGN_DOWN(addr-STM32_FLASH_START_ADRESS, FLASH_PAGE_SIZE)/FLASH_PAGE_SIZE;
return page;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -RT_EINVAL;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const uint8_t *buf, size_t size)
{
size_t i, j;
rt_err_t result = 0;
rt_uint64_t write_data = 0, temp_data = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: write outrange flash size! addr is (0x%p)\n", (void*)(addr + size));
return -RT_EINVAL;
}
if(addr % 8 != 0)
{
LOG_E("write addr must be 8-byte alignment");
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGSERR);
if (size < 1)
{
return -RT_ERROR;
}
for (i = 0; i < size;)
{
if ((size - i) < 8)
{
for (j = 0; (size - i) > 0; i++, j++)
{
temp_data = *buf;
write_data = (write_data) | (temp_data << 8 * j);
buf ++;
}
}
else
{
for (j = 0; j < 8; j++, i++)
{
temp_data = *buf;
write_data = (write_data) | (temp_data << 8 * j);
buf ++;
}
}
/* write data */
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, addr, write_data) == HAL_OK)
{
/* Check the written value */
if (*(uint64_t*)addr != write_data)
{
LOG_E("ERROR: write data != read data\n");
result = -RT_ERROR;
goto __exit;
}
}
else
{
result = -RT_ERROR;
goto __exit;
}
temp_data = 0;
write_data = 0;
addr += 8;
}
__exit:
HAL_FLASH_Lock();
if (result != 0)
{
return result;
}
return size;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
uint32_t PAGEError = 0;
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
/* Fill EraseInit structure*/
EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
EraseInitStruct.Page = GetPage(addr);
EraseInitStruct.NbPages = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
return size;
}
#if defined(PKG_USING_FAL)
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash = { "onchip_flash", STM32_FLASH_START_ADRESS, STM32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} };
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_erase(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
* 2019-3-2 jinsheng add Macro judgment
* 2020-1-6 duminmin support single bank mode
* 2020-5-17 yufanyufan77 support support H7
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
#define ADDR_FLASH_SECTOR_0 ((rt_uint32_t)0x08000000) /* Base address of Sector 0, 128 Kbytes */
#define ADDR_FLASH_SECTOR_1 ((rt_uint32_t)0x08020000) /* Base address of Sector 1, 128 Kbytes */
#define ADDR_FLASH_SECTOR_2 ((rt_uint32_t)0x08040000) /* Base address of Sector 2, 128 Kbytes */
#define ADDR_FLASH_SECTOR_3 ((rt_uint32_t)0x08060000) /* Base address of Sector 3, 128 Kbytes */
#define ADDR_FLASH_SECTOR_4 ((rt_uint32_t)0x08080000) /* Base address of Sector 4, 128 Kbytes */
#define ADDR_FLASH_SECTOR_5 ((rt_uint32_t)0x080A0000) /* Base address of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_6 ((rt_uint32_t)0x080C0000) /* Base address of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_7 ((rt_uint32_t)0x080E0000) /* Base address of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_8 ((rt_uint32_t)0x08100000) /* Base address of Sector 8, 128 Kbytes */
#define FLASH_SECTOR_0 0U /* Sector Number 0 */
#define FLASH_SECTOR_1 1U /* Sector Number 1 */
#define FLASH_SECTOR_2 2U /* Sector Number 2 */
#define FLASH_SECTOR_3 3U /* Sector Number 3 */
#define FLASH_SECTOR_4 4U /* Sector Number 4 */
#define FLASH_SECTOR_5 5U /* Sector Number 5 */
#define FLASH_SECTOR_6 6U /* Sector Number 6 */
#define FLASH_SECTOR_7 7U /* Sector Number 7 */
/**
* @brief Gets the sector of a given address
* @param addr flash address
* @param flash bank
* @param flash sector
* @retval The sector of a given address
*/
static void GetSector(rt_uint32_t Address,uint32_t* bank,uint32_t* sector)
{
#if defined (FLASH_OPTCR_nDBANK)
FLASH_OBProgramInitTypeDef OBInit;
uint32_t nbank = 0;
/* get duel bank ability:nDBANK(Bit29) */
HAL_FLASHEx_OBGetConfig(&OBInit);
nbank = ((OBInit.USERConfig & 0x20000000U) >> 29);
/* 1:single bank mode */
if (1 == nbank)
{
if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0))
{
sector = FLASH_SECTOR_0;
}
else if ((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1))
{
sector = FLASH_SECTOR_1;
}
else if ((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2))
{
sector = FLASH_SECTOR_2;
}
else if ((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3))
{
sector = FLASH_SECTOR_3;
}
else if ((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4))
{
sector = FLASH_SECTOR_4;
}
else if ((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5))
{
sector = FLASH_SECTOR_5;
}
else if ((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6))
{
sector = FLASH_SECTOR_6;
}
else if ((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7))
{
sector = FLASH_SECTOR_7;
}
else if ((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8))
{
sector = FLASH_SECTOR_8;
}
else if ((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9))
{
sector = FLASH_SECTOR_9;
}
else if ((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10))
{
sector = FLASH_SECTOR_10;
}
else
{
sector = FLASH_SECTOR_11;
}
}
else /* 0:dual bank mode */
{
LOG_E("rtthread doesn't support duel bank mode yet!");
RT_ASSERT(0);
}
#else /* no dual bank ability */
*sector = (Address&0xffffff)/FLASH_SIZE_GRANULARITY_128K;
if(*sector>7)
{
*bank = FLASH_BANK_1;
*sector = *sector/2;
}
else
{
*bank = FLASH_BANK_2;
}
#endif
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -1;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t end_addr = addr + size;
rt_uint32_t bank = addr/ADDR_FLASH_SECTOR_8;;
if ((end_addr) > STM32_FLASH_END_ADDRESS)
{
LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -RT_EINVAL;
}
if (size < 1)
{
return -RT_EINVAL;
}
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR );
for (size_t i = 0; i < size/32; i++, addr+=32, buf+=32)
{
/* write data to flash */
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, addr, (uint64_t)((uint32_t)buf)) == HAL_OK)
{
if (*(rt_uint8_t *)addr != *buf)
{
result = -RT_ERROR;
break;
}
}
else
{
result = -RT_ERROR;
break;
}
}
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
return size;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t FirstSector = 0, NbOfSectors = 0;
rt_uint32_t SECTORError = 0;
rt_uint32_t bank = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
return -RT_EINVAL;
}
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
/* Get the 1st sector to erase */
GetSector(addr,&bank,&FirstSector);
/* Get the number of sector to erase from 1st sector */
GetSector(addr + size,0,&NbOfSectors);
NbOfSectors = NbOfSectors - FirstSector + 1;
/* Fill EraseInit structure */
EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3;
EraseInitStruct.Sector = FirstSector;
EraseInitStruct.NbSectors = NbOfSectors;
EraseInitStruct.Banks = bank;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &SECTORError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
return size;
}
#if defined(PKG_USING_FAL)
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase_128k(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} };
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash_128k.addr + offset, buf, size);
}
static int fal_flash_erase_128k(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash_128k.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
/**
* @brief Gets the page of a given address
* @param Addr: Address of the FLASH Memory
* @retval The page of a given address
*/
static uint32_t GetPage(uint32_t Addr)
{
uint32_t page = 0;
if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
{
/* Bank 1 */
page = (Addr - FLASH_BASE) / FLASH_PAGE_SIZE;
}
else
{
/* Bank 2 */
page = (Addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
}
return page;
}
/**
* @brief Gets the bank of a given address
* @param Addr: Address of the FLASH Memory
* @retval The bank of a given address
*/
static uint32_t GetBank(uint32_t Addr)
{
uint32_t bank = 0;
#ifndef FLASH_BANK_2
bank = FLASH_BANK_1;
#else
if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0)
{
/* No Bank swap */
if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
{
bank = FLASH_BANK_1;
}
else
{
bank = FLASH_BANK_2;
}
}
else
{
/* Bank swap */
if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
{
bank = FLASH_BANK_2;
}
else
{
bank = FLASH_BANK_1;
}
}
#endif
return bank;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void*)(addr + size));
return -RT_EINVAL;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const uint8_t *buf, size_t size)
{
size_t i, j;
rt_err_t result = 0;
rt_uint64_t write_data = 0, temp_data = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: write outrange flash size! addr is (0x%p)\n", (void*)(addr + size));
return -RT_EINVAL;
}
if(addr % 8 != 0)
{
LOG_E("write addr must be 8-byte alignment");
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGSERR);
if (size < 1)
{
return -RT_ERROR;
}
for (i = 0; i < size;)
{
if ((size - i) < 8)
{
for (j = 0; (size - i) > 0; i++, j++)
{
temp_data = *buf;
write_data = (write_data) | (temp_data << 8 * j);
buf ++;
}
}
else
{
for (j = 0; j < 8; j++, i++)
{
temp_data = *buf;
write_data = (write_data) | (temp_data << 8 * j);
buf ++;
}
}
/* write data */
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, addr, write_data) == HAL_OK)
{
/* Check the written value */
if (*(uint64_t*)addr != write_data)
{
LOG_E("ERROR: write data != read data\n");
result = -RT_ERROR;
goto __exit;
}
}
else
{
result = -RT_ERROR;
goto __exit;
}
temp_data = 0;
write_data = 0;
addr += 8;
}
__exit:
HAL_FLASH_Lock();
if (result != 0)
{
return result;
}
return size;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
uint32_t FirstPage = 0, NbOfPages = 0, BankNumber = 0;
uint32_t PAGEError = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void*)(addr + size));
return -RT_EINVAL;
}
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
/* Unlock the Flash to enable the flash control register access *************/
HAL_FLASH_Unlock();
/* Clear OPTVERR bit set on virgin samples */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
/* Get the 1st page to erase */
FirstPage = GetPage(addr);
/* Get the number of pages to erase from 1st page */
NbOfPages = GetPage(addr + size - 1) - FirstPage + 1;
/* Get the bank */
BankNumber = GetBank(addr);
/* Fill EraseInit structure*/
EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
EraseInitStruct.Banks = BankNumber;
EraseInitStruct.Page = FirstPage;
EraseInitStruct.NbPages = NbOfPages;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void*)addr, size);
return size;
}
#if defined(PKG_USING_FAL)
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash = { "onchip_flash", STM32_FLASH_START_ADRESS, STM32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} };
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_erase(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-14 Dozingfiretruck first version
*/
#include "board.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#include "drv_config.h"
#include "drv_flash.h"
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
/**
* @brief Gets the page of a given address
* @param Addr: Address of the FLASH Memory
* @retval The page of a given address
*/
static uint32_t GetPage(uint32_t addr)
{
uint32_t page = 0;
page = RT_ALIGN_DOWN(addr-STM32_FLASH_START_ADRESS, FLASH_PAGE_SIZE)/FLASH_PAGE_SIZE;
return page;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void*)(addr + size));
return -RT_EINVAL;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
}
return size;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
int stm32_flash_write(rt_uint32_t addr, const uint8_t *buf, size_t size)
{
size_t i, j;
rt_err_t result = 0;
rt_uint64_t write_data = 0, temp_data = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: write outrange flash size! addr is (0x%p)\n", (void*)(addr + size));
return -RT_EINVAL;
}
if(addr % 8 != 0)
{
LOG_E("write addr must be 8-byte alignment");
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGSERR);
if (size < 1)
{
return -RT_ERROR;
}
for (i = 0; i < size;)
{
if ((size - i) < 8)
{
for (j = 0; (size - i) > 0; i++, j++)
{
temp_data = *buf;
write_data = (write_data) | (temp_data << 8 * j);
buf ++;
}
}
else
{
for (j = 0; j < 8; j++, i++)
{
temp_data = *buf;
write_data = (write_data) | (temp_data << 8 * j);
buf ++;
}
}
/* write data */
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, addr, write_data) == HAL_OK)
{
/* Check the written value */
if (*(uint64_t*)addr != write_data)
{
LOG_E("ERROR: write data != read data\n");
result = -RT_ERROR;
goto __exit;
}
}
else
{
result = -RT_ERROR;
goto __exit;
}
temp_data = 0;
write_data = 0;
addr += 8;
}
__exit:
HAL_FLASH_Lock();
if (result != 0)
{
return result;
}
return size;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
uint32_t PAGEError = 0;
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
return -RT_EINVAL;
}
HAL_FLASH_Unlock();
/* Fill EraseInit structure*/
EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
EraseInitStruct.Page = GetPage(addr);
EraseInitStruct.NbPages = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
{
return result;
}
LOG_D("erase done: addr (0x%p), size %d", (void*)addr, size);
return size;
}
#if defined(PKG_USING_FAL)
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase(long offset, size_t size);
const struct fal_flash_dev stm32_onchip_flash = { "onchip_flash", STM32_FLASH_START_ADRESS, STM32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} };
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
{
return stm32_flash_read(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
{
return stm32_flash_write(stm32_onchip_flash.addr + offset, buf, size);
}
static int fal_flash_erase(long offset, size_t size)
{
return stm32_flash_erase(stm32_onchip_flash.addr + offset, size);
}
#endif
#endif /* BSP_USING_ON_CHIP_FLASH */
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<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U4294967295 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0FM33LC04X_FLASH256.FLM -FS00 -FL040000 -FP0($$Device:FM33LC04X$Flash\FM33LC04X_FLASH256.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0FM33LC04X_FLASH256 -FS00 -FL040000 -FP0($$Device:FM33LC04X$Flash\FM33LC04X_FLASH256.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>1</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>5000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
</ProjectOpt>
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