- 22 8月, 2013 40 次提交
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由 Alexander Shiyan 提交于
This patch adds SRAM node for Phytec PCM-038 module. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch adds WEIM node for Phytec PCM-038 module. Migrate existing on-module NOR-flash as children of WEIM CS0. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch adds the missing (Wireless External Interface Module) WEIM devicetree node for i.MX27 CPUs. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch moves IIM node under AIPI2 bus, since this is proper location for this module. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Huang Shijie 提交于
Add the #dma-cells property for all the sdma in all the imx platforms. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Philipp Zabel 提交于
i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> [shawn.guo: remove "crtcs" property from imx6qdl.dtsi] Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
Enable Video Processing Unit (VPU) support. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Philipp Zabel 提交于
This patch enables the On-Chip SRAM (OCRAM) on i.MX53 and i.MX6 SoCs. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Markus Pargmann 提交于
Board files for Phytec phyCARD-S "System on Module" and "Rapid Development Kit". Based on patches from: Steffen Trumtrar <s.trumtrar@pengutronix.de>: - Original patch - ARM: dts: Set partition offsets for phycard - ARM: dts: Use CSPI1 instead of CSPI2 on phycard pca100 - ARM: imx27-phytec-phycard-S.dts: resize nand partitions Jan Luebbe <jlu@pengutronix.de>: - ARM: dts: Enable bad block table in NAND Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Cc: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Markus Pargmann 提交于
Set operating-points for imx27. There is no regulator support, so the voltages are 0. The frequencies should be the same for all imx27 boards, so it is defined here and can be overwritten if necessary. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Markus Pargmann 提交于
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Markus Pargmann 提交于
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
On the MX27 Reference Manual the interrupt controller is named AITC: ARM926EJ-S Interrupt Controller So use the AITC term instead of AVIC. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Origin: id:1334193132-18944-2-git-send-email-festevam@gmail.com Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
This adds pinmux entries for USBH1/2 in ULPI mode. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
The mc13892 driver knows that it needs spi-cs-high, so the mc13892 will work. The dataflash also connected to this bus though can only be probed when the mc13892 is inactive. Due to driver potential differences in the probe order we can only make sure the mc13892 is inactive when we put the information into the devicetree. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
For keeping the alphabetical order in the pinmux nodes. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
This allows to order the i2c devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
The i.MX6 gpt is handled by the i.MX31 gpt driver in the kernel, so add a corresponding compatible entry. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
The i.MX6Q and i.MX6DL are pin compatible, so the pinmux entries should be in sync. This patch systematically adds the pinmux entries missing from the imx6q to the imx6dl file. Some name inconsistencies and whitespace damage is fixed along the way. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch adds the missing (Keypad Port) KPP devicetree node for i.MX27 CPUs. Signed-off-by: NAlexander Shiyan <eagle.alexander923@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
Define minimal memory layout for i.MX27 PCM-038 module. This will help to use appended DTB with non-DT capable bootloaders. Signed-off-by: NAlexander Shiyan <eagle.alexander923@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
Signed-off-by: NAlexander Shiyan <eagle.alexander923@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
i.MX27 have only one PWM, so index from PWM devicetree node removed. Signed-off-by: NAlexander Shiyan <eagle.alexander923@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch adds the missing (Digital Audio MUX) AUDMUX devicetree node for i.MX27 CPUs. Signed-off-by: NAlexander Shiyan <eagle.alexander923@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Alexander Shiyan 提交于
This patch adds the missing (Symmetric/Asymmetric Hashing and Random Accelerator) SAHARA2 devicetree node for i.MX27 CPUs. Signed-off-by: NAlexander Shiyan <eagle.alexander923@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Philippe Reynes 提交于
Signed-off-by: NPhilippe Reynes <tremyfr@yahoo.fr> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Huang Shijie 提交于
enable the spi nor for imx6q{dl}-sabresd boards. Signed-off-by: NHuang Shijie <b32955@freescale.com>
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由 Huang Shijie 提交于
This new pinctrl is used by the imx6q-sabresd board. Signed-off-by: NHuang Shijie <b32955@freescale.com>
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由 Huang Shijie 提交于
This new pinctrl is used in the imx6dl-sabresd board. Signed-off-by: NHuang Shijie <b32955@freescale.com>
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由 Shawn Guo 提交于
It contains a bunch of imx soc updates for 3.12. - Add more ethernet phy fixups for imx6 boards - Add some missing imx6q clocks into clock driver - Add new clock types fixup mux and div to work around some ugly hardware defect - Consolidate L2 cache initialization function, so that it can be used on more i.MX SoCs - Replace magic numbers in mach-imx6q.c with well defined macros - Small fixes for imx6q and pllv3 clock drivers - Some random updates on imx defconfig files
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