- 20 12月, 2016 1 次提交
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由 Simon Horman 提交于
4286db84 ("spi: sh-msiof: Add R-Car Gen 2 and 3 fallback bindings") added a C++ style comment. This is not in keeping with the style used for comments elsewhere in this fine. Update it accordingly. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 15 12月, 2016 1 次提交
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由 Simon Horman 提交于
In the case of Renesas R-Car hardware we know that there are generations of SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the relationship between IP blocks might be. For example, I believe that r8a7790 is older than r8a7791 but that doesn't imply that the latter is a descendant of the former or vice versa. We can, however, by examining the documentation and behaviour of the hardware at run-time observe that the current driver implementation appears to be compatible with the IP blocks on SoCs within a given generation. For the above reasons and convenience when enabling new SoCs a per-generation fallback compatibility string scheme is being adopted for drivers for Renesas SoCs. Also: * Deprecate renesas,sh-msiof. It seems poorly named as it is only compatible with SH-Mobile. It also appears unused in mainline. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 22 11月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
MSIOF in R-Car M3-W (r8a7796) is handled fine by the existing driver. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 05 8月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
The conversion from a look-up table to a calculation for clock generator parameters forgot to take into account that BRDV x 1/1 is valid only if BRPS is x 1/1 or x 1/2, leading to undefined behavior (e.g. arbitrary clock rates). This limitation is documented for the MSIOF module in all supported SH/R-Mobile and R-Car Gen2/Gen3 ARM SoCs. Tested on r8a7791/koelsch and r8a7795/salvator-x. Fixes: 65d5665b ("spi: sh-msiof: Update calculation of frequency dividing") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 22 6月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
After probe time, the pointer to the sh_msiof_chipdata structure in the sh_msiof_spi_priv structure is used only for checking the SPI master flags. As these are also available in the spi_master structure, convert the users to access those, and remove the pointer. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 31 8月, 2015 1 次提交
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由 Koji Matsuoka 提交于
The upper limit of Tx/Rx FIFO size is 64 word by the specification of H/W. This patch corrects to 64 word from 256 word. Signed-off-by: NKoji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: NYoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 07 7月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Since commit a483dcbf ("ARM: shmobile: lager: Remove legacy board support"), R-Car Gen2 SoCs are only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 02 5月, 2015 1 次提交
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由 Krzysztof Kozlowski 提交于
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 23 2月, 2015 1 次提交
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由 Arnd Bergmann 提交于
Current sh-msiof sets dma_slave_config :: slave_id field for DMAEngine, but it is no longer needed. Let's remove it. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMark Brown <broonie@kernel.org> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 05 2月, 2015 1 次提交
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than assigning it to an incorrect type variable. Signed-off-by: NNicholas Mc Guire <der.herr@hofr.at> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 03 2月, 2015 1 次提交
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由 Nobuhiro Iwamatsu 提交于
sh-msiof of frequency dividing does not perform the calculation, driver have to manage setting value in the table. It is not possible to set frequency dividing value close to the actual data in this way. This changes from frequency dividing of table management to setting by calculation. This driver is able to set a value close to the actual data. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 08 1月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
There's no need to use the synchronous version. Reported-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 06 1月, 2015 1 次提交
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由 Yoshihiro Shimoda 提交于
Since the FLD bit field is bit[3:2], the MDR1_FLD_MASK value should be 0x0000000c. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 24 12月, 2014 1 次提交
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由 Yoshihiro Shimoda 提交于
The MSIOF controller has DTDL and SYNCDL in SITMDR1 register. So, this patch adds new properties like the following commit: d0fb47a5 (spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT) Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 16 12月, 2014 1 次提交
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由 Hisashi Nakamura 提交于
SH-MSIOF driver is enabled autosuspend API of spi framework. But autosuspend framework doesn't work during initializing. So runtime PM lock is added in SH-MSIOF driver initializing. Fixes: e2a0ba54 (spi: sh-msiof: Convert to spi core auto_runtime_pm framework) Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: NYoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 20 10月, 2014 1 次提交
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由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 31 8月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
Fix tx/rx mixup, which broke transmit-only transfers. Introduced by commit 4240305f7cbdc7782aa8bc40cc702775d9ac0839 ("spi: sh-msiof: Fix leaking of unused DMA descriptors"). Reported-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 29 8月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
Add support for MSIOF in: - r8a7792 (R-Car V2H) - r8a7793 (R-Car M2-N) - r8a7794 (R-Car E2) r8a7791 is now called "R-Car M2-W". Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 17 8月, 2014 5 次提交
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由 Geert Uytterhoeven 提交于
Fix tx/rx mixup, which broke transmit-only transfers. Introduced by commit 4240305f7cbdc7782aa8bc40cc702775d9ac0839 ("spi: sh-msiof: Fix leaking of unused DMA descriptors"). Reported-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Reported-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
The new Renesas R-Car Gen2 DMA Controller driver (rcar-dmac) requires explicit configuration of the DMA slave bus width. Hardcode the DMA transfer size to 4 bytes, as MSIOF DMA is limited to 32-bit words. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
If dmaengine_prep_slave_sg() or dmaengine_submit() fail, we may leak unused DMA descriptors. As per Documentation/dmaengine.txt, once a DMA descriptor has been obtained, it must be submitted. Hence: - First prepare and submit all DMA descriptors, - Prepare the SPI controller for DMA, - Start DMA by calling dma_async_issue_pending(), - Make sure to call dmaengine_terminate_all() on all descriptors that haven't completed. Reported-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 17 7月, 2014 2 次提交
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由 Geert Uytterhoeven 提交于
To function correctly in the presence of an IOMMU, the DMA buffers must be mapped using the DMA channel's device instead of the MSIOF platform device's device. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
As typically a shmobile SoC has less DMA channels than devices that can use DMA, we may want to prioritize access to the DMA channels in the future. This means that dmaengine_prep_slave_single() may start failing arbitrarily. Handle dmaengine_prep_slave_single() failures gracefully by falling back to PIO. This requires moving DMA-specific configuration of the MSIOF device after the call(s) to dmaengine_prep_slave_single(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 01 7月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
Add DMA support to the MSIOF driver using platform data. As MSIOF DMA is limited to 32-bit words (requiring byte/wordswapping for smaller wordsizes), and the group length is limited to 256 words, DMA is performed on two fixed pages, allocated and mapped at driver initialization time. Performance figures (in Mbps) on r8a7791/koelsch at different SPI clock frequencies for 1024-byte and 4096-byte transfers: 1024 bytes 4096 bytes - 3.25 MHz: PIO 2.1, DMA 2.6 | PIO 2.8, DMA 3.1 - 6.5 MHz: PIO 3.2, DMA 4.4 | PIO 5.0, DMA 5.9 - 13 MHz: PIO 4.2, DMA 6.6 | PIO 8.2, DMA 10.7 - 26 MHz: PIO 5.9, DMA 10.4 | PIO 12.4, DMA 18.4 Note that DMA is only faster than PIO for transfers that exceed the FIFO size (typically 64 words / 256 bytes). Also note that large transfers (larger than the group length for DMA, or larger than the FIFO size for PIO), should use cs-gpio (with the appropriate pinmux setup), as the hardware chipselect will be deasserted in between chunks. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 21 6月, 2014 4 次提交
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由 Geert Uytterhoeven 提交于
- Move buffer pointer and length setup to the top, - Make unsigned values unsigned, - Loop over words and increment pointers instead of recalculating them, which allows to kill bytes_done. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
- Add a timeout when waiting for the transfer complete interrupt, - If sh_msiof_spi_stop() fails, there's no need to clear IER, as the interrupt handler has already done that, - Propagate transfer failures in sh_msiof_transfer_one(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Based on an old patch by Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 06 6月, 2014 1 次提交
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由 Alexander Shiyan 提交于
Drop call to platform_set_drvdata() as driver data is not used anywhere in the driver. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 30 4月, 2014 1 次提交
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由 Jingoo Han 提交于
The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 11 3月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 03 3月, 2014 1 次提交
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由 Axel Lin 提交于
In the implementation of __spi_validate(), spi core will set transfer bits_per_word and max speed as spi device default if it is not set for this transfer. So we can remove the same implementation in this driver. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 27 2月, 2014 6 次提交
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由 Geert Uytterhoeven 提交于
The only remaining feature of spi-bitbang used by this driver is the chipselect() callback, which just does conditional GPIO. This is handled fine by the SPI core's spi_set_cs(), hence switch the driver to use the core message handling through our own transfer_one() method. As the (optional) GPIO CS is no longer deasserted at spi_master.setup() time (through spi_bitbang_setup() and the spi_bitbang.chipselect() callback), we now have to take care of that ourselves. Remove the call to spi_master_put() in sh_msiof_spi_remove(), as our SPI master is now registered using devm_spi_register_master() (spi_bitbang_start() uses the non-managed version). Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Set bits_per_word_mask so the spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Move clock management and pin configuration from the bitbang chipselect() method to the SPI core prepare_message() and unprepare_message() methods. As spi_master.{,un}prepare_message() is guaranteed to be called in matching pairs, the clock management synchronization is no longer needed. As sh_msiof_spi_set_pin_regs() is no longer called at spi_master.setup() time (through spi_bitbang_setup() and the spi_bitbang.chipselect() callback), we now have to take care of that ourselves. Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Add support for the MSIOF variant in the R-Car H2 (r8a7790) and M2 (r8a7791) SoCs. Binding documentation: - Add future-proof "renesas,msiof-<soctype>" compatible values, - The default for "renesas,rx-fifo-size" is 256 on R-Car H2 and M2, - "renesas,tx-fifo-size" and "renesas,rx-fifo-size" are deprecated for soctype-specific bindings, - Add example bindings. Implementation: - MSIOF on R-Car H2 and M2 requires the transmission of dummy data if data is being received only (cfr. "Set SICTR.TSCKE to 1" and "Write dummy transmission data to SITFDR" in paragraph "Transmit and Receive Procedures" of the Hardware User's Manual). - As RX depends on TX, MSIOF on R-Car H2 and M2 also lacks the RSCR register (Receive Clock Select Register), and some bits in the RMDR1 (Receive Mode Register 1) and TMDR2 (Transmit Mode Register 2) registers. - Use the recently introduced SPI_MASTER_MUST_TX flag to enable support for dummy transmission in the SPI core, and to differentiate from other MSIOF implementations in code paths that need this. - New DT compatible values ("renesas,msiof-r8a7790" and "renesas,msiof-r8a7791") are added, as well as new platform device names ("spi_r8a7790_msiof" and "spi_r8a7791_msiof"). - The default RX FIFO size is 256 words on R-Car H2 and M2. This is loosely based on a set of patches from Takashi Yoshii <takasi-y@ops.dti.ne.jp>. Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
As different variants of MSIOF have different FIFO sizes, move the default FIFO sizes to a new struct sh_msiof_chipdata, pointed to from the device ID data. [Moved ifdef to fix build -- broonie] Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Geert Uytterhoeven 提交于
Documentation: - Add missing "interrupt-parent", "#address-cells", "#size-cells", and "clocks" properties, - Add missing default values for "num-cs", "renesas,tx-fifo-size" and "renesas,rx-fifo-size", - Add a reference to the pinctrl documentation. Implementation: - As "num-cs" is marked optional, provide a sensible default. Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMark Brown <broonie@linaro.org>
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