- 09 4月, 2013 30 次提交
-
-
由 Philipp Zabel 提交于
The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus the IPU2 reset line and multi core CPU reset/enable bits. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Also, link SRC to IPU via phandle. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Steffen Trumtrar 提交于
Add ldb device tree node and clock lookups. Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Markus Pargmann 提交于
Add cpufreq-cpu0 platform device for imx5 DT init and register the clock for imx5. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Markus Pargmann 提交于
Adds cpufreq-cpu0 platform device for imx27 DT init and adds a clock registration for cpufreq-cpu0 device. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
The APF27Dev is a docking board for an APF27 SOM Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The i.MX6 already has a devicetree node for the GPT, but not yet has the clocks. Add them. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The GPT is the GPT timer found on i.MX SoCs. This patch adds the devicetree node for it. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The GPT is the GPT timer found on i.MX SoCs. This patch adds the devicetree node for it. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The GPT is the GPT timer found on i.MX SoCs. Since this is the first user of the AIPS2 this patch also adds it. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The GPT is the GPT timer found on i.MX SoCs. This adds the missing GPT devicetree nodes. Also fixup the watchdog register map size along the way. it's 0x1000, not 0x4000. This didn't hurt before as the region was not occupied by another device, but now overlaps with the GPT. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance task for the clock devices easier. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
Add a second pinctrl group of pins for i2c2. Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
Add ecspi2 group of pins for imx51. Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
The APF51Dev is a docking board for an APF51 SOM Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sean Cross 提交于
Allow AUD3 to be used as audio output from the audmux block. Signed-off-by: NSean Cross <xobs@kosagi.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sean Cross 提交于
Add groups to allow i2c2 and i2c3 to be used on imx6q. Signed-off-by: NSean Cross <xobs@kosagi.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sean Cross 提交于
Add a group of pins to allow ecspi3 to be used on imx6q. Signed-off-by: NSean Cross <xobs@kosagi.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Currently, all imx pinctrl drivers maintain a big array of struct imx_pin_reg which hard-codes data like register offset and mux mode setting for each pin function. Every time a new imx SoC support is added, we need to add such a big mount of data. With moving to single kernel build, it's only matter of time to be blamed on memory consuming. With DTC pre-processor support in place, the patch moves all these data into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and changing the PIN_FUNC_ID parsing code a little bit. The pin id gets re-numbered based on mux register offset, or config register offset if the pin has no mux register, so that kernel can identify the pin id from register offsets provided by device tree. As a bonus point of the change, those arbitrary magic numbers standing for particular PIN_FUNC_ID in device tree sources are now replaced by macros to improve the readability of dts files. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDong Aisheng <dong.aisheng@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Shawn Guo 提交于
Replace /include/ (dtc) with #include (C pre-processor) for all imx DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as pinctrl settings. Use of those features will increase the readability of the device tree files. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Peter Chen 提交于
Add USB support for imx6q sabresd board Signed-off-by: NPeter Chen <peter.chen@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Dirk Behme 提交于
Add ARM Cortex A9 Performance Monitor Unit (PMU) support. On i.MX6 a combined interrupt on hardware line #126 is used (i.MX6 TRM: Performance Unit interrupt). For more details see Documentation/devicetree/bindings/arm/pmu.txt Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Paul Bolle 提交于
This removes the unused Kconfig options ARCH_MX5, ARCH_MX51, ARCH_MX53 and MACH_MX21. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The i.MX53 ahci platform support is unused in mainline. To demotivate people using it just remove it from the tree. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 06 4月, 2013 1 次提交
-
-
由 Stephen Warren 提交于
The recent dtc+cpp support allows header files and C pre-processor defines/macros to be used when compiling device tree files. These headers will typically define various constants that are part of the device tree bindings. The original patch which set up the dtc+cpp include path only considered using those headers from device tree files. However, most are also useful for kernel code which needs to interpret the device tree. In both the DT files and the kernel, I'd like to include the DT-related headers in the same way, for example, <dt-bindings/gpio/tegra-gpio.h>. That will simplify any text which discusses the DT header locations. Creating a <dt-bindings/> for kernel source to use is as simple as placing files into include/dt-bindings/. However, when compiling DT files, the include path should be restricted so that only the dt-bindings path is available; arbitrary kernel headers shouldn't be exposed. For this reason, create a specific include directory for use by dtc+cpp, and symlink dt-bindings from there to the actual location of include/dt-bindings/. For want of a better location, place this "include chroot" into the existing dts/ directory. arch/*/boot/dts/include/dt-bindings -> ../../../../../include/dt-bindings Some headers used by device tree files may not be useful to the kernel; they may be used simply to aid in constructing the DT file (e.g. macros to create a node), but not define any information that the kernel needs to share. These may be placed directly into arch/*/boot/dts/ along with the DT files themselves. Acked-by: NMichal Marek <mmarek@suse.cz> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 02 4月, 2013 4 次提交
-
-
由 Shawn Guo 提交于
Those stuff defined in mx6q.h is used nowhere now. Remove the header. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Since we have converted IMX to multiplatform build, Makefile.boot is not used anyway. Remove it. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
imx ssi block has two types of clocks: - ipg: bus clock, the clock needed for accessing registers. - per: peripheral clock, the clock needed for generating the bit rate. Currently ssi driver only supports slave mode and thus need only to handle the ipg clock, because the peripheral clock comes from the master codec. Only register the ipg clock and do not register the peripheral clock for ssi Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
When building a kernel with CONFIG_PM undefined, the following warning happens: arch/arm/mach-imx/avic.c:57:12: warning: 'avic_saved_mask_reg' defined but not used [-Wunused-variable] Move avic_saved_mask_reg definition inside the '#ifdef CONFIG_PM' block to avoid the warning. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 01 4月, 2013 3 次提交
-
-
由 Markus Pargmann 提交于
The old cpufreq driver is not necessary anymore with DT and cpufreq-cpu0. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Commit a1f1c7ef (arm/imx6q: add suspend/resume support) added declaration for a non-existing function pl310_get_save_ptr() by mistake. Remove it. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Commit 13eed989 (arm/imx6q: add device tree machine support) added duplicated function declaration for imx_enable_cpu() and imx_set_cpu_jump(). Remove them. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 30 3月, 2013 1 次提交
-
-
由 Len Brown 提交于
Commit 3e7fc708 ("ia64 idle: delete pm_idle") in 3.9-rc1 didn't finish the job, leaving an un-initialized reference to (*idle)(). [ Haven't seen a crash from this - but seems like we are just being lucky that "idle" is zero so it does get initialized before we jump to randomland - Len ] Reported-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NLen Brown <len.brown@intel.com> Signed-off-by: NTony Luck <tony.luck@intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 28 3月, 2013 1 次提交
-
-
由 Konrad Rzeszutek Wilk 提交于
We move the setting of write_cr3 from the early bootup variant (see git commit 0cc9129d "x86-64, xen, mmu: Provide an early version of write_cr3.") to a more appropiate location. This new location sets all of the other non-early variants of pvops calls - and most importantly is before the alternative_asm mechanism kicks in. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-