- 01 11月, 2012 9 次提交
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由 Alex Deucher 提交于
The R200 asics use an external DAC for the secondary DAC. The current KMS code tries to use code for the integrated TV DAC for R200 which leads to unpredictable results since R200 does not have an integrated TV DAC. This patch ports the external DAC load detection support from the UMS driver to KMS. v2: fix typo in loop break logic Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NEgbert Eich <eich@suse.de>
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由 Egbert Eich 提交于
On all dual CRTC GPUs the CRTC_CRT_ON in the RADEON_CRTC_EXT_CNTL register controls the CRTC of the primary DAC. Therefore it is set in the DAC DMPS function. This is different for GPU's with a single CRTC but a primary and a TV DAC: here it controls the single CRTC no matter where it is routed. Therefore we set it here. This avoids an elaborate on/off state tracking since both primary_dac_dpms() and tv_dac_dpms() functions would have to touch this bit. On single CRTC GPUs with just one DAC it's irrelevant where this bit is handled. agd5f: fix warning Signed-off-by: NEgbert Eich <eich@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Egbert Eich 提交于
The RN50 has a TV DAC but only a single CRTC. For load detection this DAC is controlled by the primary CRTC. Signed-off-by: NEgbert Eich <eich@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Egbert Eich 提交于
Signed-off-by: NEgbert Eich <eich@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Igor Murzov 提交于
Fix a copy&pasted documentation. Signed-off-by: NIgor Murzov <e-mail@date.by> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Peter Senna Tschudin 提交于
A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r1@ statement S; position p,p1; @@ S@p1;@p @script:python r2@ p << r1.p; p1 << r1.p1; @@ if p[0].line != p1[0].line_end: cocci.include_match(False) @@ position r1.p; @@ -;@p // </smpl> Signed-off-by: NPeter Senna Tschudin <peter.senna@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Egbert Eich 提交于
The Radeon driver uses the analog/digital flag to determine if the DAC or the TMDS encoder should be enabled on a DVI-I connector. If the EDID is bogus this flag is no longer reliable. This fix adds a fallback to DAC load detection to determine if anything is connected to the DAC. If not and a (bogus) EDID is found it assumes a digital display is connected. This works around problems with some crappy IPMI devices using Radeon ES1000. Signed-off-by: NEgbert Eich <eich@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Egbert Eich 提交于
For Radeon 7500 ATI recommends a DAC_FORCE value of 0x1ac. This value works better on ES1000 (RV100) chips, too, as it doesn't produce any false positives on any cards I have tested. Therefore let's assume that this value is good for all RV100 and RV200 chipset generations. Signed-off-by: NEgbert Eich <eich@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Egbert Eich 提交于
An uninitialized variable led to broken load detection. Signed-off-by: NEgbert Eich <eich@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 24 10月, 2012 6 次提交
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由 Alex Deucher 提交于
Copy and paste typo in the apci rework. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=49351Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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由 Alex Deucher 提交于
The ATPX code no longer handles ATRM. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
When internal users want VRAM we shouldn't return GART memory instead. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Driver internal users shouldn't be limited in their allocation size. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
When allocating more than 2GB of GART the array of pages gets to big for kzalloc, use vzalloc instead. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
GART and VRAM size limits need to be a power of two. Fix values greater than 1GB and simplify those checks a bit. v2: also fix radeon_vram_limit usage, and simplify test even more. v3: agd5f: fix spelling as noticed by Klaus Schnass Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 10月, 2012 8 次提交
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由 Christian König 提交于
Only NI uses 3dw headers, SI uses 4dw headers. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
It's better to handle this in the chipset specific code. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Handle requests that won't fit into a single packet. v2: pe needs to increase as well. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Handle requests that won't fit into a single packet. v2: pe needs to increase as well. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Otherwise the next IB might start reading commands with the page table still invalid. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
So we know why the CS was rejected. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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由 Alex Deucher 提交于
In cases where we have multiple radeons with backlight controls. Should fix: https://bugzilla.kernel.org/show_bug.cgi?id=48941Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Reported-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 10月, 2012 12 次提交
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由 Randy Dunlap 提交于
drivers/gpu/drm/radeon/radeon_atpx_handler.c:151:3: warning: format '%lu' expects type 'long unsigned int', but argument 2 has type 'size_t' [airlied: Alex had others fixed already, except for atpx one] Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Thomas Friebel 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Egbert Eich 提交于
radeon_i2c_fini() walks thru the list of I2C bus recs rdev->i2c_bus[] to destroy each of them. radeon_ext_tmds_enc_destroy() however also has code to destroy it's associated I2C bus rec which has been obtained by radeon_i2c_lookup() and is therefore also in the i2c_bus[] list. This causes a double free resulting in a kernel panic when unloading the radeon driver. Removing destroy code from radeon_ext_tmds_enc_destroy() fixes this problem. agd5f: fix compiler warning Signed-off-by: NEgbert Eich <eich@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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由 Alex Deucher 提交于
If so, skip enabling it to save time. v2: coding style fixes Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
No need to emit them at VM flush as we no longer use variable sized page tables now that we support 2 level page tables. This matches the behavior of SI (which does not support variable sized page tables). Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Christian König 提交于
Make it possible to allocate a persistent page table. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
We want to use VMs without the IB pool in the future. v2: also remove it from radeon_vm_finish. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Based on Dmitries work, but splitting the code into page directory and page table handling makes it far more readable and (hopefully) more reliable. Allocations of page tables are made from the SA on demand, that should still work fine since all page tables are of the same size. Also using the fact that allocations from the SA are mostly continuously (except for end of buffer wraps and under very high memory pressure) to group updates send to the chipset specific code into larger chunks. v3: mostly a rewrite of Dmitries previous patch. v4: fix some typos and coding style Signed-off-by: NDmitry Cherkasov <Dmitrii.Cherkasov@amd.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Tested-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
The actual set up and assignment of VM page tables is done on the fly in radeon_gart.c. v2: update vm size comments Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Alex Deucher 提交于
The order shouldn't matter, but there have been problems reported on certain older asics. This behaves more like the original code before the PPLL allocation rework. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Markus Trippelsdorf <markus@trippelsdorf.de>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Luca Tettamanti 提交于
Fixes compiler warnings on 32bit. Signed-off-by: NLuca Tettamanti <kronos.it@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 10月, 2012 5 次提交
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由 Alex Deucher 提交于
Use the new WRITE_DATA packet rather than the legacy ME_WRITE packet. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Pass the vm and ring index rather than an IB. This allows us to use the vm_flush interface for non-IB cases in the future. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Alex Deucher 提交于
This is the preferred packet for writing data to memory or registers on SI. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Howells 提交于
Convert #include "..." to #include <path/...> in drivers/gpu/. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NDave Airlie <airlied@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: NDave Jones <davej@redhat.com>
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由 David Howells 提交于
Remove redundant DRM UAPI header #inclusions from drivers/gpu/. Remove redundant #inclusions of core DRM UAPI headers (drm.h, drm_mode.h and drm_sarea.h). They are now #included via drmP.h and drm_crtc.h via a preceding patch. Without this patch and the patch to make include the UAPI headers from the core headers, after the UAPI split, the DRM C sources cannot find these UAPI headers because the DRM code relies on specific -I flags to make #include "..." work on headers in include/drm/ - but that does not work after the UAPI split without adding more -I flags. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NDave Airlie <airlied@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: NDave Jones <davej@redhat.com>
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