- 14 9月, 2018 1 次提交
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由 James Zhu 提交于
Add error message when register failed to reach expected value, It will help discover potential issue. Signed-off-by: NJames Zhu <James.Zhu@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 13 9月, 2018 7 次提交
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由 kbuild test robot 提交于
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c:771:1-3: WARNING: PTR_ERR_OR_ZERO can be used Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: scripts/coccinelle/api/ptr_ret.cocci Fixes: e498eb71 ("drm/amd/display: Add support for hw_state logging via debugfs") CC: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Francis 提交于
DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. DC is already fully equipped to initialize DMCU as long as the firmware is loaded. At the moment only the raven firmware is available. A single .bin file is loaded by the kernel's loading mechanism and split into two ucodes according to the header. DMCU is optional, so if the firmware is not found, no error or warning is raised. Signed-off-by: NDavid Francis <David.Francis@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Francis 提交于
DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. PSP is already equipped to handle DMCU firmware loading, all that is needed is to translate between the new DMCU ucode ID and the equivalent psp_gfx_fw_type. Signed-off-by: NDavid Francis <David.Francis@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Francis 提交于
DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. DMCU has two pieces of firmware: the ERAM and the interrupt vectors, which must be loaded seperately. To this end, the DMCU firmware has a custom header and parsing logic similar to MEC, to extract the two ucodes from a single struct firmware. Signed-off-by: NDavid Francis <David.Francis@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Oak Zeng 提交于
In stead of share one fault hash table per device, make it per vm. This can avoid inter-process lock issue when fault hash table is full. Change-Id: I5d1281b7c41eddc8e26113e010516557588d3708 Signed-off-by: NOak Zeng <Oak.Zeng@amd.com> Suggested-by: NChristian Konig <Christian.Koenig@amd.com> Suggested-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NChristian Konig <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chunming Zhou 提交于
cs dependencies handling doesn't need in vm resv Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Try to allocate VRAM in power of two sizes and only fallback to vram split sizes if that fails. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NFelix Kuehling <felix.kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 9月, 2018 4 次提交
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由 Andrey Grodzovsky 提交于
After GPU reset amdgpu_vm_clear_bo triggers VM flush but job->vm_pd_addr is not set causing SDMA TO. v2: Per advise by Christian König avoid flushing VM for jobs where job->vm_pd_addr wasn't explicitly set. v3: Shortcut vm_flush_needed early. Fixes cbd52851 drm/amdgpu: move setting the GART addr into TTM. Signed-off-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Add helper to call the update function for both BO and shadow. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Add a function to get the parent of a PD/PT. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Slowly leaking memory one page at a time :) Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 9月, 2018 28 次提交
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由 shaoyunl 提交于
v2: compile fix Signed-off-by: Nshaoyunl <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Generate xGMI iolink for upper level usage Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Update the iolink type defines according to the new thunk spec Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Thunk will generate the XGMI topology information when necessary with the hive_id for each specified device Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Retrieve hive_id from amdgpu device v2: compile fix Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
KFD need to get hive id from amdgpu to build up the XGMI topology Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Driver will save an array of XGMI hive info, each hive will have a list of devices that have the same hive ID. Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Add dummy function for xgmi function interface with psp Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Place holder for XGMI support Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
On hives with xgmi enabled, the fb_location aperture is a size which defines the total framebuffer size of all nodes in the hive. Each GPU in the hive has the same view via the fb_location aperture. GPU0 starts at offset (0 * segment size), GPU1 starts at offset (1 * segment size), etc. For access to local vram on each GPU, we need to take this offset into account. This including on setting up GPUVM page table and GART table v2: squash in "drm/amdgpu: Init correct fb region for none XGMI configuration" Acked-by: NHuang Rui <ray.huang@amd.com> Acked-by: NSlava Abramov <slava.abramov@amd.com> Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NHuang Rui <ray.huang@amd.com>
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由 Alex Deucher 提交于
Used to populate the xgmi info on vega20. v2: PF_MAX_REGION is val - 1 (Ray) Acked-by: NHuang Rui <ray.huang@amd.com> Acked-by: NSlava Abramov <slava.abramov@amd.com> Reviewed-by :Shaoyun liu <Shaoyun.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by :Shaoyun liu <Shaoyun.liu@amd.com>
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由 Alex Deucher 提交于
Initial pass at a structure to store xgmi info. xgmi is a high speed cross gpu interconnect. Acked-by: NHuang Rui <ray.huang@amd.com> Acked-by: NSlava Abramov <slava.abramov@amd.com> Reviewed-by :Shaoyun liu <Shaoyun.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com>
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由 Shaoyun Liu 提交于
Correct the definition based on vega20 register spec Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Emily Deng 提交于
since we use PSP to program IH regs now Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NEmily Deng <Emily.Deng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Otherwise we might run into a use after free during bulk move. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
Fix SDMA hang in prt mode, clear XNACK_WATERMARK in reg SDMA0_UTCL1_WATERMK to avoid the issue Affected ASICs: VEGA10 VEGA12 RV1 RV2 v2: add reg clear for SDMA1 Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Tested-by: NYukun Li <yukun1.li@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
do_div expects the 1st argument in 64bit instead of 32bit. Drop the usage of do_div as it seems unnecessary. V2: drop usage of do_div completely Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Masanari Iida 提交于
This patch fixes following warnings. ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3011: warning: Excess function parameter 'dev' description in 'amdgpu_vm_get_task_info' ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012: warning: Function parameter or member 'adev' not described in 'amdgpu_vm_get_task_info' ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012: warning: Excess function parameter 'dev' description in 'amdgpu_vm_get_task_info' Signed-off-by: NMasanari Iida <standby24x7@gmail.com> Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Felix Kuehling 提交于
The intent of two commits was lost in the last rebase: 810955ba drm/amdgpu: Fix acquiring VM on large-BAR systems b5d21aac drm/amdgpu: Don't use shadow BO for compute context This commit restores the original behaviour: * Don't set AMDGPU_GEM_CREATE_NO_CPU_ACCESS for page directories to allow them to be reused for compute VMs * Don't create shadow BOs for page tables in compute VMs v2: move more logic into amdgpu_vm_bo_param Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Tested-by: NKent Russell <Kent.Russell@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Enable the old AGP aperture to avoid GART mappings. v2: don't enable it for SRIOV Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Felix Kuehling 提交于
Only initialize KFD once by moving amdgpu_amdkfd_init from amdgpu_pci_probe to amdgpu_init. This fixes kernel oopses and hangs when booting multi-GPU systems. Also removed some vestiges of KFD being its own module. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jun Lei 提交于
Existing debug dump are all invariant, new “low 32-bit of address” dump is not invariant Signed-off-by: NJun Lei <Jun.Lei@amd.com> Reviewed-by: NEric Yang <eric.yang2@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chiawen Huang 提交于
[Why] There are same purpose transition events. [How] remove the redundant event log. Signed-off-by: NChiawen Huang <chiawen.huang@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Francis 提交于
[Why] The extraneous call to amdgpu_pm_compute_clocks is deprecated. [How] Remove it. Signed-off-by: NDavid Francis <David.Francis@amd.com> Signed-off-by: NLeo Li <sunpeng.li@amd.com> Reviewed-by: NDavid Francis <David.Francis@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Yang 提交于
[Why] Virtual sink is used when set mode happens on a disconnected display to allow the mode set to proceed. This did not work with MST because the logic for acquiring stream encoder uses stream signal to determine the special handling is required, and stream signal is virtual instead of DP in this case. [How] Use link type to decide instead. Signed-off-by: NEric Yang <Eric.Yang2@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tony Cheng 提交于
Signed-off-by: NTony Cheng <tony.cheng@amd.com> Reviewed-by: NSteven Chiu <Steven.Chiu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Francis 提交于
[Why] The i2c and aux engines are similar, and should be placed next to eachother for readability [How] Reorder the elements of the resource_pool struct Signed-off-by: NDavid Francis <David.Francis@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Leo Li 提交于
[Why] Our implementation is functionally identical to DRM's Note that instead of checking if the provided id is 0, the helper follows through with the mode object search. However, It will still return NULL, since 0 is not a valid object id, and missed searches will return NULL. [How] Remove our implementation, and replace it with drm_atomic_helper_best_encoder. Signed-off-by: NLeo Li <sunpeng.li@amd.com> Reviewed-by: NDavid Francis <David.Francis@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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