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  1. 20 9月, 2009 1 次提交
    • S
      arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0 · 51b563fc
      由 Sam Ravnborg 提交于 
      Albin Tonnerre <albin.tonnerre@free-electrons.com> reported:

    Bash 4 filters out variables which contain a dot in them.
    This happends to be the case of CPPFLAGS_vmlinux.lds.
    This is rather unfortunate, as it now causes
    build failures when using SHELL=/bin/bash to compile,
    or when bash happens to be used by make (eg when it's /bin/sh)

Remove the common definition of CPPFLAGS_vmlinux.lds by
pushing relevant stuff to either Makefile.build or the
arch specific kernel/Makefile where we build the linker script.

This is also nice cleanup as we move the information out where
it is used.

Notes for the different architectures touched:

arm - we use an already exported symbol
cris - we use a config symbol aleady available
       [Not build tested]
mips - the jiffies complexity has moved to vmlinux.lds.S where we need it.
       Added a few variables to CPPFLAGS - they are only used by
       the linker script.
       [Not build tested]
powerpc - removed assignment that is not needed
          [not build tested]
sparc - simplified it using $(BITS)
um - introduced a few new exported variables to deal with this
xtensa - added options to CPP invocation
         [not build tested]

Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      51b563fc
  3. 18 9月, 2009 4 次提交
  5. 03 7月, 2009 1 次提交
  7. 17 6月, 2009 3 次提交
    • W
      MIPS: Add hibernation support · 363c55ca
      由 Wu Zhangjin 提交于 
      [Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support.  As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways.  So limit to !SMP.]
Reviewed-by: NPavel Machek <pavel@ucw.cz>
Reviewed-by: NYan Hua <yanh@lemote.com>
Reviewed-by: NArnaud Patard <apatard@mandriva.com>
Reviewed-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NHu Hongbing <huhb@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      363c55ca
    • M
      MIPS: Alchemy: Rewrite GPIO support. · 51e02b02
      由 Manuel Lauss 提交于 
      The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases.  To address this, the following changes are made:

* create generic functions which deal with manipulating the on-chip
  GPIO1/2 blocks.  Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.

  If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
  compatibility by directly inlining the GPIO1/2 functions.  GPIO access
  is limited to on-chip ones and they can be accessed as documented in
  the datasheets (GPIO0-31 and 200-215).

  If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
  one for GPIO2, are registered.  GPIOs can still be accessed by using
  the numberspace established in the databooks.

  However this is not yet flexible enough for my uses:  My Alchemy
  systems have a documented "external" gpio interface (fixed, different
  numberspace) and can support a variety of baseboards, some of which
  are equipped with I2C gpio expanders.  I want to be able to provide
  the default 16 GPIOs of the CPU board numbered as 0..15 and also
  support gpio expanders, if present, starting as gpio16.

  To achieve this, a new Kconfig symbol for Alchemy is introduced,
  CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
  that they don't want the Alchemy numberspace exposed to the outside
  world, but instead want to provide their own.  Boards are now respon-
  sible for providing the linux gpio interface glue code (either in a
  custom gpio.h header (in board include directory) or with gpio_chips).

  To make the board-specific inlined gpio functions work, the MIPS
  Makefile must be changed so that the mach-au1x00/gpio.h header is
  included _after_ the board headers, by moving the inclusion of
  the mach-au1x00/ to the end of the header list.

  See arch/mips/include/asm/mach-au1x00/gpio.h for more info.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      51e02b02
    • I
      MIPS: Sibyte: Remove standalone kernel support · 05f94eeb
      由 Imre Kaloz 提交于 
      CFE is the only supported and used bootloader on the SiByte boards,
the standalone kernel support has been never used outside Broadcom.
Remove it and make the kernel use CFE by default.
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      05f94eeb
  9. 21 5月, 2009 1 次提交
  11. 14 5月, 2009 2 次提交
  13. 30 3月, 2009 1 次提交
  15. 14 3月, 2009 1 次提交
  17. 11 1月, 2009 2 次提交
  19. 28 10月, 2008 4 次提交
  21. 11 10月, 2008 3 次提交
  23. 20 7月, 2008 1 次提交
  25. 16 7月, 2008 9 次提交
  27. 16 6月, 2008 2 次提交
  29. 29 4月, 2008 1 次提交
  31. 01 4月, 2008 1 次提交
  33. 12 3月, 2008 1 次提交
  35. 29 1月, 2008 2 次提交
    • R
      [MIPS] Qemu: Remove platform. · 302922e5
      由 Ralf Baechle 提交于 
      The Qemu platform was originally implemented to have an easily supportable
platform until Qemu reaches a state where it emulates a real world system.
Since the latest release Qemu is capable of emulating the MIPSsim and
Malta platforms, so this goal has been reached.  The Qemu plaform is also
rather underfeatured so less useful than a Malta emulation.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      302922e5
    • R
      [MIPS] Altas, Malta: Switch boot file format to raw. · fa71c960
      由 Ralf Baechle 提交于 
      A raw binary boots about twice as fast as SREC.

The possibility to generate SREC binaries remains by simply using the
vmlinux.srec target but seems only useful for the probably hypothetical
case where one of these systems is booted over a serial interface.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      fa71c960