- 09 4月, 2013 1 次提交
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由 Dirk Behme 提交于
Add ARM Cortex A9 Performance Monitor Unit (PMU) support. On i.MX6 a combined interrupt on hardware line #126 is used (i.MX6 TRM: Performance Unit interrupt). For more details see Documentation/devicetree/bindings/arm/pmu.txt Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 10 2月, 2013 6 次提交
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由 Shawn Guo 提交于
Add dtsi for imx6q and imx6dl with non-common blocks moved into there. Major differences between imx6dl and imx6q: * Dual vs. Quad cores * single vs. dual IPU * 128 vs. 256 KB OCRAM * imx6q: ECSPI5, OpenVG (GC355), SATA * imx6dl: I2C4, PXP, EPDC, LCDIF * iomuxc/pads definition Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
i.MX6 Quad and i.MX6 DualLite is similar enough to share one dtsi file, so rename imx6q.dtsi to imx6qdl.dtsi preparing for the addition of imx6dl support. Another member of i.MX6 series i.MX6 SoloLite is different enough from the other two, so it will stand as a separate dtsi. That's why we rename to imx6qdl.dtsi not imx6.dtsi. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Anson Huang 提交于
For ANATOP LDOs, vddcpu, vddsoc and vddpu have step time settings in the misc2 register, need to add necessary step time info for these three LDOs, then regulator driver can add necessary delay based on these settings. offset 0x170: bit [24-25]: vddcpu bit [26-27]: vddpu bit [28-29]: vddsoc field definition: 0'b00: 64 cycles of 24M clock; 0'b01: 128 cycles of 24M clock; 0'b02: 256 cycles of 24M clock; 0'b03: 512 cycles of 24M clock; Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Update operating-points per hardware document and add support for 1 GHz and 1.2 GHz frequencies. 400 MHz, 800 MHz and 1 GHz should be supported by all i.MX6Q chips, while 1.2 GHz support needs to know from OTP fuse bit. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
Remove silicon version from SDMA firmware. This makes it consistent with other i.MX SoCs firmware names. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Following omap3-evm.dts way, it changes all imx dts files to use label in board dts to refer to nodes defined by soc dtsi. Thus, the board dts files become easier to read and edit with the least indentation levels. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 05 2月, 2013 1 次提交
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由 Frank Li 提交于
ptp should use enet_ref instead of pll6_enet pll6_enet is fixed 500Mhz. There are divider between enet_ref and pll6_enet Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 22 11月, 2012 1 次提交
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
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- 16 11月, 2012 5 次提交
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由 Sascha Hauer 提交于
This adds the IPU devices to the devicetree. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
Having labels before each node allows board bindings to reference to nodes by using the &nodename {} notation. This way boards do not have to resemble the whole devicetree layout. Due to less indention needed the board files also get better readability. Since the label make the documentation behind the nodes unnecessary it is removed. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
According to Documentation/devicetree/bindings/mmc/mmc.txt bus-width is a mandatory property. While this is currently enforced nowhere, it's a good habit to just add the property now to allow to add common helper functionality for the mmc property parsing later. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 02 11月, 2012 1 次提交
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由 Frank Li 提交于
Add ENET 1588 clock input pin MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT and anatop PLL8 clock source for ENET Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 10月, 2012 1 次提交
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由 Shawn Guo 提交于
This is some amount of work left/forgot from device tree conversion. Instead of checking cpu_is_xxx to determine the controller type, the driver should use platform_device_id, which should match the device tree compatible string. The patch changes the driver to use platform_device_id rather than cpu_is_xxx to determine the controller type/version. It also updates the platform code and device tree source accordingly. As the result, mach/hardware.h inclusion gets removed from the driver. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: linux-i2c@vger.kernel.org
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- 19 9月, 2012 1 次提交
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 17 9月, 2012 3 次提交
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由 Dong Aisheng 提交于
Using syscon to access anatop register. Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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由 Dong Aisheng 提交于
Include headfile for easy using. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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由 Richard Zhao 提交于
- add usbmisc device - set property fsl,usbmisc for usb controllers - set disable-over-current for imx6q-sabrelite usb otg Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 11 9月, 2012 7 次提交
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由 Shawn Guo 提交于
It really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Add pinctrl settings for existing devices in imx6q-sabresd.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Add missing pinctrl of uart and enet for imx6q-arm2 board. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Add missing pinctrl of usdhc and enet for imx6q-sabrelite board. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Sort iomuxc sub-nodes in name so that the node can be located a little bit easier. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Name iomuxc sub-nodes following pin function and hardware manual. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Change the indentation for property fsl,pins a little bit, so that the first and the last line get the same indentation with all other lines. Then it will be easier to copy and past any of these lines. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 24 8月, 2012 1 次提交
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由 Fabio Estevam 提交于
Instead of enabling the watchdog in each individual dts file, select in the SoC dtsi file instead. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 07 8月, 2012 1 次提交
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由 Shawn Guo 提交于
Add alias for gpio nodes, so that gpio driver can identify the port number and then specify a sensible gpio base rather than using the one dynamically allocated by gpio core. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 7月, 2012 1 次提交
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由 Benoît Thébaudeau 提交于
Some mxc processors have an edge_sel feature, which allows the IRQ to be triggered by any edge. This patch makes use of this feature if available, which skips mxc_flip_edge(). Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@stericsson.com> Acked-by: NSascha Hauer <kernel@pengutronix.de> Cc: <linux-arm-kernel@lists.infradead.org> Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 12 7月, 2012 2 次提交
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由 Hui Wang 提交于
Imx6q sabrelite board uses ecspi1 to connect a spi flash sst25vf016b, we need to add pinctrl information for it in the dts, otherwise the ecspi1 driver can't work and the connected flash is wrongly detected as a mr25h256 flash like this: m25p80 spi32766.0: found mr25h256, expected sst25vf016b m25p80 spi32766.0: mr25h256 (32 Kbytes) Cc: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: NHui Wang <jason77.wang@gmail.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Richard Zhao 提交于
- add usbphy devices - add usb host controller and otg devices - add usb h1 vbus regulator Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 07 7月, 2012 1 次提交
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由 Shawn Guo 提交于
Change the value of #interrupt-cells of gpio nodes from 1 to 2, so that the gpio irq type can be specified in device tree. Also update binding document to make it clear. Reported-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 02 7月, 2012 2 次提交
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由 Huang Shijie 提交于
Add the DT node for gpmi nand. Add the pinmux support for gpmi nand. The gpmi nand may conflicts with other modules, such as MMC. So we do not enable the gpmi nand for mx6q-arm2 board, just add the node for the board. Acked-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Huang Shijie 提交于
add DT node for apbh-dma. Signed-off-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 11 5月, 2012 5 次提交
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org> Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org> Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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