- 12 1月, 2011 2 次提交
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由 Jesse Barnes 提交于
Enabling RC6 implies setting a graphics context. Make sure we do that only after the ring has been enabled, otherwise our ring commands will hang. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
Re-enable rc6 support on Ironlake for power savings. Adds a debugfs file to check current RC state, adds a missing workaround for Ironlake MI_SET_CONTEXT instructions, and renames MCHBAR_RENDER_STANDBY to RSTDBYCTL to match the docs. Keep RC6 and the power context disabled on pre-ILK. It only seems to hang and doesn't save any power. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 20 12月, 2010 1 次提交
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由 Chris Wilson 提交于
Manaul revert of 0cdab21f, just to remove the call to disable the clock gatings and powerctx before suspend. Peter Clifton bisected a suspend failure on his gme45 and found this to be the culprit. As this was intended to be a fix for a similar suspend failure for Ironlake (it didn't work), undoing this patch should have no other side-effects. Reported-and-tested-by: NPeter Clifton <pcjc2@cam.ac.uk> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 18 12月, 2010 1 次提交
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由 Jesse Barnes 提交于
Add an interrupt handler for switching graphics frequencies and handling PM interrupts. This should allow for increased performance when busy and lower power consumption when idle. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 06 12月, 2010 1 次提交
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 25 11月, 2010 1 次提交
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由 Chris Wilson 提交于
With KMS, we can simply relinquish the fence when we idle the GPU and reassign it upon first use. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 21 11月, 2010 1 次提交
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由 Chris Wilson 提交于
Under KMS, restoring the cursor is handled upon modeswitch in order to avoid enabling an undefined set of registers. At the moment, the cursor is restored before the aperture and modes are fully setup causing some invalid access during resume, such as: PGTBL_ER: 0x00040000 Invalid GTT entry during Cursor Fetch Fix this by only performing cursor register save/restore under UMS where it is done in the correct sequence. Reported-by: NArkadiusz Miskiewicz <arekm@maven.pl> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 04 11月, 2010 1 次提交
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由 Kyle McMartin 提交于
Fixes issue where i915_gfx_val was reporting values several orders of magnitude higher than physically possible (without leaving scorch marks on my thighs at least.) Signed-off-by: NKyle McMartin <kyle@redhat.com> Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@kernel.org Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 21 9月, 2010 1 次提交
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由 Chris Wilson 提交于
Avoid confusion between i965g meaning broadwater and the gen4+ chipset families. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 18 9月, 2010 1 次提交
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由 Chris Wilson 提交于
Use the GMBUS interface rather than direct bit banging to grab the EDID over DDC (and for other forms of auxiliary communication with external display controllers). The hope is that this method will be much faster and more reliable than bit banging for fetching EDIDs from buggy monitors or through switches, though we still preserve the bit banging as a fallback in case GMBUS fails. Based on an original patch by Jesse Barnes. Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 17 9月, 2010 1 次提交
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由 Chris Wilson 提交于
With 5 places to update when adding handling for fence registers, it is easy to overlook one or two. Correct that oversight, but fence management should be improved before a new set of registers is added. Bugzilla: https://bugs.freedesktop.org/show_bug?id=30199 Original patch by: Yuanhan Liu <yuanhan.liu@intel.com> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
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- 22 8月, 2010 2 次提交
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由 Chris Wilson 提交于
For the shared paths on the next generation chipsets. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 02 8月, 2010 1 次提交
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由 Zhao Yakui 提交于
About 0.2W power can be saved on one HP laptop. Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 13 4月, 2010 1 次提交
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由 Zhao Yakui 提交于
Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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- 23 2月, 2010 2 次提交
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由 Matthew Garrett 提交于
The ironlake render p-state support includes some rather odd variable names. Clean them up in order to improve the readability of the code. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Jesse Barnes 提交于
Ironlake (and 965GM, which this patch doesn't support) supports a hardware performance and power management feature that allows it to adjust to changes in GPU load over time with software help. The goal if this is to maximize performance/power for a given workload. This patch enables that feature, which is also a requirement for supporting Intelligent Power Sharing, a feature which allows for dynamic budgeting of power between the CPU and GPU in Arrandale platforms. Tested-by: Nykzhao <yakui.zhao@intel.com> [anholt: Resolved against the irq handler loop removal] Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 07 1月, 2010 1 次提交
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由 Andrew Lutomirski 提交于
We restored RC6 twice on resume, even with modesetting off. Instead, only restore it once and skip RC6 initialization entirely in non-KMS mode. Signed-off-by: NAndy Lutomirski <luto@mit.edu> Tested-by: NJeff Chua <jeff.chua.linux@gmail.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 08 12月, 2009 2 次提交
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由 Andrew Lutomirski 提交于
Rather than restoring just a few clock gating registers on resume, just reinitialize the whole thing. Signed-off-by: NAndy Lutomirski <luto@mit.edu> [anholt: Fixed up for RC6 support landed since the patch was written] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Adam Jackson 提交于
IGD* isn't a useful name. Replace with the codenames, as sourced from pci.ids. Signed-off-by: NAdam Jackson <ajax@redhat.com> [anholt: Fixed up for merge with pineview/ironlake changes] Signed-off-by: NEric Anholt <eric@anholt.net>
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- 02 12月, 2009 1 次提交
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由 Eric Anholt 提交于
This is a sync of a fix I made in the old UMS code. If the BIOS uses the GMBUS and doesn't clear that setup, then our bit-banging I2C can fail, leading to monitors not being detected. Signed-off-by: NEric Anholt <eric@anholt.net>
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- 13 11月, 2009 1 次提交
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由 Zhenyu Wang 提交于
Add more display registers save/restore to fix unstable issues during S4 testing on Ironlake. And DPLL_B_MD should not be restored on Ironlake. Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 06 11月, 2009 1 次提交
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由 Jesse Barnes 提交于
Render standy allows the GPU to power down the render unit when idle. In order for this to work, it needs a page of graphics memory to save state. This patch allocates that page and enables the feature on supported chipsets. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 24 10月, 2009 1 次提交
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由 Zhenyu Wang 提交于
This adds registers save/restore for Ironlake to make suspend work. Signed-off-by: NGuo, Chaohong <chaohong.guo@intel.com> [zhenyuw: some code re-orgnization, and add more save/restore for FDI link and transcoder registers, also fix palette register for Ironlake] Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 16 10月, 2009 1 次提交
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由 Jesse Barnes 提交于
Turns out some machines, like the ThinkPad X40 don't come back if you don't save/restore this register. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 14 10月, 2009 1 次提交
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由 Jesse Barnes 提交于
This hasn't fixed the regressions we were testing against, but clearly should be required. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 18 9月, 2009 1 次提交
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由 Ben Gamari 提交于
We move the display-specific code into it's own functions, called from the general GPU state save/restore functions. This will be needed later by the GPU reset code. Signed-off-by: NBen Gamari <bgamari.foss@gmail.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 05 9月, 2009 1 次提交
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由 Jesse Barnes 提交于
There are several sources of unnecessary power consumption on Intel graphics systems. The first is the LVDS clock. TFTs don't suffer from persistence issues like CRTs, and so we can reduce the LVDS refresh rate when the screen is idle. It will be automatically upclocked when userspace triggers graphical activity. Beyond that, we can enable memory self refresh. This allows the memory to go into a lower power state when the graphics are idle. Finally, we can drop some clocks on the gpu itself. All of these things can be reenabled between frames when GPU activity is triggered, and so there should be no user visible graphical changes. Signed-off-by: NJesse Barnes <jesse.barnes@intel.com> Signed-off-by: NMatthew Garrett <mjg@redhat.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 06 8月, 2009 1 次提交
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由 Roel Kluin 提交于
dev_priv->saveSWF1 is a 16 element array, but this reads up to index 22, and restored values from the wrong registers. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 11 7月, 2009 1 次提交
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由 Zhao Yakui 提交于
In KMS mode we now use the normal mode-setting paths to set the modes back to the current configuration, so we don't need to also run the more limited non-KMS implementation of modesetting for resume. Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 19 6月, 2009 1 次提交
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由 Keith Packard 提交于
Signed-off-by: NKeith Packard <keithp@keithp.com>
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- 04 6月, 2009 1 次提交
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由 Eric Anholt 提交于
This may fix cursor corruption in X on resume, which would persist until the cursor was hidden and then shown again. V2: Also include the cursor control regs. Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 01 5月, 2009 1 次提交
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由 Keith Packard 提交于
This makes software fallbacks not do tiling wrong on i965 and later after resume. It also should fix 945 performance reduction after resume which would have disabled tiling without causing any visible effect. Signed-off-by: NKeith Packard <keithp@keithp.com> [anholt: Fixed up the 915 case to not save/restore the new regs] Signed-off-by: NEric Anholt <eric@anholt.net>
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- 11 3月, 2009 1 次提交
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由 Pierre Willenbrock 提交于
The VGA registers just hit the pipe registers that we already set through MMIO. This fixes strange colors on resume. Signed-off-by: NPierre Willenbrock <pierre@pirsoft.de> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 26 11月, 2008 1 次提交
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由 Peng Li 提交于
It fixes suspend/resume failure of xf86-video-intel dri2 branch. As dri2 branch doesn't call I830DRIResume() to restore hardware status page anymore, we need to preserve this register across suspend/resume. Signed-off-by: NPeng Li <peng.li@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 11 11月, 2008 1 次提交
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由 Keith Packard 提交于
This register is set by the 2D driver to prevent lockups, and so it needs to be preserved across suspend/resume too. This makes my X200s work. Signed-off-by: NKeith Packard <keithp@keithp.com> Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@linux.ie>
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- 18 10月, 2008 4 次提交
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由 Jesse Barnes 提交于
Author: Zhenyu Wang <zhenyu.z.wang@intel.com> i915: official name for GM45 chipset Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jesse Barnes 提交于
[Patch against drm-next. Consider this a trial balloon for our new Linux development model.] This is a big chunk of code. Separating it out makes it easier to change without churn on the main i915_drv.c file (and there will be churn as we fix bugs and add things like kernel mode setting). Also makes it easier to share this file with BSD. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Matthew Garrett 提交于
This adds the support necessary for allowing ACPI backlight control to work on some newer Intel-based graphics systems. Tested on Thinkpad T61 and HP 2510p hardware. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Signed-off-by: NDave Airlie <airlied@linux.ie>
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由 Jesse Barnes 提交于
Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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