diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b50be449d3f5997f87c3466fc062509f4424154c..c3e852e9953e12824cc0d401bc9a2796fd44894e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1471,7 +1471,7 @@ config SB1_PASS_2_1_WORKAROUNDS config 64BIT_PHYS_ADDR bool "Support for 64-bit physical address space" - depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT + depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT config CPU_ADVANCED bool "Override CPU Options" @@ -1492,14 +1492,6 @@ config CPU_HAS_LLSC for better performance, N if you don't know. You must say Y here for multiprocessor machines. -config CPU_HAS_LLDSCD - bool "lld/scd Instructions available" if CPU_ADVANCED - default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1 - help - Say Y here if your CPU has the lld and scd instructions, the 64-bit - equivalents of ll and sc. Say Y here for better performance, N if - you don't know. You must say Y here for multiprocessor machines. - config CPU_HAS_WB bool "Writeback Buffer available" if CPU_ADVANCED default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION diff --git a/arch/mips/Makefile b/arch/mips/Makefile index e14ba5e01a360270d4be99bce5a56b9eda8fa6a1..2a9f2ef27b294aebe1d781921fc805d7fcfc9d76 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -93,7 +93,6 @@ endif # cflags-y += -I $(TOPDIR)/include/asm/gcc cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -cflags-y += $(call cc-option, -finline-limit=100000) LDFLAGS_vmlinux += -G 0 -static -n -nostdlib MODFLAGS += -mlong-calls diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig index 069f9d14983e036e24d6237322bb8a29f745a526..6fd353779813835a5da72a7f101f2e535c118413 100644 --- a/arch/mips/configs/bigsur_defconfig +++ b/arch/mips/configs/bigsur_defconfig @@ -130,7 +130,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_SIBYTE_DMA_PAGEOPS is not set # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index 216f4023a81b01cbbb1bc546602be1db6282ea8c..1d3ee18ea8bbbcb5fd57105211d90f90ebdca138 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig @@ -115,7 +115,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig index bea00a9e9269ccf1532835bb22bcd01dcf39979c..a81e2de6947f0db01e5eac4ffb090622e54d304c 100644 --- a/arch/mips/configs/ddb5476_defconfig +++ b/arch/mips/configs/ddb5476_defconfig @@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig index 61f7171ca7edd867b792eb1f33d88266faa83ea0..f1c27c2fb03326b896856da651c89b68d001d635 100644 --- a/arch/mips/configs/ddb5477_defconfig +++ b/arch/mips/configs/ddb5477_defconfig @@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig index 14e3815f11e6fb885c8e967397b00b2e9ec5ab7d..aa24d85ea94d12c687f1a031520baa45d76bb62e 100644 --- a/arch/mips/configs/ev64120_defconfig +++ b/arch/mips/configs/ev64120_defconfig @@ -118,7 +118,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig index 510819581d8aacf89a84ffeb230d54bb6a8a6fb3..eeed0e5ad260a9aabf34994e619215824b32d58f 100644 --- a/arch/mips/configs/ev96100_defconfig +++ b/arch/mips/configs/ev96100_defconfig @@ -121,7 +121,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 67979e3e606e645ce383237b60baead9933cbd9b..e56351abf87a403fdbd712d3df7a1602bf4f7bee 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index 03af44d1d846cc490e43d3f5a9552ff2bdb9ad23..e17d3adff02142bfc6bdbb53b050db8e14532d5a 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -119,7 +119,6 @@ CONFIG_PAGE_SIZE_4KB=y CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index cba2a49cceb1bd7816b425c2f14fcdeca517c096..967e7acd8e1f5e4efbf79b5ad3cd334ff3c980a5 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig @@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y CONFIG_RM7000_CPU_SCACHE=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig index e7ee1679af9060fc9602a30b9c9564e12f68f021..b5fa9639db6f35d6f6c8457864a1a7494e0bc5ff 100644 --- a/arch/mips/configs/it8172_defconfig +++ b/arch/mips/configs/it8172_defconfig @@ -117,7 +117,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig index 138c8a60a4dc054a78c1f8a070699279ae5a7364..71386938d47f155dc9f0c6e52ade74159df35ad1 100644 --- a/arch/mips/configs/ivr_defconfig +++ b/arch/mips/configs/ivr_defconfig @@ -114,7 +114,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig index 6238e0d6a43051d96c8f2fa254416f3820ec9f70..14fb46886708429e9d13ce9e73d4c85efdb4dd38 100644 --- a/arch/mips/configs/jaguar-atx_defconfig +++ b/arch/mips/configs/jaguar-atx_defconfig @@ -124,7 +124,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig index a7ad99b12fe5bcf47302e209f21109163d6e45c5..6c5df76d48d966f3c917e9bfd206d5d639718f61 100644 --- a/arch/mips/configs/lasat200_defconfig +++ b/arch/mips/configs/lasat200_defconfig @@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index d1c44216f1c11d2443e74fd13d5fb09007de584b..da0677a03c1d5b60ce081dcd617696faebb7a358 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.15-rc2 -# Thu Nov 24 01:06:35 2005 +# Linux kernel version: 2.6.15-rc5 +# Fri Dec 23 02:21:03 2005 # CONFIG_MIPS=y @@ -87,8 +87,8 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y # # CPU selection # -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS32_R1 is not set +CONFIG_CPU_MIPS32_R2=y # CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_MIPS64_R2 is not set # CONFIG_CPU_R3000 is not set @@ -112,7 +112,7 @@ CONFIG_SYS_HAS_CPU_MIPS64_R1=y CONFIG_SYS_HAS_CPU_NEVADA=y CONFIG_SYS_HAS_CPU_RM7000=y CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPSR1=y +CONFIG_CPU_MIPSR2=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig index 9081ea5a9dbd202f3663ae5d89606653b232b0a7..7ad8718c1b69a13ddebad0222a7c989f2f7074a5 100644 --- a/arch/mips/configs/ocelot_3_defconfig +++ b/arch/mips/configs/ocelot_3_defconfig @@ -122,7 +122,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig index 570fc4d18166383624fb1817386f45a2de8b8536..e8d6bb3551a2d2003c881545683a60cd5eef7677 100644 --- a/arch/mips/configs/ocelot_c_defconfig +++ b/arch/mips/configs/ocelot_c_defconfig @@ -118,7 +118,6 @@ CONFIG_RM7000_CPU_SCACHE=y CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig index 6634ab24715c62ba320254f4c058332a0543aac6..f3787b68bdd145774bbea53e1e8996bb3f55d82d 100644 --- a/arch/mips/configs/ocelot_defconfig +++ b/arch/mips/configs/ocelot_defconfig @@ -123,7 +123,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig index 4c396e1e2f0aa3629e875a638d4a26875c734625..b6126ad4d06d22c4a300b7a6807839f455263f16 100644 --- a/arch/mips/configs/ocelot_g_defconfig +++ b/arch/mips/configs/ocelot_g_defconfig @@ -121,7 +121,6 @@ CONFIG_RM7000_CPU_SCACHE=y CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig index d9a0d2fdba4f68a2d44d819f9812681aa656e939..4c650e7081339c57ea99ecf800d58574566e86a7 100644 --- a/arch/mips/configs/pnx8550-v2pci_defconfig +++ b/arch/mips/configs/pnx8550-v2pci_defconfig @@ -116,7 +116,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set CONFIG_CPU_ADVANCED=y CONFIG_CPU_HAS_LLSC=y -# CONFIG_CPU_HAS_LLDSCD is not set # CONFIG_CPU_HAS_WB is not set CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig index 1cc145023584312f7992609fad7892bc9db394ed..9aaa43024aec16ae6144a5ec92b6ce3512d10310 100644 --- a/arch/mips/configs/rbhma4500_defconfig +++ b/arch/mips/configs/rbhma4500_defconfig @@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set CONFIG_CPU_ADVANCED=y CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_WB=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index 30975b305ae55daacfc031b68ec464d95756f0c1..abf61095931ee6461b266d6e0fed0a6e82521331 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 63f1be18e9bf66bd62119b6c4cc1e867bef10d41..52048c906079a4f8d5774a22983771339ecf38ad 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig @@ -133,7 +133,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_SB1_PASS_1_WORKAROUNDS=y CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index d51d5d16297c0f1ab2c852ae2c3e341fb27f2690..468c2e443d710cc1427086ce43ccbe215d3b59bb 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig @@ -118,7 +118,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/defconfig b/arch/mips/defconfig index 2a1b844da43f8e76d21ddcfb1a980ce92da37fbd..4f125e9e8e0b4c6ae0b503ccebdd43ab491168ff 100644 --- a/arch/mips/defconfig +++ b/arch/mips/defconfig @@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5e1b08b00a33912f4567beb6c8463e4476f1c1d0..fac48ad27b3425b21494313820d1a156d4f1bfe4 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) } } +static char unknown_isa[] __initdata = KERN_ERR \ + "Unsupported ISA type, c0.config0: %d."; + static inline unsigned int decode_config0(struct cpuinfo_mips *c) { unsigned int config0; @@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) isa = (config0 & MIPS_CONF_AT) >> 13; switch (isa) { case 0: - c->isa_level = MIPS_CPU_ISA_M32; + switch ((config0 >> 10) & 7) { + case 0: + c->isa_level = MIPS_CPU_ISA_M32R1; + break; + case 1: + c->isa_level = MIPS_CPU_ISA_M32R2; + break; + default: + goto unknown; + } break; case 2: - c->isa_level = MIPS_CPU_ISA_M64; + switch ((config0 >> 10) & 7) { + case 0: + c->isa_level = MIPS_CPU_ISA_M64R1; + break; + case 1: + c->isa_level = MIPS_CPU_ISA_M64R2; + break; + default: + goto unknown; + } break; default: - panic("Unsupported ISA type, cp0.config0.at: %d.", isa); + goto unknown; } return config0 & MIPS_CONF_M; + +unknown: + panic(unknown_isa, config0); } static inline unsigned int decode_config1(struct cpuinfo_mips *c) @@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) break; case PRID_IMP_34K: c->cputype = CPU_34K; - c->isa_level = MIPS_CPU_ISA_M32; break; } } @@ -647,7 +670,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c) switch (c->processor_id & 0xff00) { case PRID_IMP_PR4450: c->cputype = CPU_PR4450; - c->isa_level = MIPS_CPU_ISA_M32; + c->isa_level = MIPS_CPU_ISA_M32R1; break; default: panic("Unknown Philips Core!"); /* REVISIT: die? */ @@ -690,8 +713,10 @@ __init void cpu_probe(void) if (c->options & MIPS_CPU_FPU) { c->fpu_id = cpu_get_fpu_id(); - if (c->isa_level == MIPS_CPU_ISA_M32 || - c->isa_level == MIPS_CPU_ISA_M64) { + if (c->isa_level == MIPS_CPU_ISA_M32R1 || + c->isa_level == MIPS_CPU_ISA_M32R2 || + c->isa_level == MIPS_CPU_ISA_M64R1 || + c->isa_level == MIPS_CPU_ISA_M64R2) { if (c->fpu_id & MIPS_FPIR_3D) c->ases |= MIPS_ASE_MIPS3D; } diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index dd725779d91fa19857e667a9c4131d381a16f410..0476a4dce14e47ac53e811f9a5a63feb9d98b605 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -205,7 +205,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r) return 1; } -void dump_regs(elf_greg_t *gp, struct pt_regs *regs) +void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs) { int i; @@ -231,7 +231,7 @@ int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs) { struct thread_info *ti = tsk->thread_info; long ksp = (unsigned long)ti + THREAD_SIZE - 32; - dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); + elf_dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); return 1; } diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 510da5fda567e55317e333f179a60eeb35bd039b..8d25493353040597a240a631c18b9340d38be30c 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -280,12 +280,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ret = -EIO; goto out; } - if (child->thread.dsp.used_dsp) { - dregs = __get_dsp_regs(child); - tmp = (unsigned long) (dregs[addr - DSP_BASE]); - } else { - tmp = -1; /* DSP registers yet used */ - } + dregs = __get_dsp_regs(child); + tmp = (unsigned long) (dregs[addr - DSP_BASE]); break; } case DSP_CONTROL: diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 7e55457a491f3c71b730dd5c3286030db571f02f..1f998bfde1656d88702c19e6b6deb34e50685217 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -201,12 +201,8 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) ret = -EIO; goto out_tsk; } - if (child->thread.dsp.used_dsp) { - dspreg_t *dregs = __get_dsp_regs(child); - tmp = (unsigned long) (dregs[addr - DSP_BASE]); - } else { - tmp = -1; /* DSP registers yet used */ - } + dspreg_t *dregs = __get_dsp_regs(child); + tmp = (unsigned long) (dregs[addr - DSP_BASE]); break; case DSP_CONTROL: if (!cpu_has_dsp) { diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index c856dbc52abbe68d7a9434ac202c78696548b238..98b185bbc947c0576851787a78836927f5b9d65e 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -588,7 +588,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs, err |= __put_user(regs->hi, &sc->sc_mdhi); err |= __put_user(regs->lo, &sc->sc_mdlo); if (cpu_has_dsp) { - err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1); + err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); err |= __put_user(mfhi1(), &sc->sc_hi1); err |= __put_user(mflo1(), &sc->sc_lo1); err |= __put_user(mfhi2(), &sc->sc_hi2); diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 787ed541d442b2449947825dbdd480d55b6d80bf..7050b4ffffcd34a992c6c99293cdb18d59fea15e 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) return IRQ_HANDLED; } +int null_perf_irq(struct pt_regs *regs) +{ + return 0; +} + +int (*perf_irq)(struct pt_regs *regs) = null_perf_irq; + +EXPORT_SYMBOL(null_perf_irq); +EXPORT_SYMBOL(perf_irq); + asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) { + int r2 = cpu_has_mips_r2; + irq_enter(); kstat_this_cpu.irqs[irq]++; + /* + * Suckage alert: + * Before R2 of the architecture there was no way to see if a + * performance counter interrupt was pending, so we have to run the + * performance counter interrupt handler anyway. + */ + if (!r2 || (read_c0_cause() & (1 << 26))) + if (perf_irq(regs)) + goto out; + /* we keep interrupt disabled all the time */ - timer_interrupt(irq, NULL, regs); + if (!r2 || (read_c0_cause() & (1 << 30))) + timer_interrupt(irq, NULL, regs); +out: irq_exit(); } @@ -628,9 +652,9 @@ void __init time_init(void) mips_hpt_init = c0_hpt_init; } - if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) + if (cpu_has_mips32r1 || cpu_has_mips32r2 || + (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || + (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) /* * We need to calibrate the counter but we don't have * 64-bit division. diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 9c89eebc356febd946fc44c8dc3f5d41eed8d8d2..ae83b755cf4aae68c24fe36b80f339665f9d42fd 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -99,9 +99,9 @@ struct vpe { /* elfloader stuff */ void *load_addr; - u32 len; + unsigned long len; char *pbuffer; - u32 plen; + unsigned long plen; unsigned long __start; @@ -253,11 +253,11 @@ void dump_mtregs(void) } /* Find some VPE program space */ -static void *alloc_progmem(u32 len) +static void *alloc_progmem(unsigned long len) { #ifdef CONFIG_MIPS_VPE_LOADER_TOM /* this means you must tell linux to use less memory than you physically have */ - return (void *)((max_pfn * PAGE_SIZE) + KSEG0); + return pfn_to_kaddr(max_pfn); #else // simple grab some mem for now return kmalloc(len, GFP_KERNEL); diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c index b5d5fa8337620a4905de4f76554ac9bbaae10c15..7e2ced715cfbdc4e1f925898a5df1c177b8bf005 100644 --- a/arch/mips/lib/iomap.c +++ b/arch/mips/lib/iomap.c @@ -3,7 +3,7 @@ * * This code is based on lib/iomap.c, by Linus Torvalds. * - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c index 0065deaee24b58919940c7f7e464cb34c14f0503..a1962eb460f827f5d9dfc24dd0739159333d9a54 100644 --- a/arch/mips/math-emu/dp_fint.c +++ b/arch/mips/math-emu/dp_fint.c @@ -33,8 +33,6 @@ ieee754dp ieee754dp_fint(int x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754dp_zero(0); if (x == 1 || x == -1) diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c index cb105b1dd860fcc37c1d1c5e19cc5ac3358913a4..eae90a866aa19e1bb60477f5ef98f828bf68a32c 100644 --- a/arch/mips/math-emu/dp_flong.c +++ b/arch/mips/math-emu/dp_flong.c @@ -33,8 +33,6 @@ ieee754dp ieee754dp_flong(s64 x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754dp_zero(0); if (x == 1 || x == -1) diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c index 42d9ed4b9a9463d65c97fdab2cb72605f5e8cfdb..7aac13afb09a6b2b706507611501da910337949d 100644 --- a/arch/mips/math-emu/sp_fint.c +++ b/arch/mips/math-emu/sp_fint.c @@ -33,8 +33,6 @@ ieee754sp ieee754sp_fint(int x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754sp_zero(0); if (x == 1 || x == -1) diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c index 1e26795ccecb7b0176f6ac757f6a39b54adf47ec..3d6c1d11c17889bfea252f2c78d4711e0f3049e4 100644 --- a/arch/mips/math-emu/sp_flong.c +++ b/arch/mips/math-emu/sp_flong.c @@ -33,8 +33,6 @@ ieee754sp ieee754sp_flong(s64 x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754sp_zero(0); if (x == 1 || x == -1) diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 72a12d931cbac1e7493a279fe542a01b828d8016..93f3bf2c2b22364217e4fe9ae925b1e36b8470e0 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -75,20 +75,31 @@ static void mips_timer_dispatch (struct pt_regs *regs) do_IRQ (mips_cpu_timer_irq, regs); } +extern int null_perf_irq(struct pt_regs *regs); + +extern int (*perf_irq)(struct pt_regs *regs); + irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { -#ifdef CONFIG_SMP + int r2 = cpu_has_mips_r2; int cpu = smp_processor_id(); if (cpu == 0) { /* - * CPU 0 handles the global timer interrupt job and process accounting - * resets count/compare registers to trigger next timer int. + * CPU 0 handles the global timer interrupt job and process + * accounting resets count/compare registers to trigger next + * timer int. */ - (void) timer_interrupt(irq, dev_id, regs); + if (!r2 || (read_c0_cause() & (1 << 26))) + if (perf_irq(regs)) + goto out; + + /* we keep interrupt disabled all the time */ + if (!r2 || (read_c0_cause() & (1 << 30))) + timer_interrupt(irq, NULL, regs); + scroll_display_message(); - } - else { + } else { /* Everyone else needs to reset the timer int here as ll_local_timer_interrupt doesn't */ /* @@ -103,16 +114,8 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) local_timer_interrupt (irq, dev_id, regs); } +out: return IRQ_HANDLED; -#else - irqreturn_t r; - - r = timer_interrupt(irq, dev_id, regs); - - scroll_display_message(); - - return r; -#endif } /* diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 38223b44d96229d9332c16463eceb1df0bdd534a..422b55fab07ab5b5dfb82341a3380b55696da902 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1183,8 +1183,8 @@ static void __init setup_scache(void) if (!sc_present) return; - if ((c->isa_level == MIPS_CPU_ISA_M32 || - c->isa_level == MIPS_CPU_ISA_M64) && + if ((c->isa_level == MIPS_CPU_ISA_M32R1 || + c->isa_level == MIPS_CPU_ISA_M64R1) && !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index dd2cc42f1b6dc5931638843c45b26f7728f5fa39..53f9889b30eda3c278cf4664e463a793e36e9948 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c @@ -75,7 +75,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) int res; switch (current_cpu_data.cputype) { + case CPU_5KC: + case CPU_20KC: case CPU_24K: + case CPU_25KF: lmodel = &op_model_mipsxx; break; diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h index f0121557047da3ca6c0f0bce2cecbc1f4d22da98..5cfce7d87a4da1b279bce8bf6f7682690dbe120b 100644 --- a/arch/mips/oprofile/op_impl.h +++ b/arch/mips/oprofile/op_impl.h @@ -12,8 +12,8 @@ struct pt_regs; -extern void null_perf_irq(struct pt_regs *regs); -extern void (*perf_irq)(struct pt_regs *regs); +extern int null_perf_irq(struct pt_regs *regs); +extern int (*perf_irq)(struct pt_regs *regs); /* Per-counter configuration as set via oprofilefs. */ struct op_counter_config { diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index d36b64dfcb2fd05094fb77805875de7af3a572ed..1d1eee407faf971a86b8f63b543aae90957d8ddd 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -114,11 +114,12 @@ static void mipsxx_cpu_stop(void *args) } } -static void mipsxx_perfcount_handler(struct pt_regs *regs) +static int mipsxx_perfcount_handler(struct pt_regs *regs) { unsigned int counters = op_model_mipsxx.num_counters; unsigned int control; unsigned int counter; + int handled = 0; switch (counters) { #define HANDLE_COUNTER(n) \ @@ -129,12 +130,15 @@ static void mipsxx_perfcount_handler(struct pt_regs *regs) (counter & M_COUNTER_OVERFLOW)) { \ oprofile_add_sample(regs, n); \ write_c0_perfcntr ## n(reg.counter[n]); \ + handled = 1; \ } HANDLE_COUNTER(3) HANDLE_COUNTER(2) HANDLE_COUNTER(1) HANDLE_COUNTER(0) } + + return handled; } #define M_CONFIG1_PC (1 << 4) @@ -176,17 +180,31 @@ static int __init mipsxx_init(void) int counters; counters = n_counters(); - if (counters == 0) + if (counters == 0) { + printk(KERN_ERR "Oprofile: CPU has no performance counters\n"); return -ENODEV; + } reset_counters(counters); op_model_mipsxx.num_counters = counters; switch (current_cpu_data.cputype) { + case CPU_20KC: + op_model_mipsxx.cpu_type = "mips/20K"; + break; + case CPU_24K: op_model_mipsxx.cpu_type = "mips/24K"; break; + case CPU_25KF: + op_model_mipsxx.cpu_type = "mips/25K"; + break; + + case CPU_5KC: + op_model_mipsxx.cpu_type = "mips/5K"; + break; + default: printk(KERN_ERR "Profiling unsupported for this CPU\n"); diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c index f2fc82c1c7c5105783d8a981175b5eb494e3c565..1e530751936ceafc142b379614b9cd136522e1d2 100644 --- a/arch/mips/pci/fixup-capcella.c +++ b/arch/mips/pci/fixup-capcella.c @@ -1,7 +1,7 @@ /* * fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups. * - * Copyright (C) 2002,2004 Yoichi Yuasa + * Copyright (C) 2002,2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c index 4975846da75a9fd7d079d332b204d5879331983b..b67ddaa47122768bd3070b0374e460fb37fc0d6e 100644 --- a/arch/mips/pci/fixup-mpc30x.c +++ b/arch/mips/pci/fixup-mpc30x.c @@ -1,7 +1,7 @@ /* * fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups. * - * Copyright (C) 2002,2004 Yoichi Yuasa + * Copyright (C) 2002,2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c index bc55b06e190446655922d0203aa866777a69688c..734f2b71e164cfee76f2849efc0a60e5ea654475 100644 --- a/arch/mips/pci/fixup-tb0219.c +++ b/arch/mips/pci/fixup-tb0219.c @@ -2,7 +2,7 @@ * fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups. * * Copyright (C) 2003 Megasolution Inc. - * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c index b5d42b12de10ad589962f4c5bcc2d36cd48c59a5..c9e7cb4361a19eb5e91bb848a72f168da7702d19 100644 --- a/arch/mips/pci/fixup-tb0226.c +++ b/arch/mips/pci/fixup-tb0226.c @@ -1,7 +1,7 @@ /* * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-tb0287.c b/arch/mips/pci/fixup-tb0287.c index 8436d7f1fdb2df118037398ed0ccbc7d1f5f2a7a..fbe6bcb2819977433eb2e05cfc712ef537c97f1c 100644 --- a/arch/mips/pci/fixup-tb0287.c +++ b/arch/mips/pci/fixup-tb0287.c @@ -1,7 +1,7 @@ /* * fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c index 430429b22ae1959bb5a3c0b2315360885cd547bf..900c6b32576c3db47e301655f42b5ca4f4c69f4b 100644 --- a/arch/mips/pci/ops-vr41xx.c +++ b/arch/mips/pci/ops-vr41xx.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2003 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c index 91df4da7ddb9dbb90bc1e80a749175199e3856f1..9885fa40360388e63bae7e60cb32ab594877d376 100644 --- a/arch/mips/pci/pci-vr41xx.c +++ b/arch/mips/pci/pci-vr41xx.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2003 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h index e087ec55641d9a1614955bfa8fd9f3e602412744..8a35e32b8376f734f61da3a74ec5b8726f5f1e48 100644 --- a/arch/mips/pci/pci-vr41xx.h +++ b/arch/mips/pci/pci-vr41xx.h @@ -3,7 +3,7 @@ * * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c index d29201acc4f31cc72087f1013a2cf9198217c82e..814900915c28510a4173f848d6a0f8dfd6c2fc22 100644 --- a/arch/mips/vr41xx/casio-e55/setup.c +++ b/arch/mips/vr41xx/casio-e55/setup.c @@ -1,7 +1,7 @@ /* * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index cdfa4273a1c50fafbe951a650efdd6ce9262c101..de0c1b35f11ce046afb5895f29e41c35bed34c9f 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +25,7 @@ * - New creation, NEC VR4122 and VR4131 are supported. * - Added support for NEC VR4111 and VR4121. * - * Yoichi Yuasa + * Yoichi Yuasa * - Added support for NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c index d758e432961bd0bb97b187011b33af670051483f..657c5133c933bb11aa89b236f29b818a37430b7e 100644 --- a/arch/mips/vr41xx/common/cmu.c +++ b/arch/mips/vr41xx/common/cmu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copuright (C) 2003-2005 Yoichi Yuasa + * Copuright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +25,7 @@ * - New creation, NEC VR4122 and VR4131 are supported. * - Added support for NEC VR4111 and VR4121. * - * Yoichi Yuasa + * Yoichi Yuasa * - Added support for NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 0b73c5ab3c0c1ff968803097e3090bbd1c0a3de3..07ae19cf0c296d93422abe4db50f5d5c30c4f683 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +25,7 @@ * - New creation, NEC VR4122 and VR4131 are supported. * - Added support for NEC VR4111 and VR4121. * - * Yoichi Yuasa + * Yoichi Yuasa * - Coped with INTASSIGN of NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 578f6496ffd40c07e6b6f2c4458a9414a6564fc8..707bd0933eedc2da82dd174bb408818da586aafc 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c @@ -1,7 +1,7 @@ /* * init.c, Common initialization routines for NEC VR4100 series. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/int-handler.S b/arch/mips/vr41xx/common/int-handler.S index 272c13aee4fd1c7e0bffc10e01330b278c7fd330..2b6043f16d098f0f125e99970747b6842e9b13c0 100644 --- a/arch/mips/vr41xx/common/int-handler.S +++ b/arch/mips/vr41xx/common/int-handler.S @@ -35,7 +35,7 @@ * MontaVista Software Inc. or * - New creation, NEC VR4100 series are supported. * - * Yoichi Yuasa + * Yoichi Yuasa * - Coped with INTASSIGN of NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 43b214d394383fdbaa71ee5a5eec4157b233d394..61aa264275ff2883d0f1fbec5871645a307a5287 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -1,7 +1,7 @@ /* * Interrupt handing routines for NEC VR4100 series. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c index 53166f3598b25fdd82cde85c1963fefa0e22c742..02bf4f7d06baa02803d6694d40275e6c384d856d 100644 --- a/arch/mips/vr41xx/common/pmu.c +++ b/arch/mips/vr41xx/common/pmu.c @@ -1,7 +1,7 @@ /* * pmu.c, Power Management Unit routines for NEC VR4100 series. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/type.c b/arch/mips/vr41xx/common/type.c index bcb5f71b5026b77780d7e35add1c508e849e9510..e0c1ac5e988e48335b471f8bf752ac21485a851f 100644 --- a/arch/mips/vr41xx/common/type.c +++ b/arch/mips/vr41xx/common/type.c @@ -1,7 +1,7 @@ /* * type.c, System type for NEC VR4100 series. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index cc52e75e14e727a45d056dd8c9f66f793dc6de16..3e31f8193d2115ef100674e6cddc015bd5acfa62 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2003 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2004 Yoichi Yuasa * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c index e4b34ad6ea61ec8bf3e087fb02d51007403e9e41..50fe8af4c52c8b3d57074fd9883629bd273b6a2e 100644 --- a/arch/mips/vr41xx/ibm-workpad/setup.c +++ b/arch/mips/vr41xx/ibm-workpad/setup.c @@ -1,7 +1,7 @@ /* * setup.c, Setup for the IBM WorkPad z50. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/char/tb0219.c b/drivers/char/tb0219.c index b3d411a756fee2d25a24882d60c3a9215c1ab593..ac2a297ce37c5a23354fdeca5ec0d84ffaa18079 100644 --- a/drivers/char/tb0219.c +++ b/drivers/char/tb0219.c @@ -1,7 +1,7 @@ /* * Driver for TANBAC TB0219 base board. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -27,7 +27,7 @@ #include #include -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("TANBAC TB0219 base board driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/char/vr41xx_giu.c b/drivers/char/vr41xx_giu.c index a5b18e086a9467f8a36053456aaacd1c308a9ee0..2267c7b81799d5b2cdeb55d8d0cc787fd1bf7821 100644 --- a/drivers/char/vr41xx_giu.c +++ b/drivers/char/vr41xx_giu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,7 +35,7 @@ #include #include -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/char/vr41xx_rtc.c b/drivers/char/vr41xx_rtc.c index 159acd8b77880bf76a6a9be94ce81a937e22e815..bc1b4a15212c2d939e4ed4508dcf5c70eacfe405 100644 --- a/drivers/char/vr41xx_rtc.c +++ b/drivers/char/vr41xx_rtc.c @@ -1,7 +1,7 @@ /* * Driver for NEC VR4100 series Real Time Clock unit. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -37,7 +37,7 @@ #include #include -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/vrc4171_card.c b/drivers/pcmcia/vrc4171_card.c index 24c547ef512b475ae652f759dae8a38008d2a34a..0574efd7828ac4f459f45d4f250cb319b135db69 100644 --- a/drivers/pcmcia/vrc4171_card.c +++ b/drivers/pcmcia/vrc4171_card.c @@ -1,7 +1,7 @@ /* * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,7 +33,7 @@ #include "i82365.h" MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services"); -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_LICENSE("GPL"); #define CARD_MAX_SLOTS 2 diff --git a/drivers/pcmcia/vrc4173_cardu.c b/drivers/pcmcia/vrc4173_cardu.c index b502db2790e0526042712cee16c03116ea381fe6..57f38dba0a48908162b08aecfcef9b7484224daa 100644 --- a/drivers/pcmcia/vrc4173_cardu.c +++ b/drivers/pcmcia/vrc4173_cardu.c @@ -6,7 +6,7 @@ * NEC VRC4173 CARDU driver for Socket Services * (This device doesn't support CardBus. it is supporting only 16bit PC Card.) * - * Copyright 2002,2003 Yoichi Yuasa + * Copyright 2002,2003 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -41,7 +41,7 @@ #include "vrc4173_cardu.h" MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services"); -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_LICENSE("GPL"); static int vrc4173_cardu_slots; diff --git a/drivers/pcmcia/vrc4173_cardu.h b/drivers/pcmcia/vrc4173_cardu.h index 113726f7cf9298104a76e869e19684b5b510785c..7d77c74120c1cb646fef6af93b80aa35bc964c01 100644 --- a/drivers/pcmcia/vrc4173_cardu.h +++ b/drivers/pcmcia/vrc4173_cardu.h @@ -5,7 +5,7 @@ * BRIEF MODULE DESCRIPTION * Include file for NEC VRC4173 CARDU. * - * Copyright 2002 Yoichi Yuasa + * Copyright 2002 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c index 0a28deeb098d6f0cf254a703196b2202dfcb824a..d61494d185cd3a04aef5c034a9cd6938d22e0dc1 100644 --- a/drivers/serial/vr41xx_siu.c +++ b/drivers/serial/vr41xx_siu.c @@ -1,7 +1,7 @@ /* * Driver for NEC VR4100 series Serial Interface Unit. * - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * Based on drivers/serial/8250.c, by Russell King. * diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 94a95872d7276914fecd98041b712c6c937dbceb..654b97d3e13a405302cdf0e96d04f83977841bf5 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -24,10 +24,9 @@ #define _ASM_ATOMIC_H #include +#include #include -extern spinlock_t atomic_lock; - typedef struct { volatile int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } @@ -85,9 +84,9 @@ static __inline__ void atomic_add(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter += i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -127,9 +126,9 @@ static __inline__ void atomic_sub(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter -= i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -173,11 +172,11 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result += i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -220,11 +219,11 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -277,12 +276,12 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; if (result >= 0) v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -433,9 +432,9 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter += i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -475,9 +474,9 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter -= i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -521,11 +520,11 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result += i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -568,11 +567,11 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -625,12 +624,12 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; if (result >= 0) v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 03627cfb3e45f17f011731ad5babe0a12450595b..78c9cc2735d5df2d5a1f916e9e9fdefc8ebe0ec5 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -116,6 +116,27 @@ #endif #endif +# ifndef cpu_has_mips32r1 +# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) +# endif +# ifndef cpu_has_mips32r2 +# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) +# endif +# ifndef cpu_has_mips64r1 +# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) +# endif +# ifndef cpu_has_mips64r2 +# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) +# endif + +/* + * Shortcuts ... + */ +#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2) +#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2) +#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1) +#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2) + #ifndef cpu_has_dsp #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) #endif diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 48eac296060f51c23edcc1d4e7adcf6a6eb88f04..934e063e79f1752f0ca0a8368ced8a66c85c34ba 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -204,16 +204,18 @@ */ #define MIPS_CPU_ISA_I 0x00000001 #define MIPS_CPU_ISA_II 0x00000002 -#define MIPS_CPU_ISA_III 0x00008003 -#define MIPS_CPU_ISA_IV 0x00008004 -#define MIPS_CPU_ISA_V 0x00008005 -#define MIPS_CPU_ISA_M32 0x00000020 -#define MIPS_CPU_ISA_M64 0x00008040 +#define MIPS_CPU_ISA_III 0x00000003 +#define MIPS_CPU_ISA_IV 0x00000004 +#define MIPS_CPU_ISA_V 0x00000005 +#define MIPS_CPU_ISA_M32R1 0x00000020 +#define MIPS_CPU_ISA_M32R2 0x00000040 +#define MIPS_CPU_ISA_M64R1 0x00000080 +#define MIPS_CPU_ISA_M64R2 0x00000100 -/* - * Bit 15 encodes if an ISA level supports 64-bit operations. - */ -#define MIPS_CPU_ISA_64BIT 0x00008000 +#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \ + MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 ) +#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \ + MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2) /* * CPU Option encodings diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index 48d00cccdafa9a5f490b47c1407a7ce14fa0a1a0..64dd45150f64f69e38c7116a28a05a0c508015ae 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h @@ -52,13 +52,11 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj) unsigned long lo; /* - * The common rates of 1000 and 128 are rounded wrongly by the - * catchall case for 64-bit. Excessive precission? Probably ... + * The rates of 128 is rounded wrongly by the catchall case + * for 64-bit. Excessive precission? Probably ... */ #if defined(CONFIG_64BIT) && (HZ == 128) usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ -#elif defined(CONFIG_64BIT) && (HZ == 1000) - usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */ #elif defined(CONFIG_64BIT) usecs *= (0x8000000000000000UL / (500000 / HZ)); #else /* 32-bit junk follows here */ diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h index 50f556bb49783d871d479366422ea2f59dd56d67..e9bfc0813c72e99a46b29dadb1c3556843fc31a1 100644 --- a/include/asm-mips/dsp.h +++ b/include/asm-mips/dsp.h @@ -16,7 +16,7 @@ #include #define DSP_DEFAULT 0x00000000 -#define DSP_MASK 0x1f +#define DSP_MASK 0x3ff #define __enable_dsp_hazard() \ do { \ @@ -48,6 +48,7 @@ do { \ tsk->thread.dsp.dspr[3] = mflo2(); \ tsk->thread.dsp.dspr[4] = mfhi3(); \ tsk->thread.dsp.dspr[5] = mflo3(); \ + tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \ } while (0) #define save_dsp(tsk) \ @@ -64,6 +65,7 @@ do { \ mtlo2(tsk->thread.dsp.dspr[3]); \ mthi3(tsk->thread.dsp.dspr[4]); \ mtlo3(tsk->thread.dsp.dspr[5]); \ + wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); \ } while (0) #define restore_dsp(tsk) \ diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h index d2c9a25f8459cab60a6a3e86438ab7c5ad43f2fc..851f013adad34a4541dad2cfce71f1823cfd15bb 100644 --- a/include/asm-mips/elf.h +++ b/include/asm-mips/elf.h @@ -277,12 +277,12 @@ do { \ struct task_struct; -extern void dump_regs(elf_greg_t *, struct pt_regs *regs); +extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); extern int dump_task_regs (struct task_struct *, elf_gregset_t *); extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); #define ELF_CORE_COPY_REGS(elf_regs, regs) \ - dump_regs((elf_greg_t *)&(elf_regs), regs); + elf_dump_regs((elf_greg_t *)&(elf_regs), regs); #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ dump_task_fpu(tsk, elf_fpregs) diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 7517189e469f51bd413609b5a2ec1d7728ca586d..2fc90632f88cfeaab2e8fbaea794a961019a3a6f 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -233,15 +233,25 @@ __asm__( #endif #ifdef CONFIG_CPU_MIPSR2 +/* + * gcc has a tradition of misscompiling the previous construct using the + * address of a label as argument to inline assembler. Gas otoh has the + * annoying difference between la and dla which are only usable for 32-bit + * rsp. 64-bit code, so can't be used without conditional compilation. + * The alterantive is switching the assembler to 64-bit code which happens + * to work right even for 32-bit code ... + */ #define instruction_hazard() \ do { \ -__label__ __next; \ + unsigned long tmp; \ + \ __asm__ __volatile__( \ + " .set mips64r2 \n" \ + " dla %0, 1f \n" \ " jr.hb %0 \n" \ - : \ - : "r" (&&__next)); \ -__next: \ - ; \ + " .set mips0 \n" \ + "1: \n" \ + : "=r" (tmp)); \ } while (0) #else diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h index a5735761f5e58054498b32a03bed21df06339470..abdf54ee64cf306d35b0dd32702c5fed061d4f58 100644 --- a/include/asm-mips/interrupt.h +++ b/include/asm-mips/interrupt.h @@ -93,6 +93,7 @@ __asm__ ( " .set noat \n" #ifdef CONFIG_CPU_MIPSR2 " di \\result \n" + " andi \\result, 1 \n" #else " mfc0 \\result, $12 \n" " ori $1, \\result, 1 \n" diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index 8327ec341c1899d70128f0ee044b82665c3855f1..8e1d7ed7d8e3c3d786e8d9d427b9a8848da4d2c9 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h @@ -838,6 +838,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define UART3_ADDR 0xB1400000 #define USB_OHCI_BASE 0x14020000 // phys addr for ioremap +#define USB_OHCI_LEN 0x00060000 #define USB_HOST_CONFIG 0xB4027ffc #define AU1550_ETH0_BASE 0xB0500000 @@ -1017,10 +1018,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define I2S_CONTROL_D (1<<1) #define I2S_CONTROL_CE (1<<0) -#ifndef CONFIG_SOC_AU1200 - /* USB Host Controller */ +#ifndef USB_OHCI_LEN #define USB_OHCI_LEN 0x00100000 +#endif + +#ifndef CONFIG_SOC_AU1200 /* USB Device Controller */ #define USBD_EP0RD 0xB0200000 diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h index ab97146681771a852eedd0643ab1e5af59bc92bb..2a37bedb40535b02f4aad8cd2beccdc1a8f3679d 100644 --- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h @@ -34,4 +34,9 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h index 4c8a90051fd013c9b2533ff53272dce0af771d5a..2d2f5b91e47fc967c165016b37fddc4b5a4616db 100644 --- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h @@ -37,4 +37,9 @@ #define cpu_icache_line_size() 64 #define cpu_scache_line_size() 128 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h index ab37fc1842ba53dba0ee6ec7400f71146c8221e1..b80c30725cf66578d0e30b22b407242cac41e908 100644 --- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h @@ -39,4 +39,9 @@ #define cpu_has_ic_fills_f_dc 0 #define cpu_has_dsp 0 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h index a0fde405d4c418950604eb4b0f24caccc7ff744b..90ff087083b95b31d72b700206a2a5dd69d3964a 100644 --- a/include/asm-mips/mach-ja/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h @@ -37,4 +37,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h index 825c5f674dfcb2045ae74938fdf0fac58a30f2da..782b986241ddce2e50e8867b12ab2ff98de57738 100644 --- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h @@ -40,4 +40,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h index 79f9b064c864af2b4b82f5db86afa82a57902933..91e7cf5f2bfecd7e760f6ab951d0f64f958ac205 100644 --- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h +++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h @@ -40,4 +40,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */ +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h index 463d051f46836107b3d4fa7110255d97966d21e5..3073542c93c74010834f20c9c4b27201a6712582 100644 --- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h @@ -37,4 +37,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 80370e0a5589ac90bb1b914de0a543d8d84afb1e..035ba0a9b0dfe3c62d1f80a510246e82b6e5ce35 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -1059,7 +1059,7 @@ do { \ " .set noat \n" \ " move $1, %0 \n" \ " # wrdsp $1, %x1 \n" \ - " .word 0x7c2004f8 | (%x1 << 15) \n" \ + " .word 0x7c2004f8 | (%x1 << 11) \n" \ " .set pop \n" \ : \ : "r" (val), "i" (mask)); \ diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index f1980c6c3bccd93c11ff86ee65a7e2cf41a5a872..de53055a62aea78884d5de09f52a4fa5829bc8cd 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h @@ -103,7 +103,6 @@ typedef __u32 dspreg_t; struct mips_dsp_state { dspreg_t dspr[NUM_DSP_REGS]; unsigned int dspcontrol; - unsigned short used_dsp; }; #define INIT_DSP {{0,},} diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h index 5b55083c52813d4617748c974eb91c02b3d3309c..d10ffda50de76d07bc329bc796b16f9b5f16c796 100644 --- a/include/asm-mips/vr41xx/capcella.h +++ b/include/asm-mips/vr41xx/capcella.h @@ -1,7 +1,7 @@ /* * capcella.h, Include file for ZAO Networks Capcella. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/e55.h b/include/asm-mips/vr41xx/e55.h index ea37b56fc66d3b5bdeec6adf8892235b530299f4..558f2269bf37fc3e689b029590935d4f647f7f7d 100644 --- a/include/asm-mips/vr41xx/e55.h +++ b/include/asm-mips/vr41xx/e55.h @@ -1,7 +1,7 @@ /* * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h index 8590885a763893192eb8b5bebd0608e47baa33e3..8109cda557dce747e0d0032c8bd59eda4b48f046 100644 --- a/include/asm-mips/vr41xx/giu.h +++ b/include/asm-mips/vr41xx/giu.h @@ -1,7 +1,7 @@ /* * Include file for NEC VR4100 series General-purpose I/O Unit. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h index e6ac3c8e8baeefc6db25a7463cec842d5e69facb..a6cbe4da6667b77f3a321357933a01e11112e142 100644 --- a/include/asm-mips/vr41xx/mpc30x.h +++ b/include/asm-mips/vr41xx/mpc30x.h @@ -1,7 +1,7 @@ /* * mpc30x.h, Include file for Victor MP-C303/304. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/pci.h b/include/asm-mips/vr41xx/pci.h index c473aa78d1d4f48a5552abf7655e15d4f56a9ec7..6fc01ce1977706fbb09325299342d55d7b073358 100644 --- a/include/asm-mips/vr41xx/pci.h +++ b/include/asm-mips/vr41xx/pci.h @@ -1,7 +1,7 @@ /* * Include file for NEC VR4100 series PCI Control Unit. * - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/siu.h b/include/asm-mips/vr41xx/siu.h index 865cc07ddd7fe439747231ca2db55e51d3c95626..1fcf6e8082b42621271bc87aa344e4ba4501ce5c 100644 --- a/include/asm-mips/vr41xx/siu.h +++ b/include/asm-mips/vr41xx/siu.h @@ -1,7 +1,7 @@ /* * Include file for NEC VR4100 series Serial Interface Unit. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h index 273c6392688ff3adf59e65d8c6a555aa3cb2102a..b318b9612a837cb389b82374ccc1e574f7099963 100644 --- a/include/asm-mips/vr41xx/tb0219.h +++ b/include/asm-mips/vr41xx/tb0219.h @@ -1,7 +1,7 @@ /* * tb0219.h, Include file for TANBAC TB0219. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * Modified for TANBAC TB0219: * Copyright (C) 2003 Megasolution Inc. diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h index 0ff9a60ecaccc9958c5423b7958dc707f2333c51..2513f450e2d65bc1f0cf03e05a0336a15bce1b76 100644 --- a/include/asm-mips/vr41xx/tb0226.h +++ b/include/asm-mips/vr41xx/tb0226.h @@ -1,7 +1,7 @@ /* * tb0226.h, Include file for TANBAC TB0226. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h index bd2723c309011461e27196f18746114be264dcce..70828d5fae9c999e473262990e352e2df7ea6918 100644 --- a/include/asm-mips/vr41xx/vr41xx.h +++ b/include/asm-mips/vr41xx/vr41xx.h @@ -7,7 +7,7 @@ * Copyright (C) 2001, 2002 Paul Mundt * Copyright (C) 2002 MontaVista Software, Inc. * Copyright (C) 2002 TimeSys Corp. - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h index bb7a85c186e4c7d663c7798b6f25d453f2c4a6a3..4d41a9c091d4d5371f3107c35435dd119bb5f2e2 100644 --- a/include/asm-mips/vr41xx/vrc4173.h +++ b/include/asm-mips/vr41xx/vrc4173.h @@ -4,7 +4,7 @@ * Copyright (C) 2000 Michael R. McDonald * Copyright (C) 2001-2003 Montavista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2004 Yoichi Yuasa * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify diff --git a/include/asm-mips/vr41xx/workpad.h b/include/asm-mips/vr41xx/workpad.h index dfe01b43fb79bc6185ea8eb7fdc968b79653fa13..6bfa9c009a9b0f47614b64231291a1c974ee8b55 100644 --- a/include/asm-mips/vr41xx/workpad.h +++ b/include/asm-mips/vr41xx/workpad.h @@ -1,7 +1,7 @@ /* * workpad.h, Include file for IBM WorkPad z50. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by