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cd07ecc8
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体验新版 GitCode,发现更多精彩内容 >>
提交
cd07ecc8
编写于
5月 28, 2009
作者:
T
Tony Lindgren
浏览文件
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差异文件
Merge branch 'omap4' into for-next
上级
4c50d22a
b04e8975
变更
33
显示空白变更内容
内联
并排
Showing
33 changed file
with
1550 addition
and
66 deletion
+1550
-66
arch/arm/Makefile
arch/arm/Makefile
+1
-0
arch/arm/configs/omap_4430sdp_defconfig
arch/arm/configs/omap_4430sdp_defconfig
+806
-0
arch/arm/mach-omap2/Kconfig
arch/arm/mach-omap2/Kconfig
+5
-1
arch/arm/mach-omap2/Makefile
arch/arm/mach-omap2/Makefile
+3
-0
arch/arm/mach-omap2/board-4430sdp.c
arch/arm/mach-omap2/board-4430sdp.c
+94
-0
arch/arm/mach-omap2/gpmc.c
arch/arm/mach-omap2/gpmc.c
+6
-0
arch/arm/mach-omap2/id.c
arch/arm/mach-omap2/id.c
+7
-1
arch/arm/mach-omap2/io.c
arch/arm/mach-omap2/io.c
+50
-2
arch/arm/mach-omap2/serial.c
arch/arm/mach-omap2/serial.c
+7
-0
arch/arm/mach-omap2/timer-gp.c
arch/arm/mach-omap2/timer-gp.c
+7
-2
arch/arm/plat-omap/Kconfig
arch/arm/plat-omap/Kconfig
+8
-3
arch/arm/plat-omap/clock.c
arch/arm/plat-omap/clock.c
+33
-0
arch/arm/plat-omap/common.c
arch/arm/plat-omap/common.c
+31
-0
arch/arm/plat-omap/devices.c
arch/arm/plat-omap/devices.c
+2
-0
arch/arm/plat-omap/dma.c
arch/arm/plat-omap/dma.c
+18
-5
arch/arm/plat-omap/dmtimer.c
arch/arm/plat-omap/dmtimer.c
+56
-3
arch/arm/plat-omap/gpio.c
arch/arm/plat-omap/gpio.c
+100
-34
arch/arm/plat-omap/include/mach/clock.h
arch/arm/plat-omap/include/mach/clock.h
+5
-3
arch/arm/plat-omap/include/mach/common.h
arch/arm/plat-omap/include/mach/common.h
+1
-0
arch/arm/plat-omap/include/mach/control.h
arch/arm/plat-omap/include/mach/control.h
+4
-3
arch/arm/plat-omap/include/mach/cpu.h
arch/arm/plat-omap/include/mach/cpu.h
+19
-2
arch/arm/plat-omap/include/mach/debug-macro.S
arch/arm/plat-omap/include/mach/debug-macro.S
+1
-1
arch/arm/plat-omap/include/mach/dma.h
arch/arm/plat-omap/include/mach/dma.h
+1
-0
arch/arm/plat-omap/include/mach/entry-macro.S
arch/arm/plat-omap/include/mach/entry-macro.S
+44
-2
arch/arm/plat-omap/include/mach/hardware.h
arch/arm/plat-omap/include/mach/hardware.h
+1
-0
arch/arm/plat-omap/include/mach/io.h
arch/arm/plat-omap/include/mach/io.h
+37
-0
arch/arm/plat-omap/include/mach/irqs.h
arch/arm/plat-omap/include/mach/irqs.h
+89
-0
arch/arm/plat-omap/include/mach/memory.h
arch/arm/plat-omap/include/mach/memory.h
+2
-1
arch/arm/plat-omap/include/mach/omap44xx.h
arch/arm/plat-omap/include/mach/omap44xx.h
+46
-0
arch/arm/plat-omap/include/mach/serial.h
arch/arm/plat-omap/include/mach/serial.h
+14
-2
arch/arm/plat-omap/io.c
arch/arm/plat-omap/io.c
+28
-1
arch/arm/plat-omap/mux.c
arch/arm/plat-omap/mux.c
+3
-0
arch/arm/plat-omap/sram.c
arch/arm/plat-omap/sram.c
+21
-0
未找到文件。
arch/arm/Makefile
浏览文件 @
cd07ecc8
...
...
@@ -127,6 +127,7 @@ endif
machine-$(CONFIG_ARCH_OMAP1)
:=
omap1
machine-$(CONFIG_ARCH_OMAP2)
:=
omap2
machine-$(CONFIG_ARCH_OMAP3)
:=
omap2
machine-$(CONFIG_ARCH_OMAP4)
:=
omap2
plat-$(CONFIG_ARCH_OMAP)
:=
omap
machine-$(CONFIG_ARCH_S3C2410)
:=
s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
machine-$(CONFIG_ARCH_S3C24A0)
:=
s3c24a0
...
...
arch/arm/configs/omap_4430sdp_defconfig
0 → 100644
浏览文件 @
cd07ecc8
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.29
# Fri April 19 19:58:24 20089
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
# CONFIG_NO_IOPORT is not set
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_GROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_RT_GROUP_SCHED is not set
CONFIG_USER_SCHED=y
# CONFIG_CGROUP_SCHED is not set
# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_COMPAT_BRK=y
# CONFIG_SLAB is not set
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_FREEZER is not set
#
# System Type
#
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_LOKI is not set
# CONFIG_ARCH_MV78XX0 is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_ORION5X is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_DAVINCI is not set
CONFIG_ARCH_OMAP=y
# CONFIG_ARCH_MSM is not set
# CONFIG_ARCH_W90X900 is not set
#
# TI OMAP Implementations
#
# CONFIG_ARCH_OMAP1 is not set
# CONFIG_ARCH_OMAP2 is not set
# CONFIG_ARCH_OMAP3 is not set
CONFIG_ARCH_OMAP4=y
#
# OMAP Feature Selections
#
# CONFIG_OMAP_RESET_CLOCKS is not set
# CONFIG_OMAP_COMPONENT_VERSION is not set
# CONFIG_OMAP_GPIO_SWITCH is not set
# CONFIG_OMAP_MUX is not set
# CONFIG_OMAP_MCBSP is not set
# CONFIG_OMAP_MBOX_FWK is not set
# CONFIG_OMAP_MPU_TIMER is not set
CONFIG_OMAP_32K_TIMER=y
CONFIG_OMAP_32K_TIMER_HZ=128
CONFIG_OMAP_DM_TIMER=y
CONFIG_OMAP_LL_DEBUG_UART1=y
# CONFIG_OMAP_LL_DEBUG_UART2 is not set
# CONFIG_OMAP_LL_DEBUG_UART3 is not set
#
# OMAP Board Type
#
CONFIG_MACH_OMAP_4430SDP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_PABRT_IFAR=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
# CONFIG_ARM_THUMBEE is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_DCACHE_DISABLE=y
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_HAS_TLS_REG=y
# CONFIG_OUTER_CACHE is not set
CONFIG_ARM_GIC=y
#
# Bus support
#
# CONFIG_PCI_SYSCALL is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
#
# Kernel Features
#
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PREEMPT is not set
CONFIG_HZ=128
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_ARCH_FLATMEM_HAS_HOLES=y
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
# CONFIG_UNEVICTABLE_LRU is not set
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS0,115200n8 initrd=0x81600000,20M ramdisk_size=20480"
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set
#
# CPU Power Management
#
# CONFIG_CPU_FREQ is not set
# CONFIG_CPU_IDLE is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
CONFIG_VFP=y
CONFIG_VFPv3=y
# CONFIG_NEON is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_HAVE_AOUT=y
# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_MISC=y
#
# Power management options
#
# CONFIG_PM is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_NET is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_MTD is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=16384
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_MISC_DEVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
# CONFIG_SPI is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
#
# Memory mapped GPIO expanders:
#
#
# I2C GPIO expanders:
#
#
# PCI GPIO expanders:
#
#
# SPI GPIO expanders:
#
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
CONFIG_DAB=y
#
# Graphics support
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_SOUND is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_NEW_LEDS is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
# CONFIG_REGULATOR is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
#
# CBUS support
#
# CONFIG_CBUS is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_BTRFS_FS is not set
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_QUOTA=y
CONFIG_PRINT_QUOTA_WARNING=y
CONFIG_QUOTA_TREE=y
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=y
CONFIG_QUOTACTL=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
CONFIG_FRAME_POINTER=y
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_HAVE_FUNCTION_TRACER=y
#
# Tracers
#
# CONFIG_FUNCTION_TRACER is not set
# CONFIG_IRQSOFF_TRACER is not set
# CONFIG_SCHED_TRACER is not set
# CONFIG_CONTEXT_SWITCH_TRACER is not set
# CONFIG_BOOT_TRACER is not set
# CONFIG_TRACE_BRANCH_PROFILING is not set
# CONFIG_STACK_TRACER is not set
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_ICEDCC is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set
#
# Block modes
#
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=y
# CONFIG_CRC16 is not set
CONFIG_CRC_T10DIF=y
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=y
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
arch/arm/mach-omap2/Kconfig
浏览文件 @
cd07ecc8
...
...
@@ -25,7 +25,7 @@ config ARCH_OMAP3430
select ARCH_OMAP_OTG
comment "OMAP Board Type"
depends on ARCH_OMAP2 || ARCH_OMAP3
depends on ARCH_OMAP2 || ARCH_OMAP3
|| ARCH_OMAP4
config MACH_OMAP_GENERIC
bool "Generic OMAP board"
...
...
@@ -75,3 +75,7 @@ config MACH_NOKIA_RX51
config MACH_OMAP_ZOOM2
bool "OMAP3 Zoom2 board"
depends on ARCH_OMAP3 && ARCH_OMAP34XX
config MACH_OMAP_4430SDP
bool "OMAP 4430 SDP board"
depends on ARCH_OMAP4
arch/arm/mach-omap2/Makefile
浏览文件 @
cd07ecc8
...
...
@@ -60,6 +60,9 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
obj-$(CONFIG_MACH_OMAP_ZOOM2)
+=
board-zoom2.o
\
mmc-twl4030.o
\
board-zoom-debugboard.o
obj-$(CONFIG_MACH_OMAP_4430SDP)
+=
board-4430sdp.o
# Platform specific device init code
obj-y
+=
usb-musb.o
...
...
arch/arm/mach-omap2/board-4430sdp.c
0 → 100644
浏览文件 @
cd07ecc8
/*
* Board support file for OMAP4430 SDP.
*
* Copyright (C) 2009 Texas Instruments
*
* Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* Based on mach-omap2/board-3430sdp.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/board.h>
#include <mach/common.h>
#include <mach/control.h>
#include <mach/timer-gp.h>
#include <asm/hardware/gic.h>
static
struct
platform_device
sdp4430_lcd_device
=
{
.
name
=
"sdp4430_lcd"
,
.
id
=
-
1
,
};
static
struct
platform_device
*
sdp4430_devices
[]
__initdata
=
{
&
sdp4430_lcd_device
,
};
static
struct
omap_uart_config
sdp4430_uart_config
__initdata
=
{
.
enabled_uarts
=
(
1
<<
0
)
|
(
1
<<
1
)
|
(
1
<<
2
),
};
static
struct
omap_lcd_config
sdp4430_lcd_config
__initdata
=
{
.
ctrl_name
=
"internal"
,
};
static
struct
omap_board_config_kernel
sdp4430_config
[]
__initdata
=
{
{
OMAP_TAG_UART
,
&
sdp4430_uart_config
},
{
OMAP_TAG_LCD
,
&
sdp4430_lcd_config
},
};
static
void
__init
gic_init_irq
(
void
)
{
gic_dist_init
(
0
,
IO_ADDRESS
(
OMAP44XX_GIC_DIST_BASE
),
29
);
gic_cpu_init
(
0
,
IO_ADDRESS
(
OMAP44XX_GIC_CPU_BASE
));
}
static
void
__init
omap_4430sdp_init_irq
(
void
)
{
omap2_init_common_hw
(
NULL
);
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer
(
1
);
#endif
gic_init_irq
();
omap_gpio_init
();
}
static
void
__init
omap_4430sdp_init
(
void
)
{
platform_add_devices
(
sdp4430_devices
,
ARRAY_SIZE
(
sdp4430_devices
));
omap_board_config
=
sdp4430_config
;
omap_board_config_size
=
ARRAY_SIZE
(
sdp4430_config
);
omap_serial_init
();
}
static
void
__init
omap_4430sdp_map_io
(
void
)
{
omap2_set_globals_443x
();
omap2_map_common_io
();
}
MACHINE_START
(
OMAP_4430SDP
,
"OMAP4430 4430SDP board"
)
/* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
.
phys_io
=
0x48000000
,
.
io_pg_offst
=
((
0xd8000000
)
>>
18
)
&
0xfffc
,
.
boot_params
=
0x80000100
,
.
map_io
=
omap_4430sdp_map_io
,
.
init_irq
=
omap_4430sdp_init_irq
,
.
init_machine
=
omap_4430sdp_init
,
.
timer
=
&
omap_timer
,
MACHINE_END
arch/arm/mach-omap2/gpmc.c
浏览文件 @
cd07ecc8
...
...
@@ -5,6 +5,9 @@
*
* Author: Juha Yrjola
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
...
...
@@ -424,6 +427,9 @@ void __init gpmc_init(void)
}
else
if
(
cpu_is_omap34xx
())
{
ck
=
"gpmc_fck"
;
l
=
OMAP34XX_GPMC_BASE
;
}
else
if
(
cpu_is_omap44xx
())
{
ck
=
"gpmc_fck"
;
l
=
OMAP44XX_GPMC_BASE
;
}
gpmc_l3_clk
=
clk_get
(
NULL
,
ck
);
...
...
arch/arm/mach-omap2/id.c
浏览文件 @
cd07ecc8
...
...
@@ -6,6 +6,9 @@
* Copyright (C) 2005 Nokia Corporation
* Written by Tony Lindgren <tony@atomide.com>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
...
...
@@ -200,7 +203,10 @@ void __init omap2_check_revision(void)
omap24xx_check_revision
();
else
if
(
cpu_is_omap34xx
())
omap34xx_check_revision
();
else
else
if
(
cpu_is_omap44xx
())
{
printk
(
KERN_INFO
"FIXME: CPU revision = OMAP4430
\n
"
);
return
;
}
else
pr_err
(
"OMAP revision unknown, please fix!
\n
"
);
/*
...
...
arch/arm/mach-omap2/io.c
浏览文件 @
cd07ecc8
...
...
@@ -4,12 +4,14 @@
* OMAP2 I/O mapping code
*
* Copyright (C) 2005 Nokia Corporation
* Copyright (C) 2007 Texas Instruments
* Copyright (C) 2007
-2009
Texas Instruments
*
* Author:
* Juha Yrjola <juha.yrjola@nokia.com>
* Syed Khasim <x0khasim@ti.com>
*
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
...
...
@@ -30,6 +32,7 @@
#include <mach/sdrc.h>
#include <mach/gpmc.h>
#ifndef CONFIG_ARCH_OMAP4
/* FIXME: Remove this once clkdev is ready */
#include "clock.h"
#include <mach/powerdomain.h>
...
...
@@ -38,7 +41,7 @@
#include <mach/clockdomain.h>
#include "clockdomains.h"
#endif
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
...
...
@@ -166,6 +169,46 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
},
};
#endif
#ifdef CONFIG_ARCH_OMAP4
static
struct
map_desc
omap44xx_io_desc
[]
__initdata
=
{
{
.
virtual
=
L3_44XX_VIRT
,
.
pfn
=
__phys_to_pfn
(
L3_44XX_PHYS
),
.
length
=
L3_44XX_SIZE
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
L4_44XX_VIRT
,
.
pfn
=
__phys_to_pfn
(
L4_44XX_PHYS
),
.
length
=
L4_44XX_SIZE
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
L4_WK_44XX_VIRT
,
.
pfn
=
__phys_to_pfn
(
L4_WK_44XX_PHYS
),
.
length
=
L4_WK_44XX_SIZE
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
OMAP44XX_GPMC_VIRT
,
.
pfn
=
__phys_to_pfn
(
OMAP44XX_GPMC_PHYS
),
.
length
=
OMAP44XX_GPMC_SIZE
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
L4_PER_44XX_VIRT
,
.
pfn
=
__phys_to_pfn
(
L4_PER_44XX_PHYS
),
.
length
=
L4_PER_44XX_SIZE
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
L4_EMU_44XX_VIRT
,
.
pfn
=
__phys_to_pfn
(
L4_EMU_44XX_PHYS
),
.
length
=
L4_EMU_44XX_SIZE
,
.
type
=
MT_DEVICE
,
},
};
#endif
void
__init
omap2_map_common_io
(
void
)
{
...
...
@@ -183,6 +226,9 @@ void __init omap2_map_common_io(void)
iotable_init
(
omap34xx_io_desc
,
ARRAY_SIZE
(
omap34xx_io_desc
));
#endif
#if defined(CONFIG_ARCH_OMAP4)
iotable_init
(
omap44xx_io_desc
,
ARRAY_SIZE
(
omap44xx_io_desc
));
#endif
/* Normally devicemaps_init() would flush caches and tlb after
* mdesc->map_io(), but we must also do it here because of the CPU
* revision check below.
...
...
@@ -198,9 +244,11 @@ void __init omap2_map_common_io(void)
void
__init
omap2_init_common_hw
(
struct
omap_sdrc_params
*
sp
)
{
omap2_mux_init
();
#ifndef CONFIG_ARCH_OMAP4
/* FIXME: Remove this once the clkdev is ready */
pwrdm_init
(
powerdomains_omap
);
clkdm_init
(
clockdomains_omap
,
clkdm_pwrdm_autodeps
);
omap2_clk_init
();
omap2_sdrc_init
(
sp
);
#endif
gpmc_init
();
}
arch/arm/mach-omap2/serial.c
浏览文件 @
cd07ecc8
...
...
@@ -10,6 +10,9 @@
*
* Based off of arch/arm/mach-omap/omap1/serial.c
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
...
...
@@ -493,6 +496,10 @@ void __init omap_serial_init(void)
if
(
info
==
NULL
)
return
;
if
(
cpu_is_omap44xx
())
{
for
(
i
=
0
;
i
<
OMAP_MAX_NR_PORTS
;
i
++
)
serial_platform_data
[
i
].
irq
+=
32
;
}
for
(
i
=
0
;
i
<
OMAP_MAX_NR_PORTS
;
i
++
)
{
struct
plat_serial8250_port
*
p
=
serial_platform_data
+
i
;
...
...
arch/arm/mach-omap2/timer-gp.c
浏览文件 @
cd07ecc8
...
...
@@ -17,9 +17,10 @@
*
* Some parts based off of TI's 24xx code:
*
*
Copyright (C) 2004
Texas Instruments, Inc.
*
Copyright (C) 2004-2009
Texas Instruments, Inc.
*
* Roughly modelled after the OMAP1 MPU timer code.
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
...
...
@@ -82,7 +83,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
case
CLOCK_EVT_MODE_PERIODIC
:
period
=
clk_get_rate
(
omap_dm_timer_get_fclk
(
gptimer
))
/
HZ
;
period
-=
1
;
if
(
cpu_is_omap44xx
())
period
=
0xff
;
/* FIXME: */
omap_dm_timer_set_load_start
(
gptimer
,
1
,
0xffffffff
-
period
);
break
;
case
CLOCK_EVT_MODE_ONESHOT
:
...
...
@@ -145,6 +147,9 @@ static void __init omap2_gp_clockevent_init(void)
"timer-gp: omap_dm_timer_set_source() failed
\n
"
);
tick_rate
=
clk_get_rate
(
omap_dm_timer_get_fclk
(
gptimer
));
if
(
cpu_is_omap44xx
())
/* Assuming 32kHz clk is driving GPT1 */
tick_rate
=
32768
;
/* FIXME: */
pr_info
(
"OMAP clockevent source: GPTIMER%d at %u Hz
\n
"
,
gptimer_id
,
tick_rate
);
...
...
arch/arm/plat-omap/Kconfig
浏览文件 @
cd07ecc8
...
...
@@ -23,6 +23,11 @@ config ARCH_OMAP3
select CPU_V7
select COMMON_CLKDEV
config ARCH_OMAP4
bool "TI OMAP4"
select CPU_V7
select ARM_GIC
endchoice
comment "OMAP Feature Selections"
...
...
@@ -128,13 +133,13 @@ config OMAP_MPU_TIMER
config OMAP_32K_TIMER
bool "Use 32KHz timer"
depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
|| ARCH_OMAP4
help
Select this option if you want to enable the OMAP 32KHz timer.
This timer saves power compared to the OMAP_MPU_TIMER, and has
support for no tick during idle. The 32KHz timer provides less
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
currently only available for OMAP16XX, 24XX
and 34XX
.
currently only available for OMAP16XX, 24XX
, 34XX and OMAP4
.
endchoice
...
...
@@ -149,7 +154,7 @@ config OMAP_32K_TIMER_HZ
config OMAP_DM_TIMER
bool "Use dual-mode timer"
depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
|| ARCH_OMAP4
help
Select this option if you want to use OMAP Dual-Mode timers.
...
...
arch/arm/plat-omap/clock.c
浏览文件 @
cd07ecc8
...
...
@@ -36,10 +36,40 @@ static struct clk_functions *arch_clock;
* Standard clock functions defined in include/linux/clk.h
*-------------------------------------------------------------------------*/
/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
* clock framework is not up , it is defined here to avoid rework in
* every driver. Also dummy prcm reset function is added */
/* Dummy hooks only for OMAP4.For rest OMAPs, common clkdev is used */
#if defined(CONFIG_ARCH_OMAP4)
struct
clk
*
clk_get
(
struct
device
*
dev
,
const
char
*
id
)
{
return
NULL
;
}
EXPORT_SYMBOL
(
clk_get
);
void
clk_put
(
struct
clk
*
clk
)
{
}
EXPORT_SYMBOL
(
clk_put
);
void
omap2_clk_prepare_for_reboot
(
void
)
{
}
EXPORT_SYMBOL
(
omap2_clk_prepare_for_reboot
);
void
omap_prcm_arch_reset
(
char
mode
)
{
}
EXPORT_SYMBOL
(
omap_prcm_arch_reset
);
#endif
int
clk_enable
(
struct
clk
*
clk
)
{
unsigned
long
flags
;
int
ret
=
0
;
if
(
cpu_is_omap44xx
())
/* OMAP4 clk framework not supported yet */
return
0
;
if
(
clk
==
NULL
||
IS_ERR
(
clk
))
return
-
EINVAL
;
...
...
@@ -140,6 +170,9 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
unsigned
long
flags
;
int
ret
=
-
EINVAL
;
if
(
cpu_is_omap44xx
())
/* OMAP4 clk framework not supported yet */
return
0
;
if
(
clk
==
NULL
||
IS_ERR
(
clk
)
||
parent
==
NULL
||
IS_ERR
(
parent
))
return
ret
;
...
...
arch/arm/plat-omap/common.c
浏览文件 @
cd07ecc8
...
...
@@ -2,6 +2,10 @@
* linux/arch/arm/plat-omap/common.c
*
* Code common to all OMAP machines.
* The file is created by Tony Lindgren <tony@atomide.com>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
...
...
@@ -216,6 +220,15 @@ static cycle_t omap34xx_32k_read(struct clocksource *cs)
#define omap34xx_32k_read NULL
#endif
#ifdef CONFIG_ARCH_OMAP4
static
cycle_t
omap44xx_32k_read
(
struct
clocksource
*
cs
)
{
return
omap_readl
(
OMAP4430_32KSYNCT_BASE
+
0x10
);
}
#else
#define omap44xx_32k_read NULL
#endif
/*
* Kernel assumes that sched_clock can be called early but may not have
* things ready yet.
...
...
@@ -263,6 +276,8 @@ static int __init omap_init_clocksource_32k(void)
clocksource_32k
.
read
=
omap2430_32k_read
;
else
if
(
cpu_is_omap34xx
())
clocksource_32k
.
read
=
omap34xx_32k_read
;
else
if
(
cpu_is_omap44xx
())
clocksource_32k
.
read
=
omap44xx_32k_read
;
else
return
-
ENODEV
;
...
...
@@ -350,3 +365,19 @@ void __init omap2_set_globals_343x(void)
}
#endif
#if defined(CONFIG_ARCH_OMAP4)
static
struct
omap_globals
omap4_globals
=
{
.
class
=
OMAP443X_CLASS
,
.
tap
=
OMAP2_IO_ADDRESS
(
0x4830a000
),
.
ctrl
=
OMAP2_IO_ADDRESS
(
OMAP443X_CTRL_BASE
),
.
prm
=
OMAP2_IO_ADDRESS
(
OMAP4430_PRM_BASE
),
.
cm
=
OMAP2_IO_ADDRESS
(
OMAP4430_CM_BASE
),
};
void
__init
omap2_set_globals_443x
(
void
)
{
omap2_set_globals_tap
(
&
omap4_globals
);
omap2_set_globals_control
(
&
omap4_globals
);
}
#endif
arch/arm/plat-omap/devices.c
浏览文件 @
cd07ecc8
...
...
@@ -311,6 +311,8 @@ static void omap_init_wdt(void)
wdt_resources
[
0
].
start
=
0x49016000
;
/* WDT2 */
else
if
(
cpu_is_omap343x
())
wdt_resources
[
0
].
start
=
0x48314000
;
/* WDT2 */
else
if
(
cpu_is_omap44xx
())
wdt_resources
[
0
].
start
=
0x4a314000
;
else
return
;
...
...
arch/arm/plat-omap/dma.c
浏览文件 @
cd07ecc8
...
...
@@ -10,6 +10,9 @@
* Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
* Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* Support functions for the OMAP internal DMA channels.
*
* This program is free software; you can redistribute it and/or modify
...
...
@@ -872,7 +875,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
}
l
=
dma_read
(
CCR
(
lch
));
l
&=
~
((
1
<<
6
)
|
(
1
<<
26
));
if
(
cpu_is_omap2430
()
||
cpu_is_omap34xx
())
if
(
cpu_is_omap2430
()
||
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
l
|=
((
read_prio
&
0x1
)
<<
6
)
|
((
write_prio
&
0x1
)
<<
26
);
else
l
|=
((
read_prio
&
0x1
)
<<
6
);
...
...
@@ -1844,7 +1847,8 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
#define omap1_dma_irq_handler NULL
#endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
static
int
omap2_dma_handle_ch
(
int
ch
)
{
...
...
@@ -2339,6 +2343,9 @@ static int __init omap_init_dma(void)
}
else
if
(
cpu_is_omap34xx
())
{
omap_dma_base
=
IO_ADDRESS
(
OMAP34XX_DMA4_BASE
);
dma_lch_count
=
OMAP_DMA4_LOGICAL_DMA_CH_COUNT
;
}
else
if
(
cpu_is_omap44xx
())
{
omap_dma_base
=
IO_ADDRESS
(
OMAP44XX_DMA4_BASE
);
dma_lch_count
=
OMAP_DMA4_LOGICAL_DMA_CH_COUNT
;
}
else
{
pr_err
(
"DMA init failed for unsupported omap
\n
"
);
return
-
ENODEV
;
...
...
@@ -2437,12 +2444,18 @@ static int __init omap_init_dma(void)
}
}
if
(
cpu_is_omap2430
()
||
cpu_is_omap34xx
())
if
(
cpu_is_omap2430
()
||
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
omap_dma_set_global_params
(
DMA_DEFAULT_ARB_RATE
,
DMA_DEFAULT_FIFO_DEPTH
,
0
);
if
(
cpu_class_is_omap2
())
setup_irq
(
INT_24XX_SDMA_IRQ0
,
&
omap24xx_dma_irq
);
if
(
cpu_class_is_omap2
())
{
int
irq
;
if
(
cpu_is_omap44xx
())
irq
=
INT_44XX_SDMA_IRQ0
;
else
irq
=
INT_24XX_SDMA_IRQ0
;
setup_irq
(
irq
,
&
omap24xx_dma_irq
);
}
/* FIXME: Update LCD DMA to work on 24xx */
if
(
cpu_class_is_omap1
())
{
...
...
arch/arm/plat-omap/dmtimer.c
浏览文件 @
cd07ecc8
...
...
@@ -7,6 +7,9 @@
* OMAP2 support by Juha Yrjola
* API improvements and OMAP2 clock framework support by Timo Teras
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
...
...
@@ -150,7 +153,8 @@
struct
omap_dm_timer
{
unsigned
long
phys_base
;
int
irq
;
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
struct
clk
*
iclk
,
*
fclk
;
#endif
void
__iomem
*
io_base
;
...
...
@@ -169,6 +173,9 @@ struct omap_dm_timer {
#define omap3_dm_timers NULL
#define omap3_dm_source_names NULL
#define omap3_dm_source_clocks NULL
#define omap4_dm_timers NULL
#define omap4_dm_source_names NULL
#define omap4_dm_source_clocks NULL
static
struct
omap_dm_timer
omap1_dm_timers
[]
=
{
{
.
phys_base
=
0xfffb1400
,
.
irq
=
INT_1610_GPTIMER1
},
...
...
@@ -191,6 +198,9 @@ static const int dm_timer_count = ARRAY_SIZE(omap1_dm_timers);
#define omap3_dm_timers NULL
#define omap3_dm_source_names NULL
#define omap3_dm_source_clocks NULL
#define omap4_dm_timers NULL
#define omap4_dm_source_names NULL
#define omap4_dm_source_clocks NULL
static
struct
omap_dm_timer
omap2_dm_timers
[]
=
{
{
.
phys_base
=
0x48028000
,
.
irq
=
INT_24XX_GPTIMER1
},
...
...
@@ -225,6 +235,9 @@ static const int dm_timer_count = ARRAY_SIZE(omap2_dm_timers);
#define omap2_dm_timers NULL
#define omap2_dm_source_names NULL
#define omap2_dm_source_clocks NULL
#define omap4_dm_timers NULL
#define omap4_dm_source_names NULL
#define omap4_dm_source_clocks NULL
static
struct
omap_dm_timer
omap3_dm_timers
[]
=
{
{
.
phys_base
=
0x48318000
,
.
irq
=
INT_24XX_GPTIMER1
},
...
...
@@ -250,6 +263,40 @@ static const char *omap3_dm_source_names[] __initdata = {
static
struct
clk
*
omap3_dm_source_clocks
[
2
];
static
const
int
dm_timer_count
=
ARRAY_SIZE
(
omap3_dm_timers
);
#elif defined(CONFIG_ARCH_OMAP4)
#define omap_dm_clk_enable(x) clk_enable(x)
#define omap_dm_clk_disable(x) clk_disable(x)
#define omap1_dm_timers NULL
#define omap2_dm_timers NULL
#define omap2_dm_source_names NULL
#define omap2_dm_source_clocks NULL
#define omap3_dm_timers NULL
#define omap3_dm_source_names NULL
#define omap3_dm_source_clocks NULL
static
struct
omap_dm_timer
omap4_dm_timers
[]
=
{
{
.
phys_base
=
0x4a318000
,
.
irq
=
INT_44XX_GPTIMER1
},
{
.
phys_base
=
0x48032000
,
.
irq
=
INT_44XX_GPTIMER2
},
{
.
phys_base
=
0x48034000
,
.
irq
=
INT_44XX_GPTIMER3
},
{
.
phys_base
=
0x48036000
,
.
irq
=
INT_44XX_GPTIMER4
},
{
.
phys_base
=
0x40138000
,
.
irq
=
INT_44XX_GPTIMER5
},
{
.
phys_base
=
0x4013a000
,
.
irq
=
INT_44XX_GPTIMER6
},
{
.
phys_base
=
0x4013a000
,
.
irq
=
INT_44XX_GPTIMER7
},
{
.
phys_base
=
0x4013e000
,
.
irq
=
INT_44XX_GPTIMER8
},
{
.
phys_base
=
0x4803e000
,
.
irq
=
INT_44XX_GPTIMER9
},
{
.
phys_base
=
0x48086000
,
.
irq
=
INT_44XX_GPTIMER10
},
{
.
phys_base
=
0x48088000
,
.
irq
=
INT_44XX_GPTIMER11
},
{
.
phys_base
=
0x4a320000
,
.
irq
=
INT_44XX_GPTIMER12
},
};
static
const
char
*
omap4_dm_source_names
[]
__initdata
=
{
"sys_ck"
,
"omap_32k_fck"
,
NULL
};
static
struct
clk
*
omap4_dm_source_clocks
[
2
];
static
const
int
dm_timer_count
=
ARRAY_SIZE
(
omap4_dm_timers
);
#else
#error OMAP architecture not supported!
...
...
@@ -459,7 +506,8 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
}
EXPORT_SYMBOL_GPL
(
omap_dm_timer_modify_idlect_mask
);
#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
struct
clk
*
omap_dm_timer_get_fclk
(
struct
omap_dm_timer
*
timer
)
{
...
...
@@ -711,6 +759,10 @@ int __init omap_dm_timer_init(void)
dm_timers
=
omap3_dm_timers
;
dm_source_names
=
omap3_dm_source_names
;
dm_source_clocks
=
omap3_dm_source_clocks
;
}
else
if
(
cpu_is_omap44xx
())
{
dm_timers
=
omap4_dm_timers
;
dm_source_names
=
omap4_dm_source_names
;
dm_source_clocks
=
omap4_dm_source_clocks
;
}
if
(
cpu_class_is_omap2
())
...
...
@@ -723,7 +775,8 @@ int __init omap_dm_timer_init(void)
for
(
i
=
0
;
i
<
dm_timer_count
;
i
++
)
{
timer
=
&
dm_timers
[
i
];
timer
->
io_base
=
IO_ADDRESS
(
timer
->
phys_base
);
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
if
(
cpu_class_is_omap2
())
{
char
clk_name
[
16
];
sprintf
(
clk_name
,
"gpt%d_ick"
,
i
+
1
);
...
...
arch/arm/plat-omap/gpio.c
浏览文件 @
cd07ecc8
...
...
@@ -6,6 +6,9 @@
* Copyright (C) 2003-2005 Nokia Corporation
* Written by Juha Yrjölä <juha.yrjola@nokia.com>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
...
...
@@ -146,6 +149,16 @@
#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000)
#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000)
/*
* OMAP44XX specific GPIO registers
*/
#define OMAP44XX_GPIO1_BASE IO_ADDRESS(0x4a310000)
#define OMAP44XX_GPIO2_BASE IO_ADDRESS(0x48055000)
#define OMAP44XX_GPIO3_BASE IO_ADDRESS(0x48057000)
#define OMAP44XX_GPIO4_BASE IO_ADDRESS(0x48059000)
#define OMAP44XX_GPIO5_BASE IO_ADDRESS(0x4805B000)
#define OMAP44XX_GPIO6_BASE IO_ADDRESS(0x4805D000)
#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
struct
gpio_bank
{
...
...
@@ -153,11 +166,13 @@ struct gpio_bank {
u16
irq
;
u16
virtual_irq_start
;
int
method
;
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
u32
suspend_wakeup
;
u32
saved_wakeup
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
u32
non_wakeup_gpios
;
u32
enabled_non_wakeup_gpios
;
...
...
@@ -251,6 +266,24 @@ static struct gpio_bank gpio_bank_34xx[6] = {
#endif
#ifdef CONFIG_ARCH_OMAP4
static
struct
gpio_bank
gpio_bank_44xx
[
6
]
=
{
{
OMAP44XX_GPIO1_BASE
,
INT_44XX_GPIO_BANK1
,
IH_GPIO_BASE
,
\
METHOD_GPIO_24XX
},
{
OMAP44XX_GPIO2_BASE
,
INT_44XX_GPIO_BANK2
,
IH_GPIO_BASE
+
32
,
\
METHOD_GPIO_24XX
},
{
OMAP44XX_GPIO3_BASE
,
INT_44XX_GPIO_BANK3
,
IH_GPIO_BASE
+
64
,
\
METHOD_GPIO_24XX
},
{
OMAP44XX_GPIO4_BASE
,
INT_44XX_GPIO_BANK4
,
IH_GPIO_BASE
+
96
,
\
METHOD_GPIO_24XX
},
{
OMAP44XX_GPIO5_BASE
,
INT_44XX_GPIO_BANK5
,
IH_GPIO_BASE
+
128
,
\
METHOD_GPIO_24XX
},
{
OMAP44XX_GPIO6_BASE
,
INT_44XX_GPIO_BANK6
,
IH_GPIO_BASE
+
160
,
\
METHOD_GPIO_24XX
},
};
#endif
static
struct
gpio_bank
*
gpio_bank
;
static
int
gpio_bank_count
;
...
...
@@ -273,7 +306,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
}
if
(
cpu_is_omap24xx
())
return
&
gpio_bank
[
gpio
>>
5
];
if
(
cpu_is_omap34xx
())
if
(
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
return
&
gpio_bank
[
gpio
>>
5
];
BUG
();
return
NULL
;
...
...
@@ -285,7 +318,7 @@ static inline int get_gpio_index(int gpio)
return
gpio
&
0x1f
;
if
(
cpu_is_omap24xx
())
return
gpio
&
0x1f
;
if
(
cpu_is_omap34xx
())
if
(
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
return
gpio
&
0x1f
;
return
gpio
&
0x0f
;
}
...
...
@@ -307,7 +340,7 @@ static inline int gpio_valid(int gpio)
return
0
;
if
(
cpu_is_omap24xx
()
&&
gpio
<
128
)
return
0
;
if
(
cpu_is_omap34xx
(
)
&&
gpio
<
192
)
if
(
(
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
&&
gpio
<
192
)
return
0
;
return
-
1
;
}
...
...
@@ -353,7 +386,8 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
reg
+=
OMAP850_GPIO_DIR_CONTROL
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
reg
+=
OMAP24XX_GPIO_OE
;
break
;
...
...
@@ -425,7 +459,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
l
&=
~
(
1
<<
gpio
);
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
if
(
enable
)
reg
+=
OMAP24XX_GPIO_SETDATAOUT
;
...
...
@@ -476,7 +511,8 @@ static int __omap_get_gpio_datain(int gpio)
reg
+=
OMAP850_GPIO_DATA_INPUT
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
reg
+=
OMAP24XX_GPIO_DATAIN
;
break
;
...
...
@@ -520,7 +556,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
else
goto
done
;
if
(
cpu_is_omap34xx
())
{
if
(
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
{
if
(
enable
)
clk_enable
(
bank
->
dbck
);
else
...
...
@@ -550,7 +586,8 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
}
EXPORT_SYMBOL
(
omap_set_gpio_debounce_time
);
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
static
inline
void
set_24xx_gpio_triggering
(
struct
gpio_bank
*
bank
,
int
gpio
,
int
trigger
)
{
...
...
@@ -660,7 +697,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
goto
bad
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
set_24xx_gpio_triggering
(
bank
,
gpio
,
trigger
);
break
;
...
...
@@ -745,7 +783,8 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
reg
+=
OMAP850_GPIO_INT_STATUS
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
reg
+=
OMAP24XX_GPIO_IRQSTATUS1
;
break
;
...
...
@@ -814,7 +853,8 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
inv
=
1
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
reg
+=
OMAP24XX_GPIO_IRQENABLE1
;
mask
=
0xffffffff
;
...
...
@@ -887,7 +927,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
l
|=
gpio_mask
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
if
(
enable
)
reg
+=
OMAP24XX_GPIO_SETIRQENABLE1
;
...
...
@@ -932,7 +973,8 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
spin_unlock_irqrestore
(
&
bank
->
lock
,
flags
);
return
0
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
if
(
bank
->
non_wakeup_gpios
&
(
1
<<
gpio
))
{
printk
(
KERN_ERR
"Unable to modify wakeup on "
...
...
@@ -1017,7 +1059,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel
(
1
<<
offset
,
reg
);
}
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
if
(
bank
->
method
==
METHOD_GPIO_24XX
)
{
/* Disable wake-up during idle for dynamic tick */
void
__iomem
*
reg
=
bank
->
base
+
OMAP24XX_GPIO_CLEARWKUENA
;
...
...
@@ -1069,7 +1112,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if
(
bank
->
method
==
METHOD_GPIO_850
)
isr_reg
=
bank
->
base
+
OMAP850_GPIO_INT_STATUS
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
if
(
bank
->
method
==
METHOD_GPIO_24XX
)
isr_reg
=
bank
->
base
+
OMAP24XX_GPIO_IRQSTATUS1
;
#endif
...
...
@@ -1346,7 +1390,7 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
/*---------------------------------------------------------------------*/
static
int
initialized
;
#if !
defined(CONFIG_ARCH_OMAP3
)
#if !
(defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
)
static
struct
clk
*
gpio_ick
;
#endif
...
...
@@ -1359,7 +1403,7 @@ static struct clk * gpio5_ick;
static
struct
clk
*
gpio5_fck
;
#endif
#if defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP3)
|| defined(CONFIG_ARCH_OMAP4)
static
struct
clk
*
gpio_iclks
[
OMAP34XX_NR_GPIOS
];
#endif
...
...
@@ -1419,8 +1463,8 @@ static int __init _omap_gpio_init(void)
}
#endif
#if defined(CONFIG_ARCH_OMAP3)
if
(
cpu_is_omap34xx
())
{
#if defined(CONFIG_ARCH_OMAP3)
|| defined(CONFIG_ARCH_OMAP4)
if
(
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
{
for
(
i
=
0
;
i
<
OMAP34XX_NR_GPIOS
;
i
++
)
{
sprintf
(
clk_name
,
"gpio%d_ick"
,
i
+
1
);
gpio_iclks
[
i
]
=
clk_get
(
NULL
,
clk_name
);
...
...
@@ -1496,6 +1540,17 @@ static int __init _omap_gpio_init(void)
printk
(
KERN_INFO
"OMAP34xx GPIO hardware version %d.%d
\n
"
,
(
rev
>>
4
)
&
0x0f
,
rev
&
0x0f
);
}
#endif
#ifdef CONFIG_ARCH_OMAP4
if
(
cpu_is_omap44xx
())
{
int
rev
;
gpio_bank_count
=
OMAP34XX_NR_GPIOS
;
gpio_bank
=
gpio_bank_44xx
;
rev
=
__raw_readl
(
gpio_bank
[
0
].
base
+
OMAP24XX_GPIO_REVISION
);
printk
(
KERN_INFO
"OMAP44xx GPIO hardware version %d.%d
\n
"
,
(
rev
>>
4
)
&
0x0f
,
rev
&
0x0f
);
}
#endif
for
(
i
=
0
;
i
<
gpio_bank_count
;
i
++
)
{
int
j
,
gpio_count
=
16
;
...
...
@@ -1520,7 +1575,8 @@ static int __init _omap_gpio_init(void)
gpio_count
=
32
;
/* 730 has 32-bit GPIOs */
}
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
if
(
bank
->
method
==
METHOD_GPIO_24XX
)
{
static
const
u32
non_wakeup_gpios
[]
=
{
0xe203ffc0
,
0x08700040
...
...
@@ -1577,7 +1633,7 @@ static int __init _omap_gpio_init(void)
set_irq_chained_handler
(
bank
->
irq
,
gpio_irq_handler
);
set_irq_data
(
bank
->
irq
,
bank
);
if
(
cpu_is_omap34xx
())
{
if
(
cpu_is_omap34xx
()
||
cpu_is_omap44xx
()
)
{
sprintf
(
clk_name
,
"gpio%d_dbck"
,
i
+
1
);
bank
->
dbck
=
clk_get
(
NULL
,
clk_name
);
if
(
IS_ERR
(
bank
->
dbck
))
...
...
@@ -1599,7 +1655,8 @@ static int __init _omap_gpio_init(void)
return
0
;
}
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
static
int
omap_gpio_suspend
(
struct
sys_device
*
dev
,
pm_message_t
mesg
)
{
int
i
;
...
...
@@ -1622,7 +1679,8 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
wake_set
=
bank
->
base
+
OMAP1610_GPIO_SET_WAKEUPENA
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
wake_status
=
bank
->
base
+
OMAP24XX_GPIO_WAKE_EN
;
wake_clear
=
bank
->
base
+
OMAP24XX_GPIO_CLEARWKUENA
;
...
...
@@ -1663,7 +1721,8 @@ static int omap_gpio_resume(struct sys_device *dev)
wake_set
=
bank
->
base
+
OMAP1610_GPIO_SET_WAKEUPENA
;
break
;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
case
METHOD_GPIO_24XX
:
wake_clear
=
bank
->
base
+
OMAP24XX_GPIO_CLEARWKUENA
;
wake_set
=
bank
->
base
+
OMAP24XX_GPIO_SETWKUENA
;
...
...
@@ -1695,7 +1754,8 @@ static struct sys_device omap_gpio_device = {
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
static
int
workaround_enabled
;
...
...
@@ -1711,7 +1771,8 @@ void omap2_gpio_prepare_for_retention(void)
if
(
!
(
bank
->
enabled_non_wakeup_gpios
))
continue
;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
bank
->
saved_datain
=
__raw_readl
(
bank
->
base
+
OMAP24XX_GPIO_DATAIN
);
l1
=
__raw_readl
(
bank
->
base
+
OMAP24XX_GPIO_FALLINGDETECT
);
l2
=
__raw_readl
(
bank
->
base
+
OMAP24XX_GPIO_RISINGDETECT
);
...
...
@@ -1720,7 +1781,8 @@ void omap2_gpio_prepare_for_retention(void)
bank
->
saved_risingdetect
=
l2
;
l1
&=
~
bank
->
enabled_non_wakeup_gpios
;
l2
&=
~
bank
->
enabled_non_wakeup_gpios
;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
__raw_writel
(
l1
,
bank
->
base
+
OMAP24XX_GPIO_FALLINGDETECT
);
__raw_writel
(
l2
,
bank
->
base
+
OMAP24XX_GPIO_RISINGDETECT
);
#endif
...
...
@@ -1745,7 +1807,8 @@ void omap2_gpio_resume_after_retention(void)
if
(
!
(
bank
->
enabled_non_wakeup_gpios
))
continue
;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
__raw_writel
(
bank
->
saved_fallingdetect
,
bank
->
base
+
OMAP24XX_GPIO_FALLINGDETECT
);
__raw_writel
(
bank
->
saved_risingdetect
,
...
...
@@ -1755,14 +1818,16 @@ void omap2_gpio_resume_after_retention(void)
* state. If so, generate an IRQ by software. This is
* horribly racy, but it's the best we can do to work around
* this silicon bug. */
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
l
=
__raw_readl
(
bank
->
base
+
OMAP24XX_GPIO_DATAIN
);
#endif
l
^=
bank
->
saved_datain
;
l
&=
bank
->
non_wakeup_gpios
;
if
(
l
)
{
u32
old0
,
old1
;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
old0
=
__raw_readl
(
bank
->
base
+
OMAP24XX_GPIO_LEVELDETECT0
);
old1
=
__raw_readl
(
bank
->
base
+
OMAP24XX_GPIO_LEVELDETECT1
);
__raw_writel
(
old0
|
l
,
bank
->
base
+
OMAP24XX_GPIO_LEVELDETECT0
);
...
...
@@ -1798,7 +1863,8 @@ static int __init omap_gpio_sysinit(void)
mpuio_init
();
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
if
(
cpu_is_omap16xx
()
||
cpu_class_is_omap2
())
{
if
(
ret
==
0
)
{
ret
=
sysdev_class_register
(
&
omap_gpio_sysclass
);
...
...
@@ -1887,7 +1953,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
irqstat
=
irq_desc
[
irq
].
status
;
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP34XX)
|| defined(CONFIG_ARCH_OMAP4)
if
(
is_in
&&
((
bank
->
suspend_wakeup
&
mask
)
||
irqstat
&
IRQ_TYPE_SENSE_MASK
))
{
char
*
trigger
=
NULL
;
...
...
arch/arm/plat-omap/include/mach/clock.h
浏览文件 @
cd07ecc8
...
...
@@ -22,7 +22,8 @@ struct clkops {
void
(
*
disable
)(
struct
clk
*
);
};
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
struct
clksel_rate
{
u32
val
;
...
...
@@ -51,7 +52,7 @@ struct dpll_data {
u8
max_divider
;
u32
max_tolerance
;
u16
max_multiplier
;
#
if defined(CONFIG_ARCH_OMAP3
)
#
if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4
)
u8
modes
;
void
__iomem
*
autoidle_reg
;
void
__iomem
*
idlest_reg
;
...
...
@@ -83,7 +84,8 @@ struct clk {
void
(
*
init
)(
struct
clk
*
);
__u8
enable_bit
;
__s8
usecount
;
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
u8
fixed_div
;
void
__iomem
*
clksel_reg
;
u32
clksel_mask
;
...
...
arch/arm/plat-omap/include/mach/common.h
浏览文件 @
cd07ecc8
...
...
@@ -60,6 +60,7 @@ struct omap_globals {
void
omap2_set_globals_242x
(
void
);
void
omap2_set_globals_243x
(
void
);
void
omap2_set_globals_343x
(
void
);
void
omap2_set_globals_443x
(
void
);
/* These get called from omap2_set_globals_xxxx(), do not call these */
void
omap2_set_globals_tap
(
struct
omap_globals
*
);
...
...
arch/arm/plat-omap/include/mach/control.h
浏览文件 @
cd07ecc8
/*
* arch/arm/plat-omap/include/mach/control.h
*
* OMAP2/3 System Control Module definitions
* OMAP2/3
/4
System Control Module definitions
*
* Copyright (C) 2007-200
8
Texas Instruments, Inc.
* Copyright (C) 2007-200
9
Texas Instruments, Inc.
* Copyright (C) 2007-2008 Nokia Corporation
*
* Written by Paul Walmsley
...
...
@@ -203,7 +203,8 @@
#define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14)
#ifndef __ASSEMBLY__
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
extern
void
__iomem
*
omap_ctrl_base_get
(
void
);
extern
u8
omap_ctrl_readb
(
u16
offset
);
extern
u16
omap_ctrl_readw
(
u16
offset
);
...
...
arch/arm/plat-omap/include/mach/cpu.h
浏览文件 @
cd07ecc8
...
...
@@ -5,8 +5,12 @@
*
* Copyright (C) 2004, 2008 Nokia Corporation
*
* Copyright (C) 2009 Texas Instruments.
*
* Written by Tony Lindgren <tony.lindgren@nokia.com>
*
* Added OMAP4 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
...
...
@@ -155,6 +159,8 @@ IS_OMAP_SUBCLASS(343x, 0x343)
#define cpu_is_omap243x() 0
#define cpu_is_omap34xx() 0
#define cpu_is_omap343x() 0
#define cpu_is_omap44xx() 0
#define cpu_is_omap443x() 0
#if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730)
...
...
@@ -348,12 +354,21 @@ IS_OMAP_TYPE(3430, 0x3430)
# define cpu_is_omap3430() is_omap3430()
#endif
# if defined(CONFIG_ARCH_OMAP4)
# undef cpu_is_omap44xx
# undef cpu_is_omap443x
# define cpu_is_omap44xx() 1
# define cpu_is_omap443x() 1
# endif
/* Macros to detect if we have OMAP1 or OMAP2 */
#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
cpu_is_omap16xx())
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
cpu_is_omap44xx())
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
/* Various silicon revisions for omap2 */
#define OMAP242X_CLASS 0x24200024
...
...
@@ -370,6 +385,8 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP3430_REV_ES3_0 0x34303034
#define OMAP3430_REV_ES3_1 0x34304034
#define OMAP443X_CLASS 0x44300034
/*
* omap_chip bits
*
...
...
arch/arm/plat-omap/include/mach/debug-macro.S
浏览文件 @
cd07ecc8
...
...
@@ -36,7 +36,7 @@
add
\
rx
,
\
rx
,
#
0x00004000
@
UART
3
#endif
#elif
CONFIG_ARCH_OMAP3
#elif
defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
moveq
\
rx
,
#
0x48000000
@
physical
base
address
movne
\
rx
,
#
0xd8000000
@
virtual
base
orr
\
rx
,
\
rx
,
#
0x0006a000
...
...
arch/arm/plat-omap/include/mach/dma.h
浏览文件 @
cd07ecc8
...
...
@@ -48,6 +48,7 @@
/* Hardware registers for omap2 and omap3 */
#define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000)
#define OMAP34XX_DMA4_BASE (L4_34XX_BASE + 0x56000)
#define OMAP44XX_DMA4_BASE (L4_44XX_BASE + 0x56000)
#define OMAP_DMA4_REVISION 0x00
#define OMAP_DMA4_GCR 0x78
...
...
arch/arm/plat-omap/include/mach/entry-macro.S
浏览文件 @
cd07ecc8
...
...
@@ -3,6 +3,9 @@
*
*
Low
-
level
IRQ
helper
macros
for
OMAP
-
based
platforms
*
*
Copyright
(
C
)
2009
Texas
Instruments
*
Added
OMAP4
support
-
Santosh
Shilimkar
<
santosh
.
shilimkar
@
ti
.
com
>
*
*
This
file
is
licensed
under
the
terms
of
the
GNU
General
Public
*
License
version
2
.
This
program
is
licensed
"as is"
without
any
*
warranty
of
any
kind
,
whether
express
or
implied
.
...
...
@@ -10,6 +13,7 @@
#include <mach/hardware.h>
#include <mach/io.h>
#include <mach/irqs.h>
#include <asm/hardware/gic.h>
#if defined(CONFIG_ARCH_OMAP1)
...
...
@@ -56,7 +60,8 @@
.
endm
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined
(
CONFIG_ARCH_OMAP4
)
#include <mach/omap24xx.h>
#include <mach/omap34xx.h>
...
...
@@ -67,7 +72,9 @@
#elif defined(CONFIG_ARCH_OMAP34XX)
#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE)
#endif
#if defined(CONFIG_ARCH_OMAP4)
#include <mach/omap44xx.h>
#endif
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
...
...
@@ -80,6 +87,7 @@
.
macro
arch_ret_to_user
,
tmp1
,
tmp2
.
endm
#ifndef CONFIG_ARCH_OMAP4
.
macro
get_irqnr_and_base
,
irqnr
,
irqstat
,
base
,
tmp
ldr
\
base
,
=
OMAP2_VA_IC_BASE
ldr
\
irqnr
,
[
\
base
,
#
0x98
]
/*
IRQ
pending
reg
1
*/
...
...
@@ -95,6 +103,40 @@
and
\
irqnr
,
\
irqnr
,
#
ACTIVEIRQ_MASK
/*
Clear
spurious
bits
*/
.
endm
#else
/
*
*
The
interrupt
numbering
scheme
is
defined
in
the
*
interrupt
controller
spec
.
To
wit
:
*
*
Interrupts
0
-
15
are
IPI
*
16
-
28
are
reserved
*
29
-
31
are
local
.
We
allow
30
to
be
used
for
the
watchdog
.
*
32
-
1020
are
global
*
1021
-
1022
are
reserved
*
1023
is
"spurious"
(
no
interrupt
)
*
*
For
now
,
we
ignore
all
local
interrupts
so
only
return
an
*
interrupt
if
it
's between 30 and 1020. The test_for_ipi
*
routine
below
will
pick
up
on
IPIs
.
*
A
simple
read
from
the
controller
will
tell
us
the
number
*
of
the
highest
priority
enabled
interrupt
.
*
We
then
just
need
to
check
whether
it
is
in
the
*
valid
range
for
an
IRQ
(
30
-
1020
inclusive
)
.
*/
.
macro
get_irqnr_and_base
,
irqnr
,
irqstat
,
base
,
tmp
ldr
\
base
,
=
OMAP44XX_VA_GIC_CPU_BASE
ldr
\
irqstat
,
[
\
base
,
#
GIC_CPU_INTACK
]
ldr
\
tmp
,
=
1021
bic
\
irqnr
,
\
irqstat
,
#
0x1c00
cmp
\
irqnr
,
#
29
cmpcc
\
irqnr
,
\
irqnr
cmpne
\
irqnr
,
\
tmp
cmpcs
\
irqnr
,
\
irqnr
.
endm
#endif
.
macro
irq_prio_table
.
endm
...
...
arch/arm/plat-omap/include/mach/hardware.h
浏览文件 @
cd07ecc8
...
...
@@ -285,5 +285,6 @@
#include "omap16xx.h"
#include "omap24xx.h"
#include "omap34xx.h"
#include "omap44xx.h"
#endif
/* __ASM_ARCH_OMAP_HARDWARE_H */
arch/arm/plat-omap/include/mach/io.h
浏览文件 @
cd07ecc8
...
...
@@ -6,6 +6,9 @@
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
...
...
@@ -157,6 +160,40 @@
#define DSP_MMU_34XX_VIRT 0xe2000000
#define DSP_MMU_34XX_SIZE SZ_4K
#elif defined(CONFIG_ARCH_OMAP4)
/* We map both L3 and L4 on OMAP4 */
#define L3_44XX_PHYS L3_44XX_BASE
#define L3_44XX_VIRT 0xd4000000
#define L3_44XX_SIZE SZ_1M
#define L4_44XX_PHYS L4_44XX_BASE
#define L4_44XX_VIRT 0xda000000
#define L4_44XX_SIZE SZ_4M
#define L4_WK_44XX_PHYS L4_WK_44XX_BASE
#define L4_WK_44XX_VIRT 0xda300000
#define L4_WK_44XX_SIZE SZ_1M
#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
#define L4_PER_44XX_VIRT 0xd8000000
#define L4_PER_44XX_SIZE SZ_4M
#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
#define L4_EMU_44XX_VIRT 0xe4000000
#define L4_EMU_44XX_SIZE SZ_64M
#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
#define OMAP44XX_GPMC_VIRT 0xe0000000
#define OMAP44XX_GPMC_SIZE SZ_1M
#define IO_OFFSET 0x90000000
#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)
/* Works for L3 and L4 */
#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)
/* Works for L3 and L4 */
#define io_v2p(va) ((va) - IO_OFFSET)
/* Works for L3 and L4 */
#endif
#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
...
...
arch/arm/plat-omap/include/mach/irqs.h
浏览文件 @
cd07ecc8
...
...
@@ -4,6 +4,9 @@
* Copyright (C) Greg Lonnon 2001
* Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
...
...
@@ -422,6 +425,92 @@
#define INT_34XX_BENCH_MPU_EMUL 3
#define IRQ_GIC_START 32
#define INT_44XX_BENCH_MPU_EMUL (3 + IRQ_GIC_START)
#define INT_44XX_SSM_ABORT_IRQ (6 + IRQ_GIC_START)
#define INT_44XX_SYS_NIRQ (7 + IRQ_GIC_START)
#define INT_44XX_D2D_FW_IRQ (8 + IRQ_GIC_START)
#define INT_44XX_PRCM_MPU_IRQ (11 + IRQ_GIC_START)
#define INT_44XX_SDMA_IRQ0 (12 + IRQ_GIC_START)
#define INT_44XX_SDMA_IRQ1 (13 + IRQ_GIC_START)
#define INT_44XX_SDMA_IRQ2 (14 + IRQ_GIC_START)
#define INT_44XX_SDMA_IRQ3 (15 + IRQ_GIC_START)
#define INT_44XX_ISS_IRQ (24 + IRQ_GIC_START)
#define INT_44XX_DSS_IRQ (25 + IRQ_GIC_START)
#define INT_44XX_MAIL_U0_MPU (26 + IRQ_GIC_START)
#define INT_44XX_DSP_MMU (28 + IRQ_GIC_START)
#define INT_44XX_GPTIMER1 (37 + IRQ_GIC_START)
#define INT_44XX_GPTIMER2 (38 + IRQ_GIC_START)
#define INT_44XX_GPTIMER3 (39 + IRQ_GIC_START)
#define INT_44XX_GPTIMER4 (40 + IRQ_GIC_START)
#define INT_44XX_GPTIMER5 (41 + IRQ_GIC_START)
#define INT_44XX_GPTIMER6 (42 + IRQ_GIC_START)
#define INT_44XX_GPTIMER7 (43 + IRQ_GIC_START)
#define INT_44XX_GPTIMER8 (44 + IRQ_GIC_START)
#define INT_44XX_GPTIMER9 (45 + IRQ_GIC_START)
#define INT_44XX_GPTIMER10 (46 + IRQ_GIC_START)
#define INT_44XX_GPTIMER11 (47 + IRQ_GIC_START)
#define INT_44XX_GPTIMER12 (95 + IRQ_GIC_START)
#define INT_44XX_SHA1MD5 (51 + IRQ_GIC_START)
#define INT_44XX_I2C1_IRQ (56 + IRQ_GIC_START)
#define INT_44XX_I2C2_IRQ (57 + IRQ_GIC_START)
#define INT_44XX_HDQ_IRQ (58 + IRQ_GIC_START)
#define INT_44XX_SPI1_IRQ (65 + IRQ_GIC_START)
#define INT_44XX_SPI2_IRQ (66 + IRQ_GIC_START)
#define INT_44XX_HSI_1_IRQ0 (67 + IRQ_GIC_START)
#define INT_44XX_HSI_2_IRQ1 (68 + IRQ_GIC_START)
#define INT_44XX_HSI_1_DMAIRQ (71 + IRQ_GIC_START)
#define INT_44XX_UART1_IRQ (72 + IRQ_GIC_START)
#define INT_44XX_UART2_IRQ (73 + IRQ_GIC_START)
#define INT_44XX_UART3_IRQ (74 + IRQ_GIC_START)
#define INT_44XX_UART4_IRQ (70 + IRQ_GIC_START)
#define INT_44XX_USB_IRQ_NISO (76 + IRQ_GIC_START)
#define INT_44XX_USB_IRQ_ISO (77 + IRQ_GIC_START)
#define INT_44XX_USB_IRQ_HGEN (78 + IRQ_GIC_START)
#define INT_44XX_USB_IRQ_HSOF (79 + IRQ_GIC_START)
#define INT_44XX_USB_IRQ_OTG (80 + IRQ_GIC_START)
#define INT_44XX_MCBSP4_IRQ_TX (81 + IRQ_GIC_START)
#define INT_44XX_MCBSP4_IRQ_RX (82 + IRQ_GIC_START)
#define INT_44XX_MMC_IRQ (83 + IRQ_GIC_START)
#define INT_44XX_MMC2_IRQ (86 + IRQ_GIC_START)
#define INT_44XX_MCBSP2_IRQ_TX (89 + IRQ_GIC_START)
#define INT_44XX_MCBSP2_IRQ_RX (90 + IRQ_GIC_START)
#define INT_44XX_SPI3_IRQ (91 + IRQ_GIC_START)
#define INT_44XX_SPI5_IRQ (69 + IRQ_GIC_START)
#define INT_44XX_MCBSP5_IRQ (16 + IRQ_GIC_START)
#define INT_44xX_MCBSP1_IRQ (17 + IRQ_GIC_START)
#define INT_44XX_MCBSP2_IRQ (22 + IRQ_GIC_START)
#define INT_44XX_MCBSP3_IRQ (23 + IRQ_GIC_START)
#define INT_44XX_MCBSP4_IRQ (27 + IRQ_GIC_START)
#define INT_44XX_HS_USB_MC (92 + IRQ_GIC_START)
#define INT_44XX_HS_USB_DMA (93 + IRQ_GIC_START)
#define INT_44XX_GPIO_BANK1 (29 + IRQ_GIC_START)
#define INT_44XX_GPIO_BANK2 (30 + IRQ_GIC_START)
#define INT_44XX_GPIO_BANK3 (31 + IRQ_GIC_START)
#define INT_44XX_GPIO_BANK4 (32 + IRQ_GIC_START)
#define INT_44XX_GPIO_BANK5 (33 + IRQ_GIC_START)
#define INT_44XX_GPIO_BANK6 (34 + IRQ_GIC_START)
#define INT_44XX_USIM_IRQ (35 + IRQ_GIC_START)
#define INT_44XX_WDT3_IRQ (36 + IRQ_GIC_START)
#define INT_44XX_SPI4_IRQ (48 + IRQ_GIC_START)
#define INT_44XX_SHA1MD52_IRQ (49 + IRQ_GIC_START)
#define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
#define INT_44XX_SHA1MD51_IRQ (51 + IRQ_GIC_START)
#define INT_44XX_RNG_IRQ (52 + IRQ_GIC_START)
#define INT_44XX_I2C3_IRQ (61 + IRQ_GIC_START)
#define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
#define INT_44XX_PBIAS_IRQ (75 + IRQ_GIC_START)
#define INT_44XX_OHCI_IRQ (76 + IRQ_GIC_START)
#define INT_44XX_EHCI_IRQ (77 + IRQ_GIC_START)
#define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START)
#define INT_44XX_PARTHASH_IRQ (79 + IRQ_GIC_START)
#define INT_44XX_MMC3_IRQ (94 + IRQ_GIC_START)
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192
...
...
arch/arm/plat-omap/include/mach/memory.h
浏览文件 @
cd07ecc8
...
...
@@ -38,7 +38,8 @@
*/
#if defined(CONFIG_ARCH_OMAP1)
#define PHYS_OFFSET UL(0x10000000)
#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
defined(CONFIG_ARCH_OMAP4)
#define PHYS_OFFSET UL(0x80000000)
#endif
...
...
arch/arm/plat-omap/include/mach/omap44xx.h
0 → 100644
浏览文件 @
cd07ecc8
/*:
* Address mappings and base address for OMAP4 interconnects
* and peripherals.
*
* Copyright (C) 2009 Texas Instruments
*
* Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_OMAP44XX_H
#define __ASM_ARCH_OMAP44XX_H
/*
* Please place only base defines here and put the rest in device
* specific headers.
*/
#define L4_44XX_BASE 0x4a000000
#define L4_WK_44XX_BASE 0x4a300000
#define L4_PER_44XX_BASE 0x48000000
#define L4_EMU_44XX_BASE 0x54000000
#define L3_44XX_BASE 0x44000000
#define OMAP4430_32KSYNCT_BASE 0x4a304000
#define OMAP4430_CM_BASE 0x4a004000
#define OMAP4430_PRM_BASE 0x48306000
#define OMAP44XX_GPMC_BASE 0x50000000
#define OMAP443X_SCM_BASE 0x4a002000
#define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE
#define OMAP44XX_IC_BASE 0x48200000
#define OMAP44XX_IVA_INTC_BASE 0x40000000
#define IRQ_SIR_IRQ 0x0040
#define OMAP44XX_GIC_DIST_BASE 0x48241000
#define OMAP44XX_GIC_CPU_BASE 0x48240100
#define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
#define OMAP44XX_SCU_BASE 0x48240000
#define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE)
#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
#define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100
#define OMAP44XX_WKUPGEN_BASE 0x48281000
#define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
#endif
/* __ASM_ARCH_OMAP44XX_H */
arch/arm/plat-omap/include/mach/serial.h
浏览文件 @
cd07ecc8
/*
* arch/arm/plat-omap/include/mach/serial.h
*
* Copyright (C) 2009 Texas Instruments
* Addded OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
...
...
@@ -15,19 +18,28 @@
#define OMAP_UART1_BASE 0xfffb0000
#define OMAP_UART2_BASE 0xfffb0800
#define OMAP_UART3_BASE 0xfffb9800
#define OMAP_MAX_NR_PORTS 3
#elif defined(CONFIG_ARCH_OMAP2)
/* OMAP2 serial ports */
#define OMAP_UART1_BASE 0x4806a000
#define OMAP_UART2_BASE 0x4806c000
#define OMAP_UART3_BASE 0x4806e000
#define OMAP_MAX_NR_PORTS 3
#elif defined(CONFIG_ARCH_OMAP3)
/* OMAP3 serial ports */
#define OMAP_UART1_BASE 0x4806a000
#define OMAP_UART2_BASE 0x4806c000
#define OMAP_UART3_BASE 0x49020000
#define OMAP_MAX_NR_PORTS 3
#elif defined(CONFIG_ARCH_OMAP4)
/* OMAP4 serial ports */
#define OMAP_UART1_BASE 0x4806a000
#define OMAP_UART2_BASE 0x4806c000
#define OMAP_UART3_BASE 0x48020000
#define OMAP_UART4_BASE 0x4806e000
#define OMAP_MAX_NR_PORTS 4
#endif
#define OMAP_MAX_NR_PORTS 3
#define OMAP1510_BASE_BAUD (12000000/16)
#define OMAP16XX_BASE_BAUD (48000000/16)
#define OMAP24XX_BASE_BAUD (48000000/16)
...
...
arch/arm/plat-omap/io.c
浏览文件 @
cd07ecc8
/*
* Common io.c file
* This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/io.h>
#include <linux/mm.h>
...
...
@@ -7,6 +18,7 @@
#include <mach/omap16xx.h>
#include <mach/omap24xx.h>
#include <mach/omap34xx.h>
#include <mach/omap44xx.h>
#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
...
...
@@ -92,7 +104,22 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
return
XLATE
(
p
,
L4_EMU_34XX_PHYS
,
L4_EMU_34XX_VIRT
);
}
#endif
#ifdef CONFIG_ARCH_OMAP4
if
(
cpu_is_omap44xx
())
{
if
(
BETWEEN
(
p
,
L3_44XX_PHYS
,
L3_44XX_SIZE
))
return
XLATE
(
p
,
L3_44XX_PHYS
,
L3_44XX_VIRT
);
if
(
BETWEEN
(
p
,
L4_44XX_PHYS
,
L4_44XX_SIZE
))
return
XLATE
(
p
,
L4_44XX_PHYS
,
L4_44XX_VIRT
);
if
(
BETWEEN
(
p
,
L4_WK_44XX_PHYS
,
L4_WK_44XX_SIZE
))
return
XLATE
(
p
,
L4_WK_44XX_PHYS
,
L4_WK_44XX_VIRT
);
if
(
BETWEEN
(
p
,
OMAP44XX_GPMC_PHYS
,
OMAP44XX_GPMC_SIZE
))
return
XLATE
(
p
,
OMAP44XX_GPMC_PHYS
,
OMAP44XX_GPMC_VIRT
);
if
(
BETWEEN
(
p
,
L4_PER_44XX_PHYS
,
L4_PER_44XX_SIZE
))
return
XLATE
(
p
,
L4_PER_44XX_PHYS
,
L4_PER_44XX_VIRT
);
if
(
BETWEEN
(
p
,
L4_EMU_44XX_PHYS
,
L4_EMU_44XX_SIZE
))
return
XLATE
(
p
,
L4_EMU_44XX_PHYS
,
L4_EMU_44XX_VIRT
);
}
#endif
return
__arm_ioremap
(
p
,
size
,
type
);
}
EXPORT_SYMBOL
(
omap_ioremap
);
...
...
arch/arm/plat-omap/mux.c
浏览文件 @
cd07ecc8
...
...
@@ -54,6 +54,9 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
{
struct
pin_config
*
reg
;
if
(
cpu_is_omap44xx
())
return
0
;
if
(
mux_cfg
==
NULL
)
{
printk
(
KERN_ERR
"Pin mux table not initialized
\n
"
);
return
-
ENODEV
;
...
...
arch/arm/plat-omap/sram.c
浏览文件 @
cd07ecc8
...
...
@@ -6,6 +6,9 @@
* Copyright (C) 2005 Nokia Corporation
* Written by Tony Lindgren <tony@atomide.com>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
...
...
@@ -44,6 +47,8 @@
#define OMAP3_SRAM_VA 0xd7000000
#define OMAP3_SRAM_PUB_PA 0x40208000
#define OMAP3_SRAM_PUB_VA 0xd7008000
#define OMAP4_SRAM_PA 0x40200000
/*0x402f0000*/
#define OMAP4_SRAM_VA 0xd7000000
/*0xd70f0000*/
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#define SRAM_BOOTLOADER_SZ 0x00
...
...
@@ -87,6 +92,10 @@ static int is_sram_locked(void)
{
int
type
=
0
;
if
(
cpu_is_omap44xx
())
/* Not yet supported */
return
0
;
if
(
cpu_is_omap242x
())
type
=
omap_rev
()
&
OMAP2_DEVICETYPE_MASK
;
...
...
@@ -135,6 +144,10 @@ void __init omap_detect_sram(void)
omap_sram_base
=
OMAP3_SRAM_VA
;
omap_sram_start
=
OMAP3_SRAM_PA
;
omap_sram_size
=
0x10000
;
/* 64K */
}
else
if
(
cpu_is_omap44xx
())
{
omap_sram_base
=
OMAP4_SRAM_VA
;
omap_sram_start
=
OMAP4_SRAM_PA
;
omap_sram_size
=
0x8000
;
/* 32K */
}
else
{
omap_sram_base
=
OMAP2_SRAM_VA
;
omap_sram_start
=
OMAP2_SRAM_PA
;
...
...
@@ -212,6 +225,12 @@ void __init omap_map_sram(void)
omap_sram_io_desc
[
0
].
type
=
MT_MEMORY_NONCACHED
;
}
if
(
cpu_is_omap44xx
())
{
omap_sram_io_desc
[
0
].
virtual
=
OMAP4_SRAM_VA
;
base
=
OMAP4_SRAM_PA
;
base
=
ROUND_DOWN
(
base
,
PAGE_SIZE
);
omap_sram_io_desc
[
0
].
pfn
=
__phys_to_pfn
(
base
);
}
omap_sram_io_desc
[
0
].
length
=
1024
*
1024
;
/* Use section desc */
iotable_init
(
omap_sram_io_desc
,
ARRAY_SIZE
(
omap_sram_io_desc
));
...
...
@@ -401,6 +420,8 @@ int __init omap_sram_init(void)
omap243x_sram_init
();
else
if
(
cpu_is_omap34xx
())
omap34xx_sram_init
();
else
if
(
cpu_is_omap44xx
())
omap34xx_sram_init
();
/* FIXME: */
return
0
;
}
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