diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ccfe0ab8c87702076afaf621963c730e1d34be3f..28a204801ccf91e84df6c1cea3f82fccb80a2711 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -955,18 +955,6 @@ config ARCH_VT8500 help Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. -config ARCH_ZYNQ - bool "Xilinx Zynq ARM Cortex A9 Platform" - select ARM_AMBA - select ARM_GIC - select COMMON_CLK - select CPU_V7 - select GENERIC_CLOCKEVENTS - select ICST - select MIGHT_HAVE_CACHE_L2X0 - select USE_OF - help - Support for Xilinx Zynq ARM Cortex A9 Platform endchoice menu "Multiple platform selection" @@ -1128,6 +1116,8 @@ source "arch/arm/plat-versatile/Kconfig" source "arch/arm/mach-w90x900/Kconfig" +source "arch/arm/mach-zynq/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S index 08aed97120e4e534999e59ccc659932bd3b477d9..f9aa9740a73f09676d5a963f47e2d8e4f7d83e6c 100644 --- a/arch/arm/include/debug/zynq.S +++ b/arch/arm/include/debug/zynq.S @@ -12,9 +12,25 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */ +#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */ +#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */ -#include -#include +#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */ +#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */ + +#define UART0_PHYS 0xE0000000 +#define UART1_PHYS 0xE0001000 +#define UART_SIZE SZ_4K +#define UART_VIRT 0xF0001000 + +#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) +# define LL_UART_PADDR UART1_PHYS +#else +# define LL_UART_PADDR UART0_PHYS +#endif + +#define LL_UART_VADDR UART_VIRT .macro addruart, rp, rv, tmp ldr \rp, =LL_UART_PADDR @ physical diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..adb6c0ea0e533b36b7f23f996c5ee4329d6aacbc --- /dev/null +++ b/arch/arm/mach-zynq/Kconfig @@ -0,0 +1,13 @@ +config ARCH_ZYNQ + bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7 + select ARM_AMBA + select ARM_GIC + select COMMON_CLK + select CPU_V7 + select GENERIC_CLOCKEVENTS + select ICST + select MIGHT_HAVE_CACHE_L2X0 + select USE_OF + select SPARSE_IRQ + help + Support for Xilinx Zynq ARM Cortex A9 Platform diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index a2f48daa11ca0d4bb05563e54b145ee75d476070..e16d4bed0f7aaf1e1d4f7f3423cf2c0a35fd41dd 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -30,10 +30,10 @@ #include #include #include +#include #include #include -#include #include "common.h" static struct of_device_id zynq_of_bus_ids[] __initdata = { @@ -68,9 +68,9 @@ static void __init xilinx_irq_init(void) of_irq_init(irq_match); } -/* The minimum devices needed to be mapped before the VM system is up and - * running include the GIC, UART and Timer Counter. - */ +#define SCU_PERIPH_PHYS 0xF8F00000 +#define SCU_PERIPH_SIZE SZ_8K +#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) static struct map_desc scu_desc __initdata = { .virtual = SCU_PERIPH_VIRT, diff --git a/arch/arm/mach-zynq/include/mach/uart.h b/arch/arm/mach-zynq/include/mach/uart.h deleted file mode 100644 index 5c47c97156f348fe6fe79cee9d498516e2947654..0000000000000000000000000000000000000000 --- a/arch/arm/mach-zynq/include/mach/uart.h +++ /dev/null @@ -1,25 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/uart.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_UART_H__ -#define __MACH_UART_H__ - -#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */ -#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */ -#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */ - -#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */ -#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */ - -#endif diff --git a/arch/arm/mach-zynq/include/mach/uncompress.h b/arch/arm/mach-zynq/include/mach/uncompress.h deleted file mode 100644 index af4e8447bfa30f864c54b3f2b4d38f7fc57fa6d0..0000000000000000000000000000000000000000 --- a/arch/arm/mach-zynq/include/mach/uncompress.h +++ /dev/null @@ -1,51 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/uncompress.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_UNCOMPRESS_H__ -#define __MACH_UNCOMPRESS_H__ - -#include -#include -#include -#include - -void arch_decomp_setup(void) -{ -} - -static inline void flush(void) -{ - /* - * Wait while the FIFO is not empty - */ - while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) & - UART_SR_TXEMPTY)) - cpu_relax(); -} - -#define arch_decomp_wdog() - -static void putc(char ch) -{ - /* - * Wait for room in the FIFO, then write the char into the FIFO - */ - while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) & - UART_SR_TXFULL) - cpu_relax(); - - __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET)); -} - -#endif diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h deleted file mode 100644 index 2995044682dc99c0db40a6c4e52743d8256ed0d7..0000000000000000000000000000000000000000 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ /dev/null @@ -1,49 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/zynq_soc.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_XILINX_SOC_H__ -#define __MACH_XILINX_SOC_H__ - -#include - -#define PERIPHERAL_CLOCK_RATE 2500000 - -/* Static peripheral mappings are mapped at the top of the vmalloc region. The - * early uart mapping causes intermediate problems/failure at certain - * addresses, including the very top of the vmalloc region. Map it at an - * address that is known to work. - */ -#define UART0_PHYS 0xE0000000 -#define UART1_PHYS 0xE0001000 -#define UART_SIZE SZ_4K -#define UART_VIRT 0xF0001000 - -#define SCU_PERIPH_PHYS 0xF8F00000 -#define SCU_PERIPH_SIZE SZ_8K -#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) - -#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) -# define LL_UART_PADDR UART1_PHYS -#else -# define LL_UART_PADDR UART0_PHYS -#endif - -#define LL_UART_VADDR UART_VIRT - -/* The following are intended for the devices that are mapped early */ - -#define TTC0_BASE IOMEM(TTC0_VIRT) -#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) - -#endif