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8aceb7de
编写于
7月 10, 2012
作者:
B
Ben Skeggs
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
drm/nouveau/clk: implement stub clock subdev
Signed-off-by:
N
Ben Skeggs
<
bskeggs@redhat.com
>
上级
4196faa8
变更
15
显示空白变更内容
内联
并排
Showing
15 changed file
with
437 addition
and
0 deletion
+437
-0
drivers/gpu/drm/nouveau/Makefile
drivers/gpu/drm/nouveau/Makefile
+5
-0
drivers/gpu/drm/nouveau/core/include/subdev/clock.h
drivers/gpu/drm/nouveau/core/include/subdev/clock.h
+40
-0
drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
+65
-0
drivers/gpu/drm/nouveau/core/subdev/clock/nv40.c
drivers/gpu/drm/nouveau/core/subdev/clock/nv40.c
+65
-0
drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
+65
-0
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
+65
-0
drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
+65
-0
drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
+3
-0
drivers/gpu/drm/nouveau/core/subdev/device/nv10.c
drivers/gpu/drm/nouveau/core/subdev/device/nv10.c
+9
-0
drivers/gpu/drm/nouveau/core/subdev/device/nv20.c
drivers/gpu/drm/nouveau/core/subdev/device/nv20.c
+5
-0
drivers/gpu/drm/nouveau/core/subdev/device/nv30.c
drivers/gpu/drm/nouveau/core/subdev/device/nv30.c
+6
-0
drivers/gpu/drm/nouveau/core/subdev/device/nv40.c
drivers/gpu/drm/nouveau/core/subdev/device/nv40.c
+17
-0
drivers/gpu/drm/nouveau/core/subdev/device/nv50.c
drivers/gpu/drm/nouveau/core/subdev/device/nv50.c
+15
-0
drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c
drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c
+9
-0
drivers/gpu/drm/nouveau/core/subdev/device/nve0.c
drivers/gpu/drm/nouveau/core/subdev/device/nve0.c
+3
-0
未找到文件。
drivers/gpu/drm/nouveau/Makefile
浏览文件 @
8aceb7de
...
...
@@ -23,6 +23,11 @@ nouveau-y += core/subdev/bios/bit.o
nouveau-y
+=
core/subdev/bios/dcb.o
nouveau-y
+=
core/subdev/bios/gpio.o
nouveau-y
+=
core/subdev/bios/i2c.o
nouveau-y
+=
core/subdev/clock/nv04.o
nouveau-y
+=
core/subdev/clock/nv40.o
nouveau-y
+=
core/subdev/clock/nv50.o
nouveau-y
+=
core/subdev/clock/nva3.o
nouveau-y
+=
core/subdev/clock/nvc0.o
nouveau-y
+=
core/subdev/device/base.o
nouveau-y
+=
core/subdev/device/nv04.o
nouveau-y
+=
core/subdev/device/nv10.o
...
...
drivers/gpu/drm/nouveau/core/include/subdev/clock.h
0 → 100644
浏览文件 @
8aceb7de
#ifndef __NOUVEAU_CLOCK_H__
#define __NOUVEAU_CLOCK_H__
#include <core/device.h>
#include <core/subdev.h>
struct
nouveau_clock
{
struct
nouveau_subdev
base
;
void
(
*
pll_set
)(
struct
nouveau_clock
*
,
u32
type
,
u32
freq
);
};
static
inline
struct
nouveau_clock
*
nouveau_clock
(
void
*
obj
)
{
return
(
void
*
)
nv_device
(
obj
)
->
subdev
[
NVDEV_SUBDEV_CLOCK
];
}
#define nouveau_clock_create(p,e,o,d) \
nouveau_subdev_create((p), (e), (o), 0, "CLOCK", "clock", d)
#define nouveau_clock_destroy(p) \
nouveau_subdev_destroy(&(p)->base)
#define nouveau_clock_init(p) \
nouveau_subdev_init(&(p)->base)
#define nouveau_clock_fini(p,s) \
nouveau_subdev_fini(&(p)->base, (s))
int
nouveau_clock_create_
(
struct
nouveau_object
*
,
struct
nouveau_object
*
,
struct
nouveau_oclass
*
,
void
*
,
u32
,
int
,
void
**
);
#define _nouveau_clock_dtor _nouveau_subdev_dtor
#define _nouveau_clock_init _nouveau_subdev_init
#define _nouveau_clock_fini _nouveau_subdev_fini
extern
struct
nouveau_oclass
nv04_clock_oclass
;
extern
struct
nouveau_oclass
nv40_clock_oclass
;
extern
struct
nouveau_oclass
nv50_clock_oclass
;
extern
struct
nouveau_oclass
nva3_clock_oclass
;
extern
struct
nouveau_oclass
nvc0_clock_oclass
;
#endif
drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
0 → 100644
浏览文件 @
8aceb7de
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <subdev/clock.h>
struct
nv04_clock_priv
{
struct
nouveau_clock
base
;
};
static
void
nv04_clock_pll_set
(
struct
nouveau_clock
*
clk
,
u32
type
,
u32
freq
)
{
struct
nv04_clock_priv
*
priv
=
(
void
*
)
clk
;
nv_warn
(
priv
,
"0x%08x/%dKhz unimplemented
\n
"
,
type
,
freq
);
}
static
int
nv04_clock_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nv04_clock_priv
*
priv
;
int
ret
;
ret
=
nouveau_clock_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
priv
->
base
.
pll_set
=
nv04_clock_pll_set
;
return
0
;
}
struct
nouveau_oclass
nv04_clock_oclass
=
{
.
handle
=
NV_SUBDEV
(
CLOCK
,
0x04
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv04_clock_ctor
,
.
dtor
=
_nouveau_clock_dtor
,
.
init
=
_nouveau_clock_init
,
.
fini
=
_nouveau_clock_fini
,
},
};
drivers/gpu/drm/nouveau/core/subdev/clock/nv40.c
0 → 100644
浏览文件 @
8aceb7de
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <subdev/clock.h>
struct
nv40_clock_priv
{
struct
nouveau_clock
base
;
};
static
void
nv40_clock_pll_set
(
struct
nouveau_clock
*
clk
,
u32
type
,
u32
freq
)
{
struct
nv40_clock_priv
*
priv
=
(
void
*
)
clk
;
nv_warn
(
priv
,
"0x%08x/%dKhz unimplemented
\n
"
,
type
,
freq
);
}
static
int
nv40_clock_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nv40_clock_priv
*
priv
;
int
ret
;
ret
=
nouveau_clock_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
priv
->
base
.
pll_set
=
nv40_clock_pll_set
;
return
0
;
}
struct
nouveau_oclass
nv40_clock_oclass
=
{
.
handle
=
NV_SUBDEV
(
CLOCK
,
0x40
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv40_clock_ctor
,
.
dtor
=
_nouveau_clock_dtor
,
.
init
=
_nouveau_clock_init
,
.
fini
=
_nouveau_clock_fini
,
},
};
drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
0 → 100644
浏览文件 @
8aceb7de
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <subdev/clock.h>
struct
nv50_clock_priv
{
struct
nouveau_clock
base
;
};
static
void
nv50_clock_pll_set
(
struct
nouveau_clock
*
clk
,
u32
type
,
u32
freq
)
{
struct
nv50_clock_priv
*
priv
=
(
void
*
)
clk
;
nv_warn
(
priv
,
"0x%08x/%dKhz unimplemented
\n
"
,
type
,
freq
);
}
static
int
nv50_clock_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nv50_clock_priv
*
priv
;
int
ret
;
ret
=
nouveau_clock_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
priv
->
base
.
pll_set
=
nv50_clock_pll_set
;
return
0
;
}
struct
nouveau_oclass
nv50_clock_oclass
=
{
.
handle
=
NV_SUBDEV
(
CLOCK
,
0x50
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv50_clock_ctor
,
.
dtor
=
_nouveau_clock_dtor
,
.
init
=
_nouveau_clock_init
,
.
fini
=
_nouveau_clock_fini
,
},
};
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
0 → 100644
浏览文件 @
8aceb7de
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <subdev/clock.h>
struct
nva3_clock_priv
{
struct
nouveau_clock
base
;
};
static
void
nva3_clock_pll_set
(
struct
nouveau_clock
*
clk
,
u32
type
,
u32
freq
)
{
struct
nva3_clock_priv
*
priv
=
(
void
*
)
clk
;
nv_warn
(
priv
,
"0x%08x/%dKhz unimplemented
\n
"
,
type
,
freq
);
}
static
int
nva3_clock_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nva3_clock_priv
*
priv
;
int
ret
;
ret
=
nouveau_clock_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
priv
->
base
.
pll_set
=
nva3_clock_pll_set
;
return
0
;
}
struct
nouveau_oclass
nva3_clock_oclass
=
{
.
handle
=
NV_SUBDEV
(
CLOCK
,
0xa3
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nva3_clock_ctor
,
.
dtor
=
_nouveau_clock_dtor
,
.
init
=
_nouveau_clock_init
,
.
fini
=
_nouveau_clock_fini
,
},
};
drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
0 → 100644
浏览文件 @
8aceb7de
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <subdev/clock.h>
struct
nvc0_clock_priv
{
struct
nouveau_clock
base
;
};
static
void
nvc0_clock_pll_set
(
struct
nouveau_clock
*
clk
,
u32
type
,
u32
freq
)
{
struct
nvc0_clock_priv
*
priv
=
(
void
*
)
clk
;
nv_warn
(
priv
,
"0x%08x/%dKhz unimplemented
\n
"
,
type
,
freq
);
}
static
int
nvc0_clock_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nvc0_clock_priv
*
priv
;
int
ret
;
ret
=
nouveau_clock_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
priv
->
base
.
pll_set
=
nvc0_clock_pll_set
;
return
0
;
}
struct
nouveau_oclass
nvc0_clock_oclass
=
{
.
handle
=
NV_SUBDEV
(
CLOCK
,
0xc0
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nvc0_clock_ctor
,
.
dtor
=
_nouveau_clock_dtor
,
.
init
=
_nouveau_clock_init
,
.
fini
=
_nouveau_clock_fini
,
},
};
drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
浏览文件 @
8aceb7de
...
...
@@ -25,6 +25,7 @@
#include <subdev/device.h>
#include <subdev/bios.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nv04_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -33,10 +34,12 @@ nv04_identify(struct nouveau_device *device)
case
0x04
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x05
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown RIVA chipset
\n
"
);
...
...
drivers/gpu/drm/nouveau/core/subdev/device/nv10.c
浏览文件 @
8aceb7de
...
...
@@ -26,6 +26,7 @@
#include <subdev/bios.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nv10_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -35,41 +36,49 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x15
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x16
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x1a
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x11
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x17
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x1f
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x18
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown Celsius chipset
\n
"
);
...
...
drivers/gpu/drm/nouveau/core/subdev/device/nv20.c
浏览文件 @
8aceb7de
...
...
@@ -26,6 +26,7 @@
#include <subdev/bios.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nv20_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -35,21 +36,25 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x25
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x28
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x2a
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown Kelvin chipset
\n
"
);
...
...
drivers/gpu/drm/nouveau/core/subdev/device/nv30.c
浏览文件 @
8aceb7de
...
...
@@ -26,6 +26,7 @@
#include <subdev/bios.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nv30_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -35,26 +36,31 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x35
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x31
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x36
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
case
0x34
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv04_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown Rankine chipset
\n
"
);
...
...
drivers/gpu/drm/nouveau/core/subdev/device/nv40.c
浏览文件 @
8aceb7de
...
...
@@ -26,6 +26,7 @@
#include <subdev/bios.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nv40_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -35,81 +36,97 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x41
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x42
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x43
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x45
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x47
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x49
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x4b
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x44
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x46
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x4a
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x4c
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x4e
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x63
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x67
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
case
0x68
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv10_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv40_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown Curie chipset
\n
"
);
...
...
drivers/gpu/drm/nouveau/core/subdev/device/nv50.c
浏览文件 @
8aceb7de
...
...
@@ -26,6 +26,7 @@
#include <subdev/bios.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nv50_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -35,71 +36,85 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0x84
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0x86
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0x92
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0x94
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0x96
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0x98
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0xa0
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0xaa
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0xac
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nv50_clock_oclass
;
break
;
case
0xa3
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nva3_clock_oclass
;
break
;
case
0xa5
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nva3_clock_oclass
;
break
;
case
0xa8
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nva3_clock_oclass
;
break
;
case
0xaf
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nva3_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown Tesla chipset
\n
"
);
...
...
drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c
浏览文件 @
8aceb7de
...
...
@@ -26,6 +26,7 @@
#include <subdev/bios.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nvc0_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -35,41 +36,49 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xc4
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xc3
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xce
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xcf
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xc1
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xc8
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nv50_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xd9
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nvd0_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown Fermi chipset
\n
"
);
...
...
drivers/gpu/drm/nouveau/core/subdev/device/nve0.c
浏览文件 @
8aceb7de
...
...
@@ -26,6 +26,7 @@
#include <subdev/bios.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/clock.h>
int
nve0_identify
(
struct
nouveau_device
*
device
)
...
...
@@ -35,11 +36,13 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nvd0_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
case
0xe7
:
device
->
oclass
[
NVDEV_SUBDEV_VBIOS
]
=
&
nouveau_bios_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_GPIO
]
=
&
nvd0_gpio_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_I2C
]
=
&
nouveau_i2c_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_CLOCK
]
=
&
nvc0_clock_oclass
;
break
;
default:
nv_fatal
(
device
,
"unknown Kepler chipset
\n
"
);
...
...
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