Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
gsplhtlxg
clone-Linux
提交
382ab78c
C
clone-Linux
项目概览
gsplhtlxg
/
clone-Linux
通知
2
Star
0
Fork
1
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
C
clone-Linux
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
DevOps
DevOps
流水线
流水线任务
计划
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
流水线任务
提交
Issue看板
体验新版 GitCode,发现更多精彩内容 >>
提交
382ab78c
编写于
12月 05, 2010
作者:
C
Chris Wilson
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'drm-intel-fixes' into drm-intel-next
上级
f7746f0e
49078f7d
变更
1
隐藏空白更改
内联
并排
Showing
1 changed file
with
59 addition
and
13 deletion
+59
-13
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_display.c
+59
-13
未找到文件。
drivers/gpu/drm/i915/intel_display.c
浏览文件 @
382ab78c
...
...
@@ -2709,27 +2709,19 @@ fdi_reduce_ratio(u32 *num, u32 *den)
}
}
#define DATA_N 0x800000
#define LINK_N 0x80000
static
void
ironlake_compute_m_n
(
int
bits_per_pixel
,
int
nlanes
,
int
pixel_clock
,
int
link_clock
,
struct
fdi_m_n
*
m_n
)
{
u64
temp
;
m_n
->
tu
=
64
;
/* default size */
temp
=
(
u64
)
DATA_N
*
pixel_clock
;
temp
=
div_u64
(
temp
,
link_clock
);
m_n
->
gmch_m
=
div_u64
(
temp
*
bits_per_pixel
,
nlanes
);
m_n
->
gmch_m
>>=
3
;
/* convert to bytes_per_pixel */
m_n
->
gmch_n
=
DATA_N
;
/* BUG_ON(pixel_clock > INT_MAX / 36); */
m_n
->
gmch_m
=
bits_per_pixel
*
pixel_clock
;
m_n
->
gmch_n
=
link_clock
*
nlanes
*
8
;
fdi_reduce_ratio
(
&
m_n
->
gmch_m
,
&
m_n
->
gmch_n
);
temp
=
(
u64
)
LINK_N
*
pixel_clock
;
m_n
->
link_m
=
div_u64
(
temp
,
link_clock
);
m_n
->
link_n
=
LINK_N
;
m_n
->
link_m
=
pixel_clock
;
m_n
->
link_n
=
link_clock
;
fdi_reduce_ratio
(
&
m_n
->
link_m
,
&
m_n
->
link_n
);
}
...
...
@@ -3713,6 +3705,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
/* FDI link */
if
(
HAS_PCH_SPLIT
(
dev
))
{
int
pixel_multiplier
=
intel_mode_get_pixel_multiplier
(
adjusted_mode
);
int
lane
=
0
,
link_bw
,
bpp
;
/* CPU eDP doesn't require FDI link, so just set DP M/N
according to current link config */
...
...
@@ -3796,6 +3789,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
intel_crtc
->
fdi_lanes
=
lane
;
if
(
pixel_multiplier
>
1
)
link_bw
*=
pixel_multiplier
;
ironlake_compute_m_n
(
bpp
,
lane
,
target_clock
,
link_bw
,
&
m_n
);
}
...
...
@@ -5263,6 +5258,55 @@ static const struct drm_crtc_funcs intel_crtc_funcs = {
.
page_flip
=
intel_crtc_page_flip
,
};
static
void
intel_sanitize_modesetting
(
struct
drm_device
*
dev
,
int
pipe
,
int
plane
)
{
struct
drm_i915_private
*
dev_priv
=
dev
->
dev_private
;
u32
reg
,
val
;
if
(
HAS_PCH_SPLIT
(
dev
))
return
;
/* Who knows what state these registers were left in by the BIOS or
* grub?
*
* If we leave the registers in a conflicting state (e.g. with the
* display plane reading from the other pipe than the one we intend
* to use) then when we attempt to teardown the active mode, we will
* not disable the pipes and planes in the correct order -- leaving
* a plane reading from a disabled pipe and possibly leading to
* undefined behaviour.
*/
reg
=
DSPCNTR
(
plane
);
val
=
I915_READ
(
reg
);
if
((
val
&
DISPLAY_PLANE_ENABLE
)
==
0
)
return
;
if
(
!!
(
val
&
DISPPLANE_SEL_PIPE_MASK
)
==
pipe
)
return
;
/* This display plane is active and attached to the other CPU pipe. */
pipe
=
!
pipe
;
/* Disable the plane and wait for it to stop reading from the pipe. */
I915_WRITE
(
reg
,
val
&
~
DISPLAY_PLANE_ENABLE
);
intel_flush_display_plane
(
dev
,
plane
);
if
(
IS_GEN2
(
dev
))
intel_wait_for_vblank
(
dev
,
pipe
);
if
(
pipe
==
0
&&
(
dev_priv
->
quirks
&
QUIRK_PIPEA_FORCE
))
return
;
/* Switch off the pipe. */
reg
=
PIPECONF
(
pipe
);
val
=
I915_READ
(
reg
);
if
(
val
&
PIPECONF_ENABLE
)
{
I915_WRITE
(
reg
,
val
&
~
PIPECONF_ENABLE
);
intel_wait_for_pipe_off
(
dev
,
pipe
);
}
}
static
void
intel_crtc_init
(
struct
drm_device
*
dev
,
int
pipe
)
{
...
...
@@ -5314,6 +5358,8 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
setup_timer
(
&
intel_crtc
->
idle_timer
,
intel_crtc_idle_timer
,
(
unsigned
long
)
intel_crtc
);
intel_sanitize_modesetting
(
dev
,
intel_crtc
->
pipe
,
intel_crtc
->
plane
);
}
int
intel_get_pipe_from_crtc_id
(
struct
drm_device
*
dev
,
void
*
data
,
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录