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由 Paul Walmsley 提交于
There shouldn't be any need to jump to SRAM code if the OMAP CORE clockdomain (and consequently the SDRAM controller and CORE PLL) stays active during MPU WFI. The SRAM code should only be needed when the RAM enters self-refresh. So in the case where CORE stays active, just call WFI directly from the mach-omap2/pm24xx.c code. This removes some unnecessary SRAM code. This second version replaces the inline WFI with the corresponding coprocessor register call, using tlbflush.h as an example. This is because the assembler doesn't recognize WFI as a valid ARMv6 instruction. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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