diff --git a/bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s b/bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s
index d38ddd3fa4363518488e36a6b5c95351be1c63ba..4deacdd1e5a1a03e179030d342a46b17840fd93f 100644
--- a/bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s
+++ b/bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s
@@ -14,8 +14,8 @@
;******************************************************************************
;* @attention
;*
-;* © Copyright (c) 2019 STMicroelectronics.
-;* All rights reserved. Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
-Stack_Size EQU 0x00000400
+Stack_Size EQU 0x00000800
AREA STACK, NOINIT, READWRITE, ALIGN=3
__stack_limit
diff --git a/bsp/stm32/stm32mp157a-st-ev1/.config b/bsp/stm32/stm32mp157a-st-ev1/.config
new file mode 100644
index 0000000000000000000000000000000000000000..4f6a2ab164d5794d1b3c5a21e612f202a125670b
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/.config
@@ -0,0 +1,450 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+CONFIG_RT_USING_TIMER_SOFT=y
+CONFIG_RT_TIMER_THREAD_PRIO=4
+CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+CONFIG_RT_DEBUG=y
+CONFIG_RT_DEBUG_COLOR=y
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_MEMHEAP=y
+# CONFIG_RT_USING_NOHEAP is not set
+# CONFIG_RT_USING_SMALL_MEM is not set
+# CONFIG_RT_USING_SLAB is not set
+CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
+CONFIG_RT_VER_NUM=0x40003
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M4=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_SERIAL_USING_DMA=y
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_PTHREADS is not set
+# CONFIG_RT_USING_MODULE is not set
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_LWP is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_UKAL is not set
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32MP1=y
+
+#
+# Hardware Drivers Config
+#
+CONFIG_SOC_STM32MP157A=y
+
+#
+# Onboard Peripheral Drivers
+#
+CONFIG_BSP_USING_STLINK_TO_USART=y
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+# CONFIG_BSP_USING_WWDG is not set
+CONFIG_BSP_USING_UART=y
+# CONFIG_BSP_USING_UART3 is not set
+# CONFIG_BSP_UART3_RX_USING_DMA is not set
+CONFIG_BSP_USING_UART4=y
+# CONFIG_BSP_UART4_RX_USING_DMA is not set
+# CONFIG_BSP_UART4_TX_USING_DMA is not set
+# CONFIG_BSP_USING_TIM is not set
+# CONFIG_BSP_USING_LPTIM is not set
+# CONFIG_BSP_USING_PWM is not set
+# CONFIG_BSP_USING_ADC is not set
+# CONFIG_BSP_USING_DAC is not set
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_CRC is not set
+# CONFIG_BSP_USING_RNG is not set
+# CONFIG_BSP_USING_UDID is not set
+
+#
+# Board extended module Drivers
+#
diff --git a/bsp/stm32/stm32mp157a-st-ev1/.gitignore b/bsp/stm32/stm32mp157a-st-ev1/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..7221bde019df6157cbf9e42ef5ab8a78420e3b68
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/.gitignore
@@ -0,0 +1,42 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h
diff --git a/bsp/stm32/stm32mp157a-st-ev1/.project b/bsp/stm32/stm32mp157a-st-ev1/.project
new file mode 100644
index 0000000000000000000000000000000000000000..29d7c74de54734cade9c44dbe15d1ac350c609d9
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/.project
@@ -0,0 +1,11 @@
+
+
+ STM32MP157
+
+
+
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/EventRecorderStub.scvd b/bsp/stm32/stm32mp157a-st-ev1/EventRecorderStub.scvd
new file mode 100644
index 0000000000000000000000000000000000000000..2956b29683898915efa436cc948384a2c431dc31
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/EventRecorderStub.scvd
@@ -0,0 +1,9 @@
+
+
+
+
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/Kconfig b/bsp/stm32/stm32mp157a-st-ev1/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..7a400db91f4a82292908c8b2b99e87e4193f78d0
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/Kconfig
@@ -0,0 +1,22 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+ string
+ option env="BSP_ROOT"
+ default "."
+
+config RTT_DIR
+ string
+ option env="RTT_ROOT"
+ default "../../.."
+
+config PKGS_DIR
+ string
+ option env="PKGS_ROOT"
+ default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "../libraries/Kconfig"
+source "board/Kconfig"
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/README.md b/bsp/stm32/stm32mp157a-st-ev1/README.md
new file mode 100644
index 0000000000000000000000000000000000000000..a4798872c458207566bc033bbb8e27dd4e37c732
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/README.md
@@ -0,0 +1,168 @@
+# STM32MP157A-EV1 BSP (Board Support Package) Execution Instruction
+
+[中文页](README_zh.md) |
+
+# Introduction
+
+This document records the execution instruction of the BSP (board support package) provided by the RT-Thread development team for the STM32MP157A-EV1 development board.
+
+The document is covered in three parts:
+
+- STM32MP157A-EV1 Board Resources Introduction
+
+- Quickly Get Started
+
+- Advanced Features
+
+By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
+
+## STM32MP157A-EV1 Board Resources Introduction
+
+The STM32MP157A-EV1 is a development board based on a dual Cortex-A7 and Cortex-M4 core. The Cortex-A7 core operates at 650 MHZ and the Cortex-M4 operates at 209MHZ. There is no Flash inside the STM32MP157A.
+
+ 
+
+The mainly-used **on-board resources** are shown as follows:
+
+* MCU : STM32MP157AAAx
+* Common peripherals:
+ - 4 LEDs: LD4(PD8), LD5(PD9), LD2(PA13), LD3(PA14)
+ - 4 Buttons: WAKE_UP, RESET (NRST), USER1(PA13), USER2 (PA14)
+* Common-used interface: USB, SD card, Ethernet, MIPI, USB HOST, Audio, HDMI, Arduino.
+* Debug interface: Standard JTAG/SWD.
+
+For more details about this board, please refer to the ST official documentation:
+
+[STM32MP157A-EV1 Development board introduction](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-eval-boards/stm32mp157a-ev1.html)
+
+## Peripheral Condition
+
+Each peripheral supporting condition for this BSP is as follows:
+
+| On-board Peripheral | **Support** | **Remark** |
+| :----------------------------- | :---------: | :--------------: |
+| USB TO UART | YES | |
+| PMIC | NO | |
+| CAMERA | NO | OV5640 |
+| MFX | NO | |
+| FMC | NO | MT25F8G08A8ACAH4 |
+| QSPI FLASH | NO | MX25L51245G |
+| OpenAMP | NO | |
+| POWER | NO | |
+| SD Card (SDMMC1) | NO | |
+| EMMC(SDMMC2) | NO | |
+| ETH | NO | |
+| AUDIO | NO | WM8994 |
+| **On-chip Peripheral Drivers** | **Support** | **Remark** |
+| GPIO | YES | |
+| UART | YES | UART4 (ST-Link) |
+| EXTI | YES | |
+| SPI | YES | |
+| TIM | YES | |
+| LPTIM | YES | |
+| I2C | YES | Software |
+| ADC | YES | |
+| DAC | YES | |
+| WWDG | YES | |
+| MDMA | NO | |
+| SPDIFRX | NO | |
+| DFSDM | NO | |
+| PWM | NO | |
+| FDCAN | NO | |
+| CRC | NO | |
+| RNG | NO | |
+| HASH | NO | |
+| CRYP | NO | |
+
+## Execution Instruction
+
+### Quickly Get Started
+
+This BSP provides IAR projects for developers. Here's an example of the IAR development environment, to introduce how to run the system.
+
+#### Hardware Connection
+
+Use a USB cable to connect the development board to the PC and turn on the power switch.
+
+#### Compile And Download
+
+Double-click the project.eww file, to open the IAR project, compile and download the program to the board.
+
+> By default, the project uses ST_LINK simulator to download the program, when the ST_LINK connects the board, clicking the download button can download the program to the board.
+
+#### Running Results
+
+After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the orange LD4 will flash periodically.
+
+Connect the serial port of the board to PC, communicate with it via a serial terminal tool (115200-8-1-N). Restart the board and the startup information of RT-Thread will be observed:
+
+```bash
+ \ | /
+- RT - Thread Operating System
+ / | \ 3.1.1 build Nov 19 2018
+ 2006 - 2018 Copyright by rt-thread team
+msh >
+```
+
+#### Drivers
+
+##### 1. DAC
+
+* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
+* Enter the `menuconfig` command, enter the Hardware Drivers config and open DAC, save and exit;
+
+* Enter the `scons --target=iar` command to regenerate project.
+
+###### Finsh
+
+Before you use a device, you need to find out if the device exists, and you can use the name of the DAC device that is enrolled with the command `dac probe` . As shown as follows.
+
+```
+msh />dac probe dac1
+probe dac1 success
+```
+
+Enable the channel of the device can use the command `dac enable` followed by the channel number.
+
+ ```shell
+msh />dac probe dac1
+probe dac1 success
+ ```
+
+Set up the data of the channel for a DAC device can use the command `dac write` followed by the channel number.
+
+```
+msh />dac write 1 1000
+dac1 channel 1 write value is 1000
+```
+
+Disable the channel of the device can use the command `dac disable` followed by the channel number.
+
+```c
+msh />dac disable 1
+dac1 channel 1 disable success
+```
+
+### Advanced Features
+
+This BSP only enables GPIO and serial port 4 by default. If need more advanced features, you need to configure the BSP with RT-Thread Env tools, as follows:
+
+* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
+* Enter the `menuconfig` command to configure the project, then save and exit;
+* Enter the `pkgs --update` command to update the packages;
+* Enter the `scons --target=iar `command to regenerate the project.
+
+## Notes
+
+* Before downloading the program, set the board to the mode of "Engineering Mode". The BOOT switch sets to BOOT0=0,BOOT1 = 0 and BOOT2=1, as shown below:
+
+
+#include
+#include
+
+/* defined the LD4 pin: PD8 */
+#define LED4_PIN GET_PIN(D, 8)
+
+int main(void)
+{
+ int count = 1;
+ /* set LD8 pin mode to output */
+ rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
+
+ while (count++)
+ {
+ rt_pin_write(LED4_PIN, PIN_HIGH);
+ rt_thread_mdelay(500);
+ rt_pin_write(LED4_PIN, PIN_LOW);
+ rt_thread_mdelay(500);
+ }
+
+ return RT_EOK;
+}
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/.mxproject
new file mode 100644
index 0000000000000000000000000000000000000000..d2274cfbc139d830bcc8c60c325c9e4791bcba79
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/.mxproject
@@ -0,0 +1,14 @@
+[PreviousGenFiles]
+HeaderPath=D:/3_work/GitRepositories/rt-thread/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Inc
+HeaderFiles=stm32mp1xx_it.h;stm32mp1xx_hal_conf.h;main.h;
+SourcePath=D:/3_work/GitRepositories/rt-thread/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src
+SourceFiles=stm32mp1xx_it.c;stm32mp1xx_hal_msp.c;main.c;
+
+[PreviousLibFiles]
+LibFiles=Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_adc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_adc_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_ll_adc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_rcc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_rcc_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_gpio.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_gpio_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_hsem.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dma.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dma_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_mdma.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_pwr.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_pwr_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_cortex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_def.h;Drivers/STM32MP1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_exti.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dac.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dac_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_ipcc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_lptim.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_spi.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_spi_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_tim.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_tim_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_uart.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_uart_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_wwdg.h;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_adc.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_gpio.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hsem.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_mdma.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cortex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_exti.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ipcc.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_lptim.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart_ex.c;Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_wwdg.c;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_adc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_adc_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_ll_adc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_rcc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_rcc_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_gpio.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_gpio_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_hsem.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dma.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dma_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_mdma.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_pwr.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_pwr_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_cortex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_def.h;Drivers/STM32MP1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_exti.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dac.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_dac_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_ipcc.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_lptim.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_spi.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_spi_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_tim.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_tim_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_uart.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_uart_ex.h;Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_wwdg.h;Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp157axx_cm4.h;Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp1xx.h;Drivers/CMSIS/Device/ST/STM32MP1xx/Include/system_stm32mp1xx.h;Drivers/CMSIS/Device/ST/STM32MP1xx/Source/Templates/system_stm32mp1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+
+[PreviousUsedIarFiles]
+SourceFiles=..\CM4\Src\main.c;..\CM4\Src\stm32mp1xx_it.c;..\CM4\Src\stm32mp1xx_hal_msp.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_adc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_gpio.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hsem.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_mdma.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cortex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_exti.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ipcc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_lptim.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_wwdg.c;..\Common/System/system_stm32mp1xx.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_adc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_gpio.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hsem.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_mdma.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cortex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_exti.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ipcc.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_lptim.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart_ex.c;..\Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_wwdg.c;..\Common/System/system_stm32mp1xx.c;..\Drivers/CMSIS/Device/ST/STM32MP1xx/Source/Templates/system_stm32mp1xx.c;;
+HeaderPath=..\Drivers\STM32MP1xx_HAL_Driver\Inc;..\Drivers\STM32MP1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32MP1xx\Include;..\Drivers\CMSIS\Include;..\CM4\Inc;
+CDefines=CORE_CM4;CORE_CM4;CORE_CM4;USE_HAL_DRIVER;STM32MP157Axx;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Inc/main.h b/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Inc/main.h
new file mode 100644
index 0000000000000000000000000000000000000000..9880e4f884d7cee85cbf308f4940066f92985404
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Inc/main.h
@@ -0,0 +1,77 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+#include "stm32mp1xx.h"
+#include "stm32mp1xx_hal.h"
+#include "drv_common.h"
+#include "drv_gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define STM32_FLASH_START_ADRESS ((uint32_t)0x10000000)
+#define STM32_FLASH_SIZE (256 * 1024)
+#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
+
+#define STM32_SRAM_SIZE (128)
+#define STM32_SRAM_END ((uint32_t)0x10040000 + (STM32_SRAM_SIZE * 1024))
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN (__segment_end("CSTACK"))
+#else
+extern int __bss_end__;
+#define HEAP_BEGIN (0x10040000 + 64 * 1024)
+#endif
+
+#define HEAP_END STM32_SRAM_END
+
+void SystemClock_Config(void);
+
+extern void _Error_Handler(char *s, int num);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.icf b/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.icf
new file mode 100644
index 0000000000000000000000000000000000000000..9aa4aad24e577a197f903f38d13c2c70a73ade12
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x1003FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x10050000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x1005FFFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x0400;
+define symbol __ICFEDIT_size_heap__ = 0x0000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+/* Create region for OPENAMP */
+/* !!! These 4 lines can be commented if OPENAMP is not used !!!*/
+define symbol __OPENAMP_region_start__ = 0x10040000;
+define symbol __OPENAMP_region_size__ = 0x8000;
+export symbol __OPENAMP_region_start__;
+export symbol __OPENAMP_region_size__;
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite, last block CSTACK};
\ No newline at end of file
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.lds b/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.lds
new file mode 100644
index 0000000000000000000000000000000000000000..b2ae4c15ec7ac235203b49dd4c4c4cc813285593
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.lds
@@ -0,0 +1,157 @@
+/*
+ * linker script for STM32F4xx with GNU ld
+ * bernard.xiong 2009-10-14
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+ ROM (rx) : ORIGIN = 0x10000000, LENGTH = 256k /* 256KB flash */
+ RAM (rw) : ORIGIN = 0x10040000, LENGTH = 128k /* 128K sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x200;
+
+SECTIONS
+{
+ .text :
+ {
+ . = ALIGN(4);
+ _stext = .;
+ KEEP(*(.isr_vector)) /* Startup code */
+
+ . = ALIGN(4);
+ *(.text) /* remaining code */
+ *(.text.*) /* remaining code */
+ *(.rodata) /* read-only data (constants) */
+ *(.rodata*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.gnu.linkonce.t*)
+
+ /* section information for finsh shell */
+ . = ALIGN(4);
+ __fsymtab_start = .;
+ KEEP(*(FSymTab))
+ __fsymtab_end = .;
+
+ . = ALIGN(4);
+ __vsymtab_start = .;
+ KEEP(*(VSymTab))
+ __vsymtab_end = .;
+
+ /* section information for initial. */
+ . = ALIGN(4);
+ __rt_init_start = .;
+ KEEP(*(SORT(.rti_fn*)))
+ __rt_init_end = .;
+
+ . = ALIGN(4);
+
+ PROVIDE(__ctors_start__ = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE(__ctors_end__ = .);
+
+ . = ALIGN(4);
+
+ _etext = .;
+ } > ROM = 0
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+ /* This is used by the startup in order to initialize the .data secion */
+ _sidata = .;
+ } > ROM
+ __exidx_end = .;
+
+ /* .data section which is used for initialized data */
+
+ .data : AT (_sidata)
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _sdata = . ;
+
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+
+ PROVIDE(__dtors_start__ = .);
+ KEEP(*(SORT(.dtors.*)))
+ KEEP(*(.dtors))
+ PROVIDE(__dtors_end__ = .);
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _edata = . ;
+ } >RAM
+
+ .stack :
+ {
+ . = ALIGN(4);
+ _sstack = .;
+ . = . + _system_stack_size;
+ . = ALIGN(4);
+ _estack = .;
+ } >RAM
+
+ __bss_start = .;
+ .bss :
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .;
+
+ *(.bss)
+ *(.bss.*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _ebss = . ;
+
+ *(.bss.init)
+ } > RAM
+ __bss_end = .;
+
+ _end = .;
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ * Symbols in the DWARF debugging sections are relative to the beginning
+ * of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.sct b/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.sct
new file mode 100644
index 0000000000000000000000000000000000000000..40d9679d172d016b0e15d7fd83ba6b37e3af90e5
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.sct
@@ -0,0 +1,27 @@
+; *************************************************************
+; *** Scatter-Loading Description ***
+; *************************************************************
+
+LR_VECTORS 0x00000000 0x00000400 { ; load region size_region
+ .isr_vector +0 {
+ startup*.o (RESET, +First)
+ }
+}
+
+LR_IROM1 0x10000000 0x00040000 { ; load region size_region
+ ER_IROM1 0x10000000 0x00040000 { ; load address = execution address
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ .ANY (+XO)
+ }
+ RW_IRAM1 0x10050000 0x00010000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+
+
+;; ***** Create region for OPENAMP *****
+;; *** These 4 lines can be commented if OPENAMP is not used *****
+; .resource_table +0 ALIGN 4 { ; resource table
+; *(.resource_table)
+; } __OpenAMP_SHMEM__ 0x10040000 EMPTY 0x8000 {} ; Shared Memory area used by OpenAMP
+}
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.c b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.c
new file mode 100644
index 0000000000000000000000000000000000000000..f4bc430a110b0c8d62e09c066bf7d562c985e0dc
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2020-06-18 thread-liu the first version
+ */
+
+#include
+#include "drv_hard_i2c.h"
+
+//#define DRV_DEBUG
+#define LOG_TAG "drv.hardi2c"
+#include
+
+I2C_HandleTypeDef hI2c4;
+
+int32_t BSP_I2C4_Init(void)
+{
+ int32_t status = RT_EOK;
+
+ if (HAL_I2C_GetState(&hI2c4) == HAL_I2C_STATE_RESET)
+ {
+ if (MX_I2C4_Init(&hI2c4) != HAL_OK)
+ {
+ status = -RT_EBUSY;
+ }
+ /* Init the I2C Msp */
+ if (HAL_I2C_Init(&hI2c4) != HAL_OK)
+ {
+ LOG_D("I2C4 Init Error!\n");
+ status = -RT_EBUSY;
+ }
+ }
+ return status;
+}
+
+int32_t BSP_I2C4_DeInit(void)
+{
+ int32_t status = RT_EOK;
+
+ HAL_I2C_MspDeInit(&hI2c4);
+
+ /* Init the I2C */
+ if (HAL_I2C_DeInit(&hI2c4) != HAL_OK)
+ {
+ status = -RT_EEMPTY;
+ }
+
+ return status;
+}
+
+HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c)
+{
+ hI2c4.Instance = I2C4;
+ hI2c->Init.Timing = I2C4_TIMING;
+ hI2c->Init.OwnAddress1 = STPMU1_I2C_ADDRESS;
+ hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ hI2c->Init.OwnAddress2 = 0;
+ hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
+ hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+
+ return HAL_I2C_Init(hI2c);
+}
+
+int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
+{
+ return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
+}
+
+int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
+{
+ return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
+}
+
+int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
+{
+ return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
+}
+
+int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
+{
+ return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
+}
+
+int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials)
+{
+ int32_t status = RT_EOK;
+
+ if(HAL_I2C_IsDeviceReady(&hI2c4, DevAddr, Trials, 1000) != HAL_OK)
+ {
+ status = -RT_EBUSY;
+ }
+
+ return status;
+}
+
+static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
+{
+ int32_t status = -RT_EIO;
+
+ if(HAL_I2C_Mem_Write(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
+ {
+ status = RT_EOK;
+ }
+
+ return status;
+}
+
+static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
+{
+ int32_t status = -RT_EIO;
+
+ if (HAL_I2C_Mem_Read(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
+ {
+ status = RT_EOK;
+ }
+
+ return status;
+}
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.h b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.h
new file mode 100644
index 0000000000000000000000000000000000000000..e3ec157d0c23817e77cd2beebf31170b4e60f4d5
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2020-06-18 thread-liu the first version
+ */
+
+#ifndef __DRV_HARD_I2C_H__
+#define __DRV_HARD_I2C_H__
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32mp1xx_hal.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define STPMU1_I2C_ADDRESS ((0x33 & 0x7F) << 1)
+
+#ifndef I2C_SPEED
+#define I2C_SPEED ((uint32_t)100000)
+#endif /* I2C_SPEED */
+
+#ifndef I2C4_TIMING
+#define I2C4_TIMING ((uint32_t)0x10805E89)
+#endif
+
+static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
+static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
+
+int32_t BSP_I2C4_Init(void);
+int32_t BSP_I2C4_DeInit(void);
+int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials);
+
+HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_lptim.c b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_lptim.c
new file mode 100644
index 0000000000000000000000000000000000000000..2b8d63b0ae8a5a1a3f158e6748c89df010b04f0a
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_lptim.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2020-06-19 thread-liu first version
+ */
+
+#include
+
+#ifdef BSP_USING_LPTIM
+#include "drv_config.h"
+#include
+#include
+
+//#define DRV_DEBUG
+#define LOG_TAG "drv.lptimer"
+#include
+
+LPTIM_HandleTypeDef hlptim1;
+
+void LPTIM1_IRQHandler(void)
+{
+ /* enter interrupt */
+ rt_interrupt_enter();
+
+ HAL_LPTIM_IRQHandler(&hlptim1);
+
+ /* leave interrupt */
+ rt_interrupt_leave();
+}
+
+void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
+{
+ if(hlptim->Instance == LPTIM1)
+ {
+ rt_kprintf("hello rt-thread!\n");
+ }
+}
+
+static int lptim_control(uint8_t pre_value)
+{
+ if(pre_value > 7)
+ {
+ pre_value = 7;
+ }
+ hlptim1.Instance->CFGR &= ~(7 << 9); /* clear PRESC[2:0] */
+ hlptim1.Instance->CFGR |= pre_value << 9; /* set PRESC[2:0] */
+
+ return RT_EOK;
+}
+
+/**
+ * This function initialize the lptim
+ */
+static int lptim_init(void)
+{
+ hlptim1.Instance = LPTIM1;
+ hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
+ hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
+ hlptim1.Init.UltraLowPowerClock.Polarity = LPTIM_CLOCKPOLARITY_RISING;
+ hlptim1.Init.UltraLowPowerClock.SampleTime = LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION;
+ hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
+ hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
+ hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
+ hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
+ hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
+ hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
+ if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
+ {
+ LOG_D("LPTIM Init Error!\n");
+ return -RT_ERROR;
+ }
+ /* ### Start counting in interrupt mode ############################# */
+ if (HAL_LPTIM_Counter_Start_IT(&hlptim1, 5000) != HAL_OK)
+ {
+ LOG_D("LPTIM Start Counting Error!\n");
+ return -RT_ERROR;
+ }
+
+ return RT_EOK;
+}
+
+static int lptim_deinit()
+{
+ if (HAL_LPTIM_DeInit(&hlptim1) != HAL_OK)
+ {
+ LOG_D("LPTIM Deinit Error!\n");
+ return -RT_ERROR;
+ }
+
+ return RT_EOK;
+}
+
+static int lptim_sample(int argc, char *argv[])
+{
+ if (argc > 1)
+ {
+ if (!strcmp(argv[1], "run"))
+ {
+ lptim_init();
+ }
+ else if (!strcmp(argv[1], "stop"))
+ {
+ lptim_deinit();
+ }
+ else if (!strcmp(argv[1], "set"))
+ {
+ if (argc > 2)
+ {
+ lptim_control(atoi(argv[2]));
+ }
+ }
+ }
+ else
+ {
+ rt_kprintf("Usage:\n");
+ rt_kprintf("lptim_sample run - open lptim, shell will printf 'hello rt-thread'\n");
+ rt_kprintf("lptim_sample set - set the lptim prescaler, lptim_sample set [0 - 7]\n");
+ }
+
+ return RT_EOK;
+}
+MSH_CMD_EXPORT(lptim_sample, low power timer sample);
+
+#endif
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_wwdg.c b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_wwdg.c
new file mode 100644
index 0000000000000000000000000000000000000000..58c5c3f3032823984e2feb5e7b43ec2452e14367
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_wwdg.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2020-06-18 thread-liu the first version
+ */
+
+#include
+
+#if defined(BSP_USING_WWDG)
+#include "drv_config.h"
+#include
+#include
+
+//#define DRV_DEBUG
+#define LOG_TAG "drv.wwg"
+#include
+
+#define LED5_PIN GET_PIN(A, 14)
+
+WWDG_HandleTypeDef hwwdg1;
+
+void WWDG1_IRQHandler(void)
+{
+ /* enter interrupt */
+ rt_interrupt_enter();
+
+ HAL_WWDG_IRQHandler(&hwwdg1);
+
+ /* leave interrupt */
+ rt_interrupt_leave();
+}
+
+void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg)
+{
+ static unsigned char led_value = 0x00;
+
+ led_value = !led_value;
+
+ if(hwwdg->Instance==WWDG1)
+ {
+ HAL_WWDG_Refresh(&hwwdg1);
+ rt_pin_write(LED5_PIN, led_value);
+ }
+}
+
+static void wwdg_init()
+{
+ rt_pin_mode(LED5_PIN, PIN_MODE_OUTPUT);
+
+ hwwdg1.Instance = WWDG1;
+ hwwdg1.Init.Prescaler = WWDG_PRESCALER_8;
+ hwwdg1.Init.Window = 0X5F;
+ hwwdg1.Init.Counter = 0x7F;
+ hwwdg1.Init.EWIMode = WWDG_EWI_ENABLE;
+
+ if (HAL_WWDG_Init(&hwwdg1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+static void wwdg_control(uint8_t pre_value)
+{
+ if(pre_value > 7)
+ {
+ pre_value = 7;
+ }
+ hwwdg1.Instance->CFR &= ~(7 << 11); /* clear WDGTB[2:0] */
+ hwwdg1.Instance->CFR |= pre_value << 11; /* set WDGTB[2:0] */
+}
+
+static int wwdg_sample(int argc, char *argv[])
+{
+ if (argc > 1)
+ {
+ if (!strcmp(argv[1], "run"))
+ {
+ wwdg_init();
+ }
+ else if (!strcmp(argv[1], "set"))
+ {
+ if (argc > 2)
+ {
+ wwdg_control(atoi(argv[2]));
+ }
+ }
+ }
+ else
+ {
+ rt_kprintf("Usage:\n");
+ rt_kprintf("wwdg_sample run - open wwdg, when feed wwdg in wwdg irq, the LD5 will blink\n");
+ rt_kprintf("wwdg_sample set - set the wwdg prescaler, wwdg_sample set [0 - 7]\n");
+ }
+
+ return RT_EOK;
+}
+MSH_CMD_EXPORT(wwdg_sample, window watch dog sample);
+
+#endif
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.c b/bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.c
new file mode 100644
index 0000000000000000000000000000000000000000..42a252e679e9b25a7a5251723d57bd266166a2f5
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.c
@@ -0,0 +1,1225 @@
+/**
+ ******************************************************************************
+ * @file stpmic.c
+ * @author MCD Application Team
+ * @brief This sample code provides hardware semaphore using HSEM for
+ * synchronization and mutual exclusion between heterogeneous processors
+ * and those not operating under a single, shared operating system.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+#include
+#include
+#include "drv_hard_i2c.h"
+
+/* Definition of PMIC <=> stm32mp1 Signals */
+#define PMIC_INTn_PIN GPIO_PIN_0
+#define PMIC_INTn_PORT GPIOA
+#define PMIC_INTn_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define PMIC_INTn_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+#define BSP_PMIC_PWRCTRL_PIN_Assert() HAL_GPIO_WritePin(PMIC_PWRCTRL_PORT, PMIC_PWRCTRL_PIN, GPIO_PIN_RESET);
+#define BSP_PMIC_PWRCTRL_PIN_Pull() HAL_GPIO_WritePin(PMIC_PWRCTRL_PORT, PMIC_PWRCTRL_PIN, GPIO_PIN_SET);
+
+/**
+ * @}
+ */
+
+ /** @defgroup STM32MP15XX_EVAL_STPMU_Private_Defines Private Defines
+ * @{
+ */
+/* Private typedef -----------------------------------------------------------*/
+typedef struct {
+ PMIC_RegulId_TypeDef id;
+ uint16_t *voltage_table;
+ uint8_t voltage_table_size;
+ uint8_t control_reg;
+ uint8_t low_power_reg;
+ uint8_t rank ;
+ uint8_t nvm_info ;
+} regul_struct;
+
+/* Private define ------------------------------------------------------------*/
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+/* Those define should reflect NVM_USER section
+ * For ES Eval Configuration this is specified as
+ * 0xF7,
+ 0x92,
+ 0xC0,
+ 0x02,
+ 0xFA,
+ 0x30,
+ 0x00,
+ 0x33,
+ * */
+#define NVM_SECTOR3_REGISTER_0 0xF7
+#define NVM_SECTOR3_REGISTER_1 0x92
+#define NVM_SECTOR3_REGISTER_2 0xC0
+#define NVM_SECTOR3_REGISTER_3 0x02
+#define NVM_SECTOR3_REGISTER_4 0xFA
+#define NVM_SECTOR3_REGISTER_5 0x30
+#define NVM_SECTOR3_REGISTER_6 0x00
+#define NVM_SECTOR3_REGISTER_7 0x33
+
+/* nvm_vinok_hyst: VINOK hysteresis voltage
+ 00: 200mV
+ 01: 300mV
+ 10: 400mV
+ 11: 500mV
+ *
+ * nvm_vinok: VINOK threshold voltage
+ 00: 3.1v
+ 01: 3.3v
+ 10: 3.5v
+ 11: 4.5v
+ Otp_ldo4_forced :
+ 0: LDO4 ranks following OTP_RANK_LDO4<1:0>
+ if VBUS_OTG or SWOUT is turn ON condition
+ 1: LDO4 follows normal ranking procedure
+
+ nvm_longkeypress:
+ 0: Turn OFF on long key press inactive
+ 1: Turn OFF on long key press active
+
+ nvm_autoturnon:
+ 0: PMIC doesnt start automatically on VIN rising
+ 1: PMIC starts automatically on VIN rising
+
+ nvm_cc_keepoff :
+ 0: short circuit does not turn OFF PMIC
+ 1: short circuit turn OFF PMIC and keep it OFF till CC_flag is reset
+
+ *
+ */
+#define OTP_VINOK_HYST ((NVM_SECTOR3_REGISTER_0 & 0xC0) >> 6) // nvm_vinok_hyst
+#define OTP_VINOK ((NVM_SECTOR3_REGISTER_0 & 0x30) >> 4) // nvm_vinok
+#define OTP_LDO4_FORCED ((NVM_SECTOR3_REGISTER_0 & 0x08) >> 3) // Otp_ldo4_forced
+#define OTP_LONGKEYPRESSED ((NVM_SECTOR3_REGISTER_0 & 0x04) >> 2) // nvm_longkeypress
+#define OTP_AUTOTURNON ((NVM_SECTOR3_REGISTER_0 & 0x02) >> 1) // nvm_autoturnon
+#define OTP_CC_KEEPOFF ((NVM_SECTOR3_REGISTER_0 & 0x01)) // nvm_cc_keepoff
+
+/*
+ * nvm_rank_buck4:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ nvm_rank_buck3:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ nvm_rank_buck2:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ nvm_rank_buck1:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ *
+ */
+#define OTP_RANK_BUCK4 ((NVM_SECTOR3_REGISTER_1 & 0xC0) >> 6) // nvm_rank_buck4
+#define OTP_RANK_BUCK3 ((NVM_SECTOR3_REGISTER_1 & 0x30) >> 4) // nvm_rank_buck3
+#define OTP_RANK_BUCK2 ((NVM_SECTOR3_REGISTER_1 & 0x0C) >> 2) // nvm_rank_buck2
+#define OTP_RANK_BUCK1 ((NVM_SECTOR3_REGISTER_1 & 0x03)) // nvm_rank_buck1
+
+
+/*
+ * nvm_rank_ldo4:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ nvm_rank_ldo3:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ nvm_rank_ldo2:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ nvm_rank_ldo1:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ *
+ */
+#define OTP_RANK_LDO4 ((NVM_SECTOR3_REGISTER_2 & 0xC0) >> 6) // nvm_rank_ldo4
+#define OTP_RANK_LDO3 ((NVM_SECTOR3_REGISTER_2 & 0x30) >> 4) // nvm_rank_ldo3
+#define OTP_RANK_LDO2 ((NVM_SECTOR3_REGISTER_2 & 0x0C) >> 2) // nvm_rank_ldo2
+#define OTP_RANK_LDO1 ((NVM_SECTOR3_REGISTER_2 & 0x03)) // nvm_rank_ldo1
+
+/*
+ * nvm_clamp_output_buck: Clamp output value to 1.3V max
+ 0: output_buck4<5:0> not clamped
+ 1: output_buck4<5:0> to b011100(1.3V)
+
+ nvm_bypass_mode_ldo3: LDO3 forced bypass mode
+ 0: LDO3 not in bypass mode
+ 1: LDO3 in bypass mode
+
+ nvm_rank_vrefddr:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+
+ nvm_rank_ldo6:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+
+nvm_rank_ldo5:
+ 00: rank0
+ 01: rank1
+ 10: rank2
+ 11: rank3
+ *
+ */
+#define OTP_CLAMP_OUTPUT_BUCK4 ((NVM_SECTOR3_REGISTER_3 & 0x80) >> 7) // nvm_clamp_output_buck4
+#define OTP_BYPASS_MODE_LDO3 ((NVM_SECTOR3_REGISTER_3 & 0x40) >> 6) // nvm_bypass_mode_ldo3
+#define OTP_RANK_VREFDDR ((NVM_SECTOR3_REGISTER_3 & 0x30) >> 4) // nvm_rank_vrefddr
+#define OTP_RANK_LDO6 ((NVM_SECTOR3_REGISTER_3 & 0x0C) >> 2) // nvm_rank_ldo6
+#define OTP_RANK_LDO5 ((NVM_SECTOR3_REGISTER_3 & 0x03)) // nvm_rank_ldo5
+
+/*
+ * nvm_output_buck4: Buck4 default output selection
+ 00: 1.15V
+ 01: 1.2V
+ 10: 1.8V
+ 11: 3.3V
+ nvm_output_buck3: Buck3 default output selection
+ 00: 1.2V
+ 01: 1.8V
+ 10: 3.0V
+ 11: 3.3V
+ nvm_output_buck2: Buck2 default output selection
+ 00: 1.1V
+ 01: 1.2V
+ 10: 1.35V
+ 11: 1.5V
+ nvm_output_buck1: Buck1 default output selection
+ 00: 1.1V
+ 01: 1.15V
+ 10: 1.2V
+ 11: 1.25V
+ *
+ */
+#define OTP_OUTPUT_BUCK4 ((NVM_SECTOR3_REGISTER_4 & 0xC0) >> 6) // nvm_output_buck4
+#define OTP_OUTPUT_BUCK3 ((NVM_SECTOR3_REGISTER_4 & 0x30) >> 4) // nvm_output_buck3
+#define OTP_OUTPUT_BUCK2 ((NVM_SECTOR3_REGISTER_4 & 0x0C) >> 2) // nvm_output_buck2
+#define OTP_OUTPUT_BUCK1 ((NVM_SECTOR3_REGISTER_4 & 0x03)) // nvm_output_buck1
+
+/*
+ * [7] OTP_SWOFF_BY_BOOST_OVP:
+ 0 -> SWOUT will not turnoff bu boost OVP
+ 1 -> SWOUT will be turnoff by BOOST OVP
+
+ [6] reserved
+
+ [5:4] nvm_output_ldo3: LDO3 default output selection
+ 00: 1.8V
+ 01: 2.5V
+ 10: 3.3V
+ 11: output_buck2<4:0>/2 (VTT termination for DDR3 x32, Analog divider implemented in Analog)
+
+ [3:2] nvm_output_ldo2: LDO2 default output selection
+ 00: 1.8V
+ 01: 2.5V
+ 10: 2.9V
+ 11: 3.3V
+
+ [1:0] nvm_output_ldo1: LDO1 default output selection
+ 00: 1.8V
+ 01: 2.5V
+ 10: 2.9V
+ 11: 3.3V
+
+ *
+ */
+#define OTP_SWOFF_BY_BOOST_OVP ((NVM_SECTOR3_REGISTER_5 & 0x80) >> 7) // OTP_SWOFF_BY_BOOST_OVP
+#define OTP_OUTPUT_LDO3 ((NVM_SECTOR3_REGISTER_5 & 0x30) >> 4) // nvm_output_ldo3
+#define OTP_OUTPUT_LDO2 ((NVM_SECTOR3_REGISTER_5 & 0x0C) >> 2) // nvm_output_ldo2
+#define OTP_OUTPUT_LDO1 ((NVM_SECTOR3_REGISTER_5 & 0x03)) // nvm_output_ldo1
+
+/*
+ * [7:4] reserved
+ *
+ [3:2] nvm_output_ldo6: LDO6 default output selection
+ 00: 1.0V
+ 01: 1.2V
+ 10: 1.8V
+ 11: 3.3V
+
+ [1:0] nvm_output_ldo5: LDO5 default output selection
+ 00: 1.8V
+ 01: 2.5V
+ 10: 2.9V
+ 11 : 3.3V
+ *
+ */
+
+#define OTP_OUTPUT_LDO6 ((NVM_SECTOR3_REGISTER_6 & 0x0C) >> 2) // nvm_output_ldo6
+#define OTP_OUTPUT_LDO5 ((NVM_SECTOR3_REGISTER_6 & 0x03)) // nvm_output_ldo5
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* I2C handler declaration */
+I2C_HandleTypeDef I2cHandle;
+extern I2C_HandleTypeDef hI2c4;
+
+uint16_t buck1_voltage_table[] = {
+ 600,
+ 625,
+ 650,
+ 675,
+ 700,
+ 725,
+ 750,
+ 775,
+ 800,
+ 825,
+ 850,
+ 875,
+ 900,
+ 925,
+ 950,
+ 975,
+ 1000,
+ 1025,
+ 1050,
+ 1075,
+ 1100,
+ 1125,
+ 1150,
+ 1175,
+ 1200,
+ 1225,
+ 1250,
+ 1275,
+ 1300,
+ 1325,
+ 1350,
+ 1350,// 31 1,35stm32mp15xx_eval_stpmu1.c
+};
+
+uint16_t buck2_voltage_table[] = {
+ 1000, // 1
+ 1000, //
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1050, // 1,05
+ 1050, // 1,05
+ 1100, // 1,1
+ 1100, // 1,1
+ 1150, // 1,15
+ 1150, // 1,15
+ 1200, // 1,2
+ 1200, // 1,2
+ 1250, // 1,25
+ 1250, // 1,25
+ 1300, // 1,3
+ 1300, // 1,3
+ 1350, // 1,35
+ 1350, // 1,35
+ 1400, // 1,4
+ 1400, // 1,4
+ 1450, // 1,45
+ 1450, // 1,45
+ 1500, // 1,5
+};
+
+uint16_t buck3_voltage_table[] = {
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1000, // 1
+ 1100, // 1,1
+ 1100, // 1,1
+ 1100, // 1,1
+ 1100, // 1,1
+ 1200, // 1,2
+ 1200, // 1,2
+ 1200, // 1,2
+ 1200, // 1,2
+ 1300, // 1,3
+ 1300, // 1,3
+ 1300, // 1,3
+ 1300, // 1,3
+ 1400, // 1,4
+ 1400, // 1,4
+ 1400, // 1,4
+ 1400, // 1,4
+ 1500, // 1,5
+ 1600, // 1,6
+ 1700, // 1,7
+ 1800, // 1,8
+ 1900, // 1,9
+ 2000, // 2
+ 2100, // 2,1
+ 2200, // 2,2
+ 2300, // 2,3
+ 2400, // 2,4
+ 2500, // 2,5
+ 2600, // 2,6
+ 2700, // 2,7
+ 2800, // 2,8
+ 2900, // 2,9
+ 3000, // 3
+ 3100, // 3,1
+ 3200, // 3,2
+ 3300, // 3,3
+ 3400, // 3,4
+};
+
+uint16_t buck4_voltage_table[] = {
+ 600,
+ 625,
+ 650,
+ 675,
+ 700,
+ 725,
+ 750,
+ 775,
+ 800,
+ 825,
+ 850,
+ 875,
+ 900,
+ 925,
+ 950,
+ 975,
+ 1000,
+ 1025,
+ 1050,
+ 1075,
+ 1100,
+ 1125,
+ 1150,
+ 1175,
+ 1200,
+ 1225,
+ 1250,
+ 1275,
+ 1300,
+ 1300,
+ 1350,
+ 1350,// 31 1,35
+ 1400,// 32 1,40
+ 1400,// 33 1,40
+ 1450,// 34 1,45
+ 1450,// 35 1,45
+ 1500,// 36 1,5
+ 1600,// 37 1,6
+ 1700,// 38 1,7
+ 1800,// 39 1,8
+ 1900,// 40 1,9
+ 2000,// 41 2,0
+ 2100,// 42 2,1
+ 2200,// 43 2,2
+ 2300,// 44 2,3
+ 2400,// 45 2,4
+ 2500,// 46 2,5
+ 2600,// 47 2,6
+ 2700,// 48 2,7
+ 2800,// 49 2,8
+ 2900,// 50 2,9
+ 3000,// 51 3,0
+ 3100,// 52 3,1
+ 3200,// 53 3,2
+ 3300,// 54 3,3
+ 3400,// 55 3,4
+ 3500,// 56 3,5
+ 3600,// 57 3,6
+ 3700,// 58 3,7
+ 3800,// 59 3,8
+ 3900,// 60 3,9
+};
+
+uint16_t ldo1_voltage_table[] = {
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1800, // 1,8
+ 1900, // 1,9
+ 2000, // 2
+ 2100, // 2,1
+ 2200, // 2,2
+ 2300, // 2,3
+ 2400, // 2,4
+ 2500, // 2,5
+ 2600, // 2,6
+ 2700, // 2,7
+ 2800, // 2,8
+ 2900, // 2,9
+ 3000, // 3
+ 3100, // 3,1
+ 3200, // 3,2
+ 3300, // 3,3
+};
+
+uint16_t ldo2_voltage_table[] = {
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1800, // 1,8
+ 1900, // 1,9
+ 2000, // 2
+ 2100, // 2,1
+ 2200, // 2,2
+ 2300, // 2,3
+ 2400, // 2,4
+ 2500, // 2,5
+ 2600, // 2,6
+ 2700, // 2,7
+ 2800, // 2,8
+ 2900, // 2,9
+ 3000, // 3
+ 3100, // 3,1
+ 3200, // 3,2
+ 3300, // 3,3
+};
+
+uint16_t ldo3_voltage_table[] = {
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1800, // 1,8
+ 1900, // 1,9
+ 2000, // 2
+ 2100, // 2,1
+ 2200, // 2,2
+ 2300, // 2,3
+ 2400, // 2,4
+ 2500, // 2,5
+ 2600, // 2,6
+ 2700, // 2,7
+ 2800, // 2,8
+ 2900, // 2,9
+ 3000, // 3
+ 3100, // 3,1
+ 3200, // 3,2
+ 3300, // 3,3
+ 3300, // 3,3
+ 3300, // 3,3
+ 3300, // 3,3
+ 3300, // 3,3
+ 3300, // 3,3
+ 3300, // 3,3
+ 0xFFFF, // VREFDDR
+};
+
+
+uint16_t ldo5_voltage_table[] = {
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1700, // 1,7
+ 1800, // 1,8
+ 1900, // 1,9
+ 2000, // 2
+ 2100, // 2,1
+ 2200, // 2,2
+ 2300, // 2,3
+ 2400, // 2,4
+ 2500, // 2,5
+ 2600, // 2,6
+ 2700, // 2,7
+ 2800, // 2,8
+ 2900, // 2,9
+ 3000, // 3
+ 3100, // 3,1
+ 3200, // 3,2
+ 3300, // 3,3
+ 3400, // 3,4
+ 3500, // 3,5
+ 3600, // 3,6
+ 3700, // 3,7
+ 3800, // 3,8
+ 3900, // 3,9
+};
+
+uint16_t ldo6_voltage_table[] = {
+ 900, // 0,9
+ 1000, // 1,0
+ 1100, // 1,1
+ 1200, // 1,2
+ 1300, // 1,3
+ 1400, // 1,4
+ 1500, // 1,5
+ 1600, // 1,6
+ 1700, // 1,7
+ 1800, // 1,8
+ 1900, // 1,9
+ 2000, // 2
+ 2100, // 2,1
+ 2200, // 2,2
+ 2300, // 2,3
+ 2400, // 2,4
+ 2500, // 2,5
+ 2600, // 2,6
+ 2700, // 2,7
+ 2800, // 2,8
+ 2900, // 2,9
+ 3000, // 3
+ 3100, // 3,1
+ 3200, // 3,2
+ 3300, // 3,3
+};
+
+
+uint16_t ldo4_voltage_table[] = {
+ 3300, // 3,3
+};
+
+uint16_t vref_ddr_voltage_table[] = {
+ 3300, // 3,3
+};
+
+/*
+ Table of Regulators in PMIC SoC
+*/
+
+
+
+regul_struct regulators_table[] = {
+ {
+ .id = STPMU1_BUCK1,
+ .voltage_table = buck1_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(buck1_voltage_table),
+ .control_reg = BUCK1_CONTROL_REG,
+ .low_power_reg = BUCK1_PWRCTRL_REG,
+ .rank = OTP_RANK_BUCK1,
+ },
+ {
+ .id = STPMU1_BUCK2,
+ .voltage_table = buck2_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(buck2_voltage_table),
+ .control_reg = BUCK2_CONTROL_REG,
+ .low_power_reg = BUCK2_PWRCTRL_REG,
+ .rank = OTP_RANK_BUCK2,
+ },
+ {
+ .id = STPMU1_BUCK3,
+ .voltage_table = buck3_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(buck3_voltage_table),
+ .control_reg = BUCK3_CONTROL_REG,
+ .low_power_reg = BUCK3_PWRCTRL_REG,
+ .rank = OTP_RANK_BUCK3,
+ },
+ {
+ .id = STPMU1_BUCK4,
+ .voltage_table = buck4_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(buck4_voltage_table),
+ .control_reg = BUCK4_CONTROL_REG,
+ .low_power_reg = BUCK4_PWRCTRL_REG,
+ .rank = OTP_RANK_BUCK4,
+ },
+ {
+ .id = STPMU1_LDO1,
+ .voltage_table = ldo1_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(ldo1_voltage_table),
+ .control_reg = LDO1_CONTROL_REG,
+ .low_power_reg = LDO1_PWRCTRL_REG,
+ .rank = OTP_RANK_LDO1,
+ },
+ {
+ .id = STPMU1_LDO2,
+ .voltage_table = ldo2_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(ldo2_voltage_table),
+ .control_reg = LDO2_CONTROL_REG,
+ .low_power_reg = LDO2_PWRCTRL_REG,
+ .rank = OTP_RANK_LDO2,
+ },
+
+ {
+ .id = STPMU1_LDO3,
+ .voltage_table = ldo3_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(ldo3_voltage_table),
+ .control_reg = LDO3_CONTROL_REG,
+ .low_power_reg = LDO3_PWRCTRL_REG,
+ .rank = OTP_RANK_LDO3,
+ },
+ {
+ .id = STPMU1_LDO4,
+ .voltage_table = ldo4_voltage_table,
+ .voltage_table_size = ARRAY_SIZE(ldo4_voltage_table),
+ .control_reg = LDO4_CONTROL_REG,
+ .low_power_reg = LDO4_PWRCTRL_REG,
+ .rank = OTP_RANK_LDO4,
+ },
+ {
+ .id = STPMU1_LDO5,
+ .voltage_table = ldo5_voltage_table ,
+ .voltage_table_size = ARRAY_SIZE(ldo5_voltage_table),
+ .control_reg = LDO5_CONTROL_REG,
+ .low_power_reg = LDO5_PWRCTRL_REG,
+ .rank = OTP_RANK_LDO5,
+ },
+ {
+ .id = STPMU1_LDO6,
+ .voltage_table = ldo6_voltage_table ,
+ .voltage_table_size = ARRAY_SIZE(ldo6_voltage_table),
+ .control_reg = LDO6_CONTROL_REG,
+ .low_power_reg = LDO6_PWRCTRL_REG,
+ .rank = OTP_RANK_LDO6,
+ },
+ {
+ .id = STPMU1_VREFDDR,
+ .voltage_table = vref_ddr_voltage_table ,
+ .voltage_table_size = ARRAY_SIZE(vref_ddr_voltage_table),
+ .control_reg = VREF_DDR_CONTROL_REG,
+ .low_power_reg = VREF_DDR_PWRCTRL_REG,
+ .rank = OTP_RANK_VREFDDR,
+ },
+};
+
+#define MAX_REGUL ARRAY_SIZE(regulators_table)
+
+
+/* Private function prototypes -----------------------------------------------*/
+void STPMU1_IrqHandler(void);
+void STPMU1_INTn_Callback(PMIC_IRQn IRQn);
+static void My_Error_Handler(void);
+static regul_struct *STPMU1_Get_Regulator_Data(PMIC_RegulId_TypeDef id);
+static uint8_t STPMU1_Voltage_Find_Index(PMIC_RegulId_TypeDef id, uint16_t milivolts);
+
+/* Private functions ---------------------------------------------------------*/
+
+static regul_struct *STPMU1_Get_Regulator_Data(PMIC_RegulId_TypeDef id)
+{
+ uint8_t i ;
+
+ for (i = 0 ; i < MAX_REGUL ; i++ )
+ {
+ if (id == regulators_table[i].id)
+ return ®ulators_table[i];
+ }
+ /* id not found */
+ My_Error_Handler();
+ return NULL;
+}
+
+static uint8_t STPMU1_Voltage_Find_Index(PMIC_RegulId_TypeDef id, uint16_t milivolts)
+{
+ regul_struct *regul = STPMU1_Get_Regulator_Data(id);
+ uint8_t i;
+ for ( i = 0 ; i < regul->voltage_table_size ; i++)
+ {
+ if ( regul->voltage_table[i] == milivolts ) {
+ //printf("idx:%d for %dmV\n\r", (int)i, (int)milivolts);
+ return i;
+ }
+ }
+ /* voltage not found */
+ My_Error_Handler();
+ return 0;
+}
+
+void STPMU1_Enable_Interrupt(PMIC_IRQn IRQn)
+{
+ uint8_t irq_reg , irq_reg_value ;
+
+ if (IRQn >= IRQ_NR)
+ return ;
+
+ /* IRQ register is IRQ Number divided by 8 */
+ irq_reg = IRQn >> 3 ;
+
+ /* value to be set in IRQ register corresponds to BIT(7-N) where N is the Interrupt id modulo 8 */
+ irq_reg_value = 1 << ( 7 - ( IRQn%8 ) );
+
+ /* Clear previous event stored in latch */
+ STPMU1_Register_Write(ITCLEARLATCH1_REG+irq_reg, irq_reg_value );
+
+ /* Clear relevant mask to enable interrupt */
+ STPMU1_Register_Write(ITCLEARMASK1_REG+irq_reg, irq_reg_value );
+
+}
+
+extern void STPMU1_Disable_Interrupt(PMIC_IRQn IRQn)
+{
+ uint8_t irq_reg , irq_reg_value ;
+
+ if (IRQn >= IRQ_NR)
+ return ;
+
+ /* IRQ register is IRQ Number divided by 8 */
+ irq_reg = IRQn >> 3 ;
+
+ /* value to be set in IRQ register corresponds to BIT(7-N) where N is the Interrupt id modulo 8 */
+ irq_reg_value = 1 << ( 7 - ( IRQn%8 ) );
+
+ /* Clear previous event stored in latch */
+ STPMU1_Register_Write(ITCLEARLATCH1_REG+irq_reg, irq_reg_value );
+
+ /* Set relevant mask to disable interrupt */
+ STPMU1_Register_Write(ITSETMASK1_REG+irq_reg, irq_reg_value );
+}
+
+
+void STPMU1_IrqHandler(void)
+{
+ uint8_t irq_reg,mask,latch_events,i;
+
+ for (irq_reg = 0 ; irq_reg < STM32_PMIC_NUM_IRQ_REGS ; irq_reg++)
+ {
+ /* Get latch events & active mask from register */
+ mask = STPMU1_Register_Read(ITMASK1_REG+irq_reg);
+ latch_events = STPMU1_Register_Read(ITLATCH1_REG+irq_reg) & ~mask ;
+
+ /* Go through all bits for each register */
+ for (i = 0 ; i < 8 ; i++ )
+ {
+ if ( latch_events & ( 1 << i ) )
+ {
+ /* Callback with parameter computes as "PMIC Interrupt" enum */
+ STPMU1_INTn_Callback( (PMIC_IRQn )(irq_reg*8 + (7-i)));
+ }
+ }
+ /* Clear events in appropriate register for the event with mask set */
+ STPMU1_Register_Write(ITCLEARLATCH1_REG+irq_reg, latch_events );
+ }
+}
+
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+static void My_Error_Handler(void)
+{
+ while(1)
+ {
+ HAL_Delay(500);
+ }
+}
+
+
+void STPMU1_Sw_Reset(void)
+{
+ /* Write 1 in bit 0 of MAIN_CONTROL Register */
+ STPMU1_Register_Update(MAIN_CONTROL_REG, SET , SOFTWARE_SWITCH_OFF_ENABLED );
+}
+
+void STPMU1_Regulator_Enable(PMIC_RegulId_TypeDef id)
+{
+ regul_struct *regul = STPMU1_Get_Regulator_Data(id);
+
+ STPMU1_Register_Update(regul->control_reg,BIT(0),BIT(0));
+}
+
+void STPMU1_Regulator_Disable(PMIC_RegulId_TypeDef id)
+{
+ regul_struct *regul = STPMU1_Get_Regulator_Data(id);
+
+ STPMU1_Register_Update(regul->control_reg,0,BIT(0));
+}
+
+uint8_t STPMU1_Is_Regulator_Enabled(PMIC_RegulId_TypeDef id)
+{
+ uint8_t val ;
+
+ regul_struct *regul = STPMU1_Get_Regulator_Data(id);
+
+ val = STPMU1_Register_Read(regul->control_reg);
+
+ return (val&0x1);
+}
+
+void STPMU1_Regulator_Voltage_Set(PMIC_RegulId_TypeDef id,uint16_t milivolts)
+{
+ uint8_t voltage_index = STPMU1_Voltage_Find_Index(id,milivolts);
+ regul_struct *regul = STPMU1_Get_Regulator_Data(id);
+ STPMU1_Register_Update(regul->control_reg, voltage_index<<2 , 0xFC );
+}
+
+/* register direct access */
+uint8_t STPMU1_Register_Read(uint8_t register_id)
+{
+ uint32_t status = RT_EOK;
+ uint8_t Value = 0;
+
+ status = BSP_I2C4_ReadReg(STPMU1_I2C_ADDRESS, (uint16_t)register_id, &Value, 1);
+
+ /* Check the communication status */
+ if(status != RT_EOK)
+ {
+ My_Error_Handler();
+ }
+ return Value;
+}
+
+void STPMU1_Register_Write(uint8_t register_id, uint8_t value)
+{
+ uint32_t status = RT_EOK;
+
+ status = BSP_I2C4_WriteReg(STPMU1_I2C_ADDRESS, (uint16_t)register_id, &value, 1);
+
+ /* Check the communication status */
+ if(status != RT_EOK)
+ {
+ My_Error_Handler();
+ }
+
+ /* verify register content */
+ if ((register_id!=WATCHDOG_CONTROL_REG) && (register_id<=0x40))
+ {
+ uint8_t readval = STPMU1_Register_Read(register_id);
+ if (readval != value)
+ {
+ My_Error_Handler();
+ }
+ }
+}
+
+void STPMU1_Register_Update(uint8_t register_id, uint8_t value, uint8_t mask)
+{
+ uint8_t initial_value ;
+
+ initial_value = STPMU1_Register_Read(register_id);
+
+ /* Clear bits to update */
+ initial_value &= ~mask;
+
+ /* Update appropriate bits*/
+ initial_value |= ( value & mask );
+
+ /* Send new value on I2C Bus */
+ STPMU1_Register_Write(register_id, initial_value);
+
+ return ;
+}
+
+/*
+ *
+ * PMIC init
+ * pmic provides power supply on this board
+ * it is configured to turn off some power supply in standby mode
+ *
+ */
+static uint32_t BSP_PMIC_MspInit(I2C_HandleTypeDef *hi2c)
+{
+ uint32_t status = RT_EOK;
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ /*##-1- Configure the I2C clock source, GPIO and Interrupt #*/
+ BSP_I2C4_Init();
+
+ /*##-2- Configure PMIC GPIOs Interface ########################################*/
+
+ /* INTn - Interrupt Line - Active Low (Falling Edge) */
+ PMIC_INTn_CLK_ENABLE();
+ GPIO_InitStruct.Pin = PMIC_INTn_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ GPIO_InitStruct.Alternate = 0 ;
+ HAL_GPIO_Init(PMIC_INTn_PORT, &GPIO_InitStruct);
+
+ /* Enable and set INTn EXTI Interrupt */
+#if defined(CORE_CA7)
+ IRQ_SetPriority(EXTI0_IRQn, 0);
+ IRQ_Enable(EXTI0_IRQn);
+#elif defined(CORE_CM4)
+ HAL_NVIC_SetPriority(EXTI0_IRQn, 0x03, 0x00);
+ HAL_NVIC_EnableIRQ(EXTI0_IRQn);
+#endif
+
+ return status;
+}
+
+static uint32_t BSP_PMIC_MspDeInit(I2C_HandleTypeDef *hi2c)
+{
+ uint32_t status = RT_EOK;
+ /*##-1- Reset I2C Clock / Disable peripherals and GPIO Clocks###############*/
+ status = BSP_I2C4_DeInit();
+
+ /*##-2- Disable PMIC clk ###########################################*/
+ PMIC_INTn_CLK_DISABLE();
+
+ /*##-3- Disable the NVIC for PMIC ##########################################*/
+#if defined(CORE_CA7)
+ IRQ_Disable(EXTI0_IRQn);
+#elif defined(CORE_CM4)
+ HAL_NVIC_DisableIRQ(EXTI0_IRQn);
+#endif
+ HAL_GPIO_DeInit(PMIC_INTn_PORT,PMIC_INTn_PIN);
+
+ return status;
+}
+
+uint32_t BSP_PMIC_Is_Device_Ready(void)
+{
+ int32_t status = RT_EOK;
+
+ /* Write the TxBuffer1 at @0, then read @0 when device ready */
+ if (BSP_I2C4_IsReady(STPMU1_I2C_ADDRESS, 1) != RT_EOK)
+ {
+ status = -RT_EBUSY;
+ }
+ return status ;
+}
+
+/* Use Xls I2C COnfiguration Tools with I2C Clock config + output clocks requirement */
+#define I2C_TIMING 0x10805E89
+
+uint32_t BSP_PMIC_Init(void)
+{
+ int32_t status = RT_EOK;
+ PMIC_IRQn irq;
+
+ /*##-1- Configure the I2C peripheral ######################################*/
+ BSP_PMIC_MspInit(&hI2c4);
+
+ status = BSP_PMIC_Is_Device_Ready();
+ if (status != RT_EOK )
+ {
+ return status;
+ }
+
+ if (STPMU1_Register_Read(VERSION_STATUS_REG) != 0x00)
+ {
+ status = -RT_EIO;
+ return status;
+ }
+
+ STPMU1_Enable_Interrupt(IT_PONKEY_R);
+ STPMU1_Enable_Interrupt(IT_PONKEY_F);
+ /* enable all irqs */
+ for (irq = IT_SWOUT_R; irq < IRQ_NR; irq++)
+ {
+ STPMU1_Enable_Interrupt(irq);
+ }
+
+ return RT_EOK;
+}
+
+uint32_t BSP_PMIC_DeInit(void)
+{
+ uint32_t status = RT_EOK;
+ if(HAL_I2C_GetState(&hI2c4) != HAL_I2C_STATE_RESET)
+ {
+ /* Deinit the I2C */
+ BSP_PMIC_MspDeInit(&hI2c4);
+ }
+ return status;
+}
+
+/*
+ *
+ * following are configurations for this board
+ * same configuration than linux
+ *
+ * BSP_PMIC_InitRegulators set the regulators for boot
+ * BSP_PMIC_PrepareLpStop set the low power registers for LPSTOP mode
+ * should be called by user before entering is CSTOP
+ * BSP_PMIC_PrepareLpStop set the low power registers for STANDBY mode
+ * should be called by user before entering is STANDBY
+ *
+ *
+ */
+/* following are configurations */
+uint32_t BSP_PMIC_InitRegulators(void)
+{
+ uint32_t status = RT_EOK;
+
+ STPMU1_Register_Write(MAIN_CONTROL_REG, 0x04);
+ STPMU1_Register_Write(VIN_CONTROL_REG, 0xc0);
+ STPMU1_Register_Write(USB_CONTROL_REG, 0x30);
+
+ STPMU1_Register_Write(MASK_RESET_BUCK_REG, 0x04);
+ STPMU1_Register_Write(MASK_RESET_LDO_REG, 0x00);
+ STPMU1_Register_Write(MASK_RANK_BUCK_REG, 0x00);
+ STPMU1_Register_Write(MASK_RANK_LDO_REG, 0x00);
+ STPMU1_Register_Write(BUCK_PULL_DOWN_REG, 0x00);
+ STPMU1_Register_Write(LDO14_PULL_DOWN_REG, 0x00);
+ STPMU1_Register_Write(LDO56_PULL_DOWN_REG, 0x00);
+ STPMU1_Register_Write(BUCK_ICC_TURNOFF_REG, 0x30);
+ STPMU1_Register_Write(LDO_ICC_TURNOFF_REG, 0x3b);
+
+ /* vddcore */
+ STPMU1_Regulator_Voltage_Set(STPMU1_BUCK1, 1200);
+ STPMU1_Regulator_Enable(STPMU1_BUCK1);
+
+ /* vddddr */
+ STPMU1_Regulator_Voltage_Set(STPMU1_BUCK2, 1350);
+ STPMU1_Regulator_Enable(STPMU1_BUCK2);
+
+ /* vdd */
+ STPMU1_Regulator_Voltage_Set(STPMU1_BUCK3, 3300);
+ STPMU1_Regulator_Enable(STPMU1_BUCK3);
+
+ /* 3v3 */
+ STPMU1_Regulator_Voltage_Set(STPMU1_BUCK4, 3300);
+ STPMU1_Regulator_Enable(STPMU1_BUCK4);
+
+ /* vdda */
+ STPMU1_Regulator_Voltage_Set(STPMU1_LDO1, 2900);
+ STPMU1_Regulator_Enable(STPMU1_LDO1);
+
+ /* 2v8 */
+ STPMU1_Regulator_Voltage_Set(STPMU1_LDO2, 2800);
+ STPMU1_Regulator_Enable(STPMU1_LDO2);
+
+ /* vtt_ddr lod3 mode buck2/2 */
+ STPMU1_Regulator_Voltage_Set(STPMU1_LDO3, 0xFFFF);
+ STPMU1_Regulator_Enable(STPMU1_LDO3);
+
+ /* vdd_usb */
+ STPMU1_Regulator_Voltage_Set(STPMU1_LDO4, 3300);
+ STPMU1_Regulator_Enable(STPMU1_LDO4);
+
+ /* vdd_sd */
+ STPMU1_Regulator_Voltage_Set(STPMU1_LDO5, 2900);
+ STPMU1_Regulator_Enable(STPMU1_LDO5);
+
+ /* 1v8 */
+ STPMU1_Regulator_Voltage_Set(STPMU1_LDO6, 1800);
+ STPMU1_Regulator_Enable(STPMU1_LDO6);
+
+ STPMU1_Regulator_Enable(STPMU1_VREFDDR);
+
+ return status;
+}
+
+uint32_t BSP_PMIC_SwitchOff(void)
+{
+ uint32_t status = RT_EOK;
+
+ STPMU1_Register_Write(MAIN_CONTROL_REG, 0x01);
+ return status;
+}
+
+__weak void BSP_PMIC_INTn_Callback(PMIC_IRQn IRQn)
+{
+ switch (IRQn)
+ {
+ case IT_PONKEY_F:
+ rt_kprintf("IT_PONKEY_F");
+ break;
+
+ case IT_PONKEY_R:
+ rt_kprintf("IT_PONKEY_R");
+ break;
+
+ case IT_WAKEUP_F:
+ rt_kprintf("IT_WAKEUP_F");
+ break;
+
+ case IT_WAKEUP_R:
+ rt_kprintf("IT_WAKEUP_R");
+ break;
+
+ case IT_VBUS_OTG_F:
+ rt_kprintf("IT_VBUS_OTG_F");
+ break;
+
+ case IT_SWOUT_F:
+ rt_kprintf("IT_SWOUT_F");
+ break;
+
+ case IT_TWARN_R:
+ rt_kprintf("IT_TWARN_R");
+ break;
+
+ case IT_TWARN_F:
+ rt_kprintf("IT_TWARN_F");
+ break;
+
+ default:
+ rt_kprintf("%d",IRQn);
+ break;
+ }
+ rt_kprintf(" Interrupt received\n\r");
+}
+
+void STPMU1_INTn_Callback(PMIC_IRQn IRQn)
+{
+ BSP_PMIC_INTn_Callback(IRQn);
+}
+
+void BSP_PMIC_INTn_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(PMIC_INTn_PIN);
+
+ STPMU1_IrqHandler();
+}
+
+void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hI2c4)
+{
+ while(1);
+}
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.h b/bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.h
new file mode 100644
index 0000000000000000000000000000000000000000..4b5e47b892e70fddd92476e75aa0999b27759813
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.h
@@ -0,0 +1,315 @@
+/**
+ ******************************************************************************
+ * @file stm32mp15xx__stpmic1.h
+ * @author MCD Application Team
+ * @brief stpmu driver functions used for ST internal validation
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ 3
+
+ rt-thread
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 31
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+ $TOOLKIT_DIR$\CONFIG\debugger\ST\STM32MP157A_M4.ddf
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ entry
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 0
+
+
+ OCProductVersion
+ 8.11.3.13977
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.40.1.21529
+
+
+ UseFlashLoader
+ 0
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+ $TOOLKIT_DIR$\config\flashloader\
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+ OCImagesOffset2
+
+
+ OCImagesOffset3
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreWorkspace
+
+
+ OCMulticoreSlaveProject
+
+
+ OCMulticoreSlaveConfiguration
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+ OCMulticoreNrOfCoresSlave
+ 1
+
+
+ OCMulticoreAMPConfigType
+ 0
+
+
+ OCMulticoreSessionFile
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchSFERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchSFERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 1
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchSFERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+ CCCpuClockEdit
+ 168.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ NULINK_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 1
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 2
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+ CCSTLinkUseServerSelect
+ 0
+
+
+ CCSTLinkProbeList
+ 0
+ 1
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+ BoardFile
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 2
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 2
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+ CCXDSTargetVccEnable
+ 0
+
+
+ CCXDSTargetVoltage
+ ###Uninitialized###
+
+
+ OCXDSDigitalStatesConfigFile
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ C-SPY
+ 2
+
+ 31
+ 1
+ 0
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 0
+
+
+ OCProductVersion
+ 8.11.3.13977
+
+
+ OCDynDriverList
+ ARMSIM_ID
+
+
+ OCLastSavedByProductVersion
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+ OCImagesOffset2
+
+
+ OCImagesOffset3
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+
+
+ OCMulticoreWorkspace
+
+
+ OCMulticoreSlaveProject
+
+
+ OCMulticoreSlaveConfiguration
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+ OCMulticoreNrOfCoresSlave
+ 1
+
+
+ OCMulticoreAMPConfigType
+ 0
+
+
+ OCMulticoreSessionFile
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 0
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 0
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchSFERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchSFERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 0
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 5
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchSFERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+ CCCpuClockEdit
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ NULINK_ID
+ 2
+
+ 0
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 6
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 0
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 0
+
+
+ CCCpuClockEdit
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 2
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+ CCSTLinkUseServerSelect
+ 0
+
+
+ CCSTLinkProbeList
+ 0
+ 1
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 0
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 8
+ 1
+ 0
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+ BoardFile
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 2
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 2
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+ CCXDSTargetVccEnable
+ 0
+
+
+ CCXDSTargetVoltage
+ ###Uninitialized###
+
+
+ OCXDSDigitalStatesConfigFile
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/project.ewp b/bsp/stm32/stm32mp157a-st-ev1/project.ewp
new file mode 100644
index 0000000000000000000000000000000000000000..d84c668843b8d45f46e300d2868ae7ecbba06dbf
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/project.ewp
@@ -0,0 +1,2563 @@
+
+
+ 3
+
+ rt-thread
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 31
+ 1
+ 1
+
+ ExePath
+ build\iar\Exe
+
+
+ ObjPath
+ build\iar\Obj
+
+
+ ListPath
+ build\iar\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ Automatic choice of formatter, without multibyte support.
+
+
+ Output description
+ Automatic choice of formatter, without multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.40.1.21529
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32MP157A_M4 ST STM32MP157A_M4
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\inc\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 27
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 27
+ 39
+
+
+ GFPUDeviceSlave
+ STM32MP157A_M4 ST STM32MP157A_M4
+
+
+ FPU2
+ 0
+ 4
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 27
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+ GenLocaleDisplayOnly
+
+
+ DSPExtension
+ 1
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 35
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ RT_USING_DLIBC
+ _DLIB_FILE_DESCRIPTOR
+ CORE_CM4
+ NO_ATOMIC_64_SUPPORT
+ METAL_INTERNAL
+ METAL_MAX_DEVICE_REGIONS=2
+ VIRTIO_SLAVE_ONLY
+ STM32MP157Axx
+ __LOG_TRACE_IO_
+ USE_HAL_DRIVER
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+ Pa050
+
+
+ CCDiagRemark
+
+
+ CCDiagWarning
+
+
+ CCDiagError
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 00000000
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\devfs
+ $PROJ_DIR$\..\..\..\components\finsh
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Core\Include
+ $PROJ_DIR$\..\..\..\components\drivers\include
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib
+ $PROJ_DIR$\board\ports\audio
+ $PROJ_DIR$\..\..\..\components\libc\compilers\common
+ $PROJ_DIR$\.
+ $PROJ_DIR$\board\CubeMX_Config\CM4\Inc
+ $PROJ_DIR$\..\..\..\components\dfs\include
+ $PROJ_DIR$\..\libraries\HAL_Drivers\config
+ $PROJ_DIR$\board
+ $PROJ_DIR$\..\libraries\HAL_Drivers
+ $PROJ_DIR$\board\ports
+ $PROJ_DIR$\applications
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Include
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat
+ $PROJ_DIR$\..\..\..\include
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Include
+ $PROJ_DIR$\board\ports\pmic
+ $PROJ_DIR$\..\..\..\libcpu\arm\common
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Inc
+ $PROJ_DIR$\..\..\..\components\drivers\audio
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 1
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+ OICompilerExtraOption
+ 1
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+ AWarnRange1
+
+
+ AWarnRange2
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 3
+
+
+ OCOutputOverride
+ 0
+
+
+ OOCOutputFile
+ project.bin
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+ BUILDACTION
+ 1
+
+
+
+
+ ILINK
+ 0
+
+ 23
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ RT-Thread-STM32MP1_CM4.elf
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+ IlinkRawBinaryFile
+
+
+ IlinkRawBinarySymbol
+
+
+ IlinkRawBinarySegment
+
+
+ IlinkRawBinaryAlign
+
+
+ IlinkDefines
+
+
+ IlinkConfigDefines
+
+
+ IlinkMapFile
+ 0
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$\board\linker_scripts\link.icf
+
+
+ IlinkIcfFileSlave
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+ IlinkTreatAsRem
+
+
+ IlinkTreatAsWarn
+
+
+ IlinkTreatAsErr
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+ IlinkStackCallGraphFile
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ template_import_lib.o
+
+
+ OILinkExtraOption
+ 1
+
+
+ IlinkRawBinaryFile2
+
+
+ IlinkRawBinarySymbol2
+
+
+ IlinkRawBinarySegment2
+
+
+ IlinkRawBinaryAlign2
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 31
+ 1
+ 0
+
+ ExePath
+ Release\Exe
+
+
+ ObjPath
+ Release\Obj
+
+
+ ListPath
+ Release\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+
+
+ Output description
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 0
+
+
+ GRuntimeLibSelect
+ 0
+ 1
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 1
+
+
+ RTDescription
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.11.3.13977
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ Default None
+
+
+ GenLowLevelInterface
+ 0
+
+
+ GEndianModeBE
+ 0
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+
+
+ GBECoreSlave
+ 27
+ 1
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 27
+ 0
+
+
+ GFPUDeviceSlave
+ Default None
+
+
+ FPU2
+ 0
+ 0
+
+
+ NrRegs
+ 0
+ 0
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 27
+ 0
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+ GenLocaleDisplayOnly
+
+
+ DSPExtension
+ 0
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 35
+ 1
+ 0
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ RT_USING_DLIBC
+ _DLIB_FILE_DESCRIPTOR
+ CORE_CM4
+ NO_ATOMIC_64_SUPPORT
+ METAL_INTERNAL
+ METAL_MAX_DEVICE_REGIONS=2
+ VIRTIO_SLAVE_ONLY
+ STM32MP157Axx
+ __LOG_TRACE_IO_
+ USE_HAL_DRIVER
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+ CCDiagRemark
+
+
+ CCDiagWarning
+
+
+ CCDiagError
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 0
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\devfs
+ $PROJ_DIR$\..\..\..\components\finsh
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Core\Include
+ $PROJ_DIR$\..\..\..\components\drivers\include
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib
+ $PROJ_DIR$\board\ports\audio
+ $PROJ_DIR$\..\..\..\components\libc\compilers\common
+ $PROJ_DIR$\.
+ $PROJ_DIR$\board\CubeMX_Config\CM4\Inc
+ $PROJ_DIR$\..\..\..\components\dfs\include
+ $PROJ_DIR$\..\libraries\HAL_Drivers\config
+ $PROJ_DIR$\board
+ $PROJ_DIR$\..\libraries\HAL_Drivers
+ $PROJ_DIR$\board\ports
+ $PROJ_DIR$\applications
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Include
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat
+ $PROJ_DIR$\..\..\..\include
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Include
+ $PROJ_DIR$\board\ports\pmic
+ $PROJ_DIR$\..\..\..\libcpu\arm\common
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Inc
+ $PROJ_DIR$\..\..\..\components\drivers\audio
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+ OICompilerExtraOption
+ 1
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 0
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+ AWarnRange1
+
+
+ AWarnRange2
+
+
+ ADebug
+ 0
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+ OOCOutputFormat
+ 3
+ 0
+
+
+ OCOutputOverride
+ 0
+
+
+ OOCOutputFile
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 0
+
+
+
+
+ CUSTOM
+ 3
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+ BUILDACTION
+ 1
+
+
+
+
+ ILINK
+ 0
+
+ 23
+ 1
+ 0
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ###Unitialized###
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+ IlinkRawBinaryFile
+
+
+ IlinkRawBinarySymbol
+
+
+ IlinkRawBinarySegment
+
+
+ IlinkRawBinaryAlign
+
+
+ IlinkDefines
+
+
+ IlinkConfigDefines
+
+
+ IlinkMapFile
+ 0
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 0
+
+
+ IlinkIcfFile
+ lnk0t.icf
+
+
+ IlinkIcfFileSlave
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+ IlinkTreatAsRem
+
+
+ IlinkTreatAsWarn
+
+
+ IlinkTreatAsErr
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 1
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+ IlinkStackCallGraphFile
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ ###Unitialized###
+
+
+ OILinkExtraOption
+ 1
+
+
+ IlinkRawBinaryFile2
+
+
+ IlinkRawBinarySymbol2
+
+
+ IlinkRawBinarySegment2
+
+
+ IlinkRawBinaryAlign2
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+ IarchiveInputs
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+ Applications
+
+ $PROJ_DIR$\applications\main.c
+
+
+
+ cpu
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\context_iar.S
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c
+
+
+
+ DeviceDrivers
+
+ $PROJ_DIR$\..\..\..\components\drivers\audio\audio.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\audio\audio_pipe.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\completion.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c-bit-ops.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_core.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_dev.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\pipe.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c
+
+
+
+ dlib
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\libc.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\rmtx.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\stdio.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c
+
+
+
+ Drivers
+
+ $PROJ_DIR$\board\board.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c
+
+
+ $PROJ_DIR$\board\ports\dfsdm\drv_dfsdm.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c
+
+
+ $PROJ_DIR$\board\ports\pmic\drv_hard_i2c.c
+
+
+ $PROJ_DIR$\board\ports\audio\drv_sai.c
+
+
+ $PROJ_DIR$\board\ports\sdmmc\drv_sdmmc.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_soft_i2c.c
+
+
+ $PROJ_DIR$\board\ports\audio\drv_sound.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c
+
+
+ $PROJ_DIR$\board\ports\audio\drv_wm8994.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Source\Templates\iar\startup_stm32mp15xx.s
+
+
+ $PROJ_DIR$\board\CubeMX_Config\CM4\Src\stm32mp1xx_hal_msp.c
+
+
+ $PROJ_DIR$\board\ports\pmic\stpmic.c
+
+
+ $PROJ_DIR$\board\CubeMX_Config\Common\System\system_stm32mp1xx.c
+
+
+
+ Filesystem
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\option\ccsbcs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\devfs\devfs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\dfs_elm.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs_file.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs_fs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs_posix.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\ff.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\poll.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\select.c
+
+
+
+ finsh
+
+ $PROJ_DIR$\..\..\..\components\finsh\cmd.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_compiler.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_error.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_heap.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_init.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_node.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_ops.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_parser.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_token.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_var.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_vm.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\msh.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\msh_file.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\shell.c
+
+
+
+ Kernel
+
+ $PROJ_DIR$\..\..\..\src\clock.c
+
+
+ $PROJ_DIR$\..\..\..\src\components.c
+
+
+ $PROJ_DIR$\..\..\..\src\device.c
+
+
+ $PROJ_DIR$\..\..\..\src\idle.c
+
+
+ $PROJ_DIR$\..\..\..\src\ipc.c
+
+
+ $PROJ_DIR$\..\..\..\src\irq.c
+
+
+ $PROJ_DIR$\..\..\..\src\kservice.c
+
+
+ $PROJ_DIR$\..\..\..\src\memheap.c
+
+
+ $PROJ_DIR$\..\..\..\src\mempool.c
+
+
+ $PROJ_DIR$\..\..\..\src\object.c
+
+
+ $PROJ_DIR$\..\..\..\src\scheduler.c
+
+
+ $PROJ_DIR$\..\..\..\src\signal.c
+
+
+ $PROJ_DIR$\..\..\..\src\thread.c
+
+
+ $PROJ_DIR$\..\..\..\src\timer.c
+
+
+
+ libc
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c
+
+
+
+ STM32_HAL
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cortex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_crc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_crc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cryp.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cryp_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dfsdm.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dfsdm_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_exti.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_gpio.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_hsem.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_ipcc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_mdma.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rng.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sai.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sai_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sd.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_spi.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_ll_delayblock.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_ll_sdmmc.c
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/project.ewt b/bsp/stm32/stm32mp157a-st-ev1/project.ewt
new file mode 100644
index 0000000000000000000000000000000000000000..406b4bb345de511c57db0b1607787d4381e1ac2d
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/project.ewt
@@ -0,0 +1,2765 @@
+
+
+ 3
+
+ rt-thread
+
+ ARM
+
+ 1
+
+ C-STAT
+ 261
+
+ 261
+
+ 0
+ 1
+ 600
+ 1
+ 4
+ 0
+ 1
+ 100
+
+
+ 1.5.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ RuntimeChecking
+ 0
+
+ 2
+ 1
+ 1
+
+ GenRtcDebugHeap
+ 0
+
+
+ GenRtcEnableBoundsChecking
+ 0
+
+
+ GenRtcCheckPtrsNonInstrMem
+ 1
+
+
+ GenRtcTrackPointerBounds
+ 1
+
+
+ GenRtcCheckAccesses
+ 1
+
+
+ GenRtcGenerateEntries
+ 0
+
+
+ GenRtcNrTrackedPointers
+ 1000
+
+
+ GenRtcIntOverflow
+ 0
+
+
+ GenRtcIncUnsigned
+ 0
+
+
+ GenRtcIntConversion
+ 0
+
+
+ GenRtcInclExplicit
+ 0
+
+
+ GenRtcIntShiftOverflow
+ 0
+
+
+ GenRtcInclUnsignedShiftOverflow
+ 0
+
+
+ GenRtcUnhandledCase
+ 0
+
+
+ GenRtcDivByZero
+ 0
+
+
+ GenRtcEnable
+ 0
+
+
+ GenRtcCheckPtrsNonInstrFunc
+ 1
+
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ C-STAT
+ 261
+
+ 261
+
+ 0
+ 1
+ 600
+ 1
+ 4
+ 0
+ 1
+ 100
+
+
+ 1.5.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ RuntimeChecking
+ 0
+
+ 2
+ 1
+ 0
+
+ GenRtcDebugHeap
+ 0
+
+
+ GenRtcEnableBoundsChecking
+ 0
+
+
+ GenRtcCheckPtrsNonInstrMem
+ 1
+
+
+ GenRtcTrackPointerBounds
+ 1
+
+
+ GenRtcCheckAccesses
+ 1
+
+
+ GenRtcGenerateEntries
+ 0
+
+
+ GenRtcNrTrackedPointers
+ 1000
+
+
+ GenRtcIntOverflow
+ 0
+
+
+ GenRtcIncUnsigned
+ 0
+
+
+ GenRtcIntConversion
+ 0
+
+
+ GenRtcInclExplicit
+ 0
+
+
+ GenRtcIntShiftOverflow
+ 0
+
+
+ GenRtcInclUnsignedShiftOverflow
+ 0
+
+
+ GenRtcUnhandledCase
+ 0
+
+
+ GenRtcDivByZero
+ 0
+
+
+ GenRtcEnable
+ 0
+
+
+ GenRtcCheckPtrsNonInstrFunc
+ 1
+
+
+
+
+
+ Applications
+
+ $PROJ_DIR$\applications\main.c
+
+
+
+ cpu
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\context_iar.S
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c
+
+
+
+ DeviceDrivers
+
+ $PROJ_DIR$\..\..\..\components\drivers\audio\audio.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\audio\audio_pipe.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\completion.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c-bit-ops.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_core.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_dev.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\pipe.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c
+
+
+
+ dlib
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\libc.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\rmtx.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\stdio.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c
+
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c
+
+
+
+ Drivers
+
+ $PROJ_DIR$\board\board.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c
+
+
+ $PROJ_DIR$\board\ports\dfsdm\drv_dfsdm.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c
+
+
+ $PROJ_DIR$\board\ports\pmic\drv_hard_i2c.c
+
+
+ $PROJ_DIR$\board\ports\audio\drv_sai.c
+
+
+ $PROJ_DIR$\board\ports\sdmmc\drv_sdmmc.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_soft_i2c.c
+
+
+ $PROJ_DIR$\board\ports\audio\drv_sound.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c
+
+
+ $PROJ_DIR$\board\ports\audio\drv_wm8994.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Source\Templates\iar\startup_stm32mp15xx.s
+
+
+ $PROJ_DIR$\board\CubeMX_Config\CM4\Src\stm32mp1xx_hal_msp.c
+
+
+ $PROJ_DIR$\board\ports\pmic\stpmic.c
+
+
+ $PROJ_DIR$\board\CubeMX_Config\Common\System\system_stm32mp1xx.c
+
+
+
+ Filesystem
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\option\ccsbcs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\devfs\devfs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\dfs_elm.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs_file.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs_fs.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\dfs_posix.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\ff.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\poll.c
+
+
+ $PROJ_DIR$\..\..\..\components\dfs\src\select.c
+
+
+
+ finsh
+
+ $PROJ_DIR$\..\..\..\components\finsh\cmd.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_compiler.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_error.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_heap.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_init.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_node.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_ops.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_parser.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_token.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_var.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\finsh_vm.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\msh.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\msh_file.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\shell.c
+
+
+
+ Kernel
+
+ $PROJ_DIR$\..\..\..\src\clock.c
+
+
+ $PROJ_DIR$\..\..\..\src\components.c
+
+
+ $PROJ_DIR$\..\..\..\src\device.c
+
+
+ $PROJ_DIR$\..\..\..\src\idle.c
+
+
+ $PROJ_DIR$\..\..\..\src\ipc.c
+
+
+ $PROJ_DIR$\..\..\..\src\irq.c
+
+
+ $PROJ_DIR$\..\..\..\src\kservice.c
+
+
+ $PROJ_DIR$\..\..\..\src\memheap.c
+
+
+ $PROJ_DIR$\..\..\..\src\mempool.c
+
+
+ $PROJ_DIR$\..\..\..\src\object.c
+
+
+ $PROJ_DIR$\..\..\..\src\scheduler.c
+
+
+ $PROJ_DIR$\..\..\..\src\signal.c
+
+
+ $PROJ_DIR$\..\..\..\src\thread.c
+
+
+ $PROJ_DIR$\..\..\..\src\timer.c
+
+
+
+ libc
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c
+
+
+
+ STM32_HAL
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cortex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_crc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_crc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cryp.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cryp_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dfsdm.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dfsdm_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_exti.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_gpio.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_hsem.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_ipcc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_mdma.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rng.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sai.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sai_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sd.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_spi.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_ll_delayblock.c
+
+
+ $PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_ll_sdmmc.c
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/project.eww b/bsp/stm32/stm32mp157a-st-ev1/project.eww
new file mode 100644
index 0000000000000000000000000000000000000000..c2cb02eb1e89d73e24183274c1c886ddf74f9537
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/project.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\project.ewp
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/project.uvopt b/bsp/stm32/stm32mp157a-st-ev1/project.uvopt
new file mode 100644
index 0000000000000000000000000000000000000000..ed90c9e187e8063cc4d07cc09e28620f73aeac3f
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/project.uvopt
@@ -0,0 +1,167 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+
+
+
+ 0
+ 0
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+
+ 25000000
+
+ 1
+ 1
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\build\keil\List\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 0
+ 0
+ 1
+
+ 255
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 11
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U -O207 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000
+
+
+ 0
+ JL2CM3
+ -U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000
+
+
+ 0
+ UL2CM3
+ UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)
+
+
+
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/project.uvoptx b/bsp/stm32/stm32mp157a-st-ev1/project.uvoptx
new file mode 100644
index 0000000000000000000000000000000000000000..97c770bb6f99bc1dd58b3ce8e9d156467efc5063
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/project.uvoptx
@@ -0,0 +1,1172 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+
+ 12000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\build\keil\List\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 ) -FC1000 -FD10020000
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U066BFF343339415043223048 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10050000 -FC1000 -FN0
+
+
+
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+ 0
+ 0
+ 0
+
+ 0
+ 0
+ 0
+ 2
+ 10000000
+
+
+
+
+
+ Applications
+ 1
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+ applications\main.c
+ main.c
+ 0
+ 0
+
+
+
+
+ cpu
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\common\backtrace.c
+ backtrace.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\common\div0.c
+ div0.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\common\showmem.c
+ showmem.c
+ 0
+ 0
+
+
+ 2
+ 5
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\cortex-m4\cpuport.c
+ cpuport.c
+ 0
+ 0
+
+
+ 2
+ 6
+ 2
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\cortex-m4\context_rvds.S
+ context_rvds.S
+ 0
+ 0
+
+
+
+
+ DeviceDrivers
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 7
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\misc\pin.c
+ pin.c
+ 0
+ 0
+
+
+ 3
+ 8
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\serial\serial.c
+ serial.c
+ 0
+ 0
+
+
+ 3
+ 9
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\completion.c
+ completion.c
+ 0
+ 0
+
+
+ 3
+ 10
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\dataqueue.c
+ dataqueue.c
+ 0
+ 0
+
+
+ 3
+ 11
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\pipe.c
+ pipe.c
+ 0
+ 0
+
+
+ 3
+ 12
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\ringblk_buf.c
+ ringblk_buf.c
+ 0
+ 0
+
+
+ 3
+ 13
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\ringbuffer.c
+ ringbuffer.c
+ 0
+ 0
+
+
+ 3
+ 14
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\waitqueue.c
+ waitqueue.c
+ 0
+ 0
+
+
+ 3
+ 15
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\workqueue.c
+ workqueue.c
+ 0
+ 0
+
+
+
+
+ Drivers
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 16
+ 1
+ 0
+ 0
+ 0
+ board\board.c
+ board.c
+ 0
+ 0
+
+
+ 4
+ 17
+ 1
+ 0
+ 0
+ 0
+ board\CubeMX_Config\Common\System\system_stm32mp1xx.c
+ system_stm32mp1xx.c
+ 0
+ 0
+
+
+ 4
+ 18
+ 1
+ 0
+ 0
+ 0
+ board\CubeMX_Config\CM4\Src\stm32mp1xx_hal_msp.c
+ stm32mp1xx_hal_msp.c
+ 0
+ 0
+
+
+ 4
+ 19
+ 2
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Source\Templates\arm\startup_stm32mp15xx.s
+ startup_stm32mp15xx.s
+ 0
+ 0
+
+
+ 4
+ 20
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\HAL_Drivers\drv_gpio.c
+ drv_gpio.c
+ 0
+ 0
+
+
+ 4
+ 21
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\HAL_Drivers\drv_usart.c
+ drv_usart.c
+ 0
+ 0
+
+
+ 4
+ 22
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\HAL_Drivers\drv_common.c
+ drv_common.c
+ 0
+ 0
+
+
+
+
+ finsh
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 23
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\shell.c
+ shell.c
+ 0
+ 0
+
+
+ 5
+ 24
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\cmd.c
+ cmd.c
+ 0
+ 0
+
+
+ 5
+ 25
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\msh.c
+ msh.c
+ 0
+ 0
+
+
+ 5
+ 26
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_compiler.c
+ finsh_compiler.c
+ 0
+ 0
+
+
+ 5
+ 27
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_error.c
+ finsh_error.c
+ 0
+ 0
+
+
+ 5
+ 28
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_heap.c
+ finsh_heap.c
+ 0
+ 0
+
+
+ 5
+ 29
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_init.c
+ finsh_init.c
+ 0
+ 0
+
+
+ 5
+ 30
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_node.c
+ finsh_node.c
+ 0
+ 0
+
+
+ 5
+ 31
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_ops.c
+ finsh_ops.c
+ 0
+ 0
+
+
+ 5
+ 32
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_parser.c
+ finsh_parser.c
+ 0
+ 0
+
+
+ 5
+ 33
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_var.c
+ finsh_var.c
+ 0
+ 0
+
+
+ 5
+ 34
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_vm.c
+ finsh_vm.c
+ 0
+ 0
+
+
+ 5
+ 35
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\finsh_token.c
+ finsh_token.c
+ 0
+ 0
+
+
+
+
+ Kernel
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 36
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\clock.c
+ clock.c
+ 0
+ 0
+
+
+ 6
+ 37
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\components.c
+ components.c
+ 0
+ 0
+
+
+ 6
+ 38
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\device.c
+ device.c
+ 0
+ 0
+
+
+ 6
+ 39
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\idle.c
+ idle.c
+ 0
+ 0
+
+
+ 6
+ 40
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\ipc.c
+ ipc.c
+ 0
+ 0
+
+
+ 6
+ 41
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\irq.c
+ irq.c
+ 0
+ 0
+
+
+ 6
+ 42
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\kservice.c
+ kservice.c
+ 0
+ 0
+
+
+ 6
+ 43
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\memheap.c
+ memheap.c
+ 0
+ 0
+
+
+ 6
+ 44
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\mempool.c
+ mempool.c
+ 0
+ 0
+
+
+ 6
+ 45
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\object.c
+ object.c
+ 0
+ 0
+
+
+ 6
+ 46
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\scheduler.c
+ scheduler.c
+ 0
+ 0
+
+
+ 6
+ 47
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\signal.c
+ signal.c
+ 0
+ 0
+
+
+ 6
+ 48
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\thread.c
+ thread.c
+ 0
+ 0
+
+
+ 6
+ 49
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\timer.c
+ timer.c
+ 0
+ 0
+
+
+
+
+ libc
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 50
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\libc\compilers\armlibc\libc.c
+ libc.c
+ 0
+ 0
+
+
+ 7
+ 51
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\libc\compilers\armlibc\mem_std.c
+ mem_std.c
+ 0
+ 0
+
+
+ 7
+ 52
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\libc\compilers\armlibc\stubs.c
+ stubs.c
+ 0
+ 0
+
+
+ 7
+ 53
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\libc\compilers\common\time.c
+ time.c
+ 0
+ 0
+
+
+
+
+ STM32_HAL
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 54
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal.c
+ stm32mp1xx_hal.c
+ 0
+ 0
+
+
+ 8
+ 55
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_hsem.c
+ stm32mp1xx_hal_hsem.c
+ 0
+ 0
+
+
+ 8
+ 56
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_exti.c
+ stm32mp1xx_hal_exti.c
+ 0
+ 0
+
+
+ 8
+ 57
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_ipcc.c
+ stm32mp1xx_hal_ipcc.c
+ 0
+ 0
+
+
+ 8
+ 58
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cortex.c
+ stm32mp1xx_hal_cortex.c
+ 0
+ 0
+
+
+ 8
+ 59
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma.c
+ stm32mp1xx_hal_dma.c
+ 0
+ 0
+
+
+ 8
+ 60
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma_ex.c
+ stm32mp1xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 8
+ 61
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_mdma.c
+ stm32mp1xx_hal_mdma.c
+ 0
+ 0
+
+
+ 8
+ 62
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr.c
+ stm32mp1xx_hal_pwr.c
+ 0
+ 0
+
+
+ 8
+ 63
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr_ex.c
+ stm32mp1xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 8
+ 64
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc.c
+ stm32mp1xx_hal_rcc.c
+ 0
+ 0
+
+
+ 8
+ 65
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc_ex.c
+ stm32mp1xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 8
+ 66
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_gpio.c
+ stm32mp1xx_hal_gpio.c
+ 0
+ 0
+
+
+ 8
+ 67
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc.c
+ stm32mp1xx_hal_adc.c
+ 0
+ 0
+
+
+ 8
+ 68
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc_ex.c
+ stm32mp1xx_hal_adc_ex.c
+ 0
+ 0
+
+
+ 8
+ 69
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac.c
+ stm32mp1xx_hal_dac.c
+ 0
+ 0
+
+
+ 8
+ 70
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac_ex.c
+ stm32mp1xx_hal_dac_ex.c
+ 0
+ 0
+
+
+ 8
+ 71
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c.c
+ stm32mp1xx_hal_i2c.c
+ 0
+ 0
+
+
+ 8
+ 72
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c_ex.c
+ stm32mp1xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 8
+ 73
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_spi.c
+ stm32mp1xx_hal_spi.c
+ 0
+ 0
+
+
+ 8
+ 74
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim.c
+ stm32mp1xx_hal_tim.c
+ 0
+ 0
+
+
+ 8
+ 75
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim_ex.c
+ stm32mp1xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 8
+ 76
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart.c
+ stm32mp1xx_hal_uart.c
+ 0
+ 0
+
+
+ 8
+ 77
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart_ex.c
+ stm32mp1xx_hal_uart_ex.c
+ 0
+ 0
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/project.uvprojx b/bsp/stm32/stm32mp157a-st-ev1/project.uvprojx
new file mode 100644
index 0000000000000000000000000000000000000000..2b8057d6dcca6d4f2879b2dc3bc05067d21079ec
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/project.uvprojx
@@ -0,0 +1,833 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32MP157AAAx:Cortex-M4
+ STMicroelectronics
+ Keil.STM32MP1xx_DFP.1.3.0
+ http://www.keil.com/pack/
+ IRAM(0x10020000,0x00020000) IRAM2(0x10040000,0x00020000) IROM(0x10000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000)
+ UL2CM3(-S0 -C0 -P0 -FD10020000 -FC1000)
+ 0
+ $$Device:STM32MP157AAAx$Drivers\CMSIS\Device\ST\STM32MP1xx\Include\stm32mp157axx_cm4.h
+ $$Device:STM32MP157AAAx$SVD\STM32MP157x.svd
+ 0
+ 0
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\build\keil\Obj\
+ rt-thread
+ 1
+ 0
+ 0
+ 1
+ 0
+ .\build\keil\List\
+ 1
+ 0
+ 0
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 0
+ fromelf --bin !L --output rtthread.bin
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+ 1
+
+
+ SARMCM3.DLL
+ -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+ "" ()
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 8
+ 0
+ 0
+ 0
+ 0
+ 3
+ 4
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10020000
+ 0x20000
+
+
+ 1
+ 0x10000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x10000000
+ 0x40000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10050000
+ 0x10000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+ CORE_CM4, USE_HAL_DRIVER, STM32MP157Axx, RT_USING_ARM_LIBC
+ applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\CM4\Inc;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Inc;..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Include;..\libraries\STM32MPxx_HAL\CMSIS\Core\Include;..\libraries\STM32MPxx_HAL\CMSIS\Include
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 4
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ .\board\linker_scripts\link.sct
+
+
+
+
+
+ Applications
+
+
+ main.c
+ 1
+ applications\main.c
+
+
+
+
+ cpu
+
+
+ backtrace.c
+ 1
+ ..\..\..\libcpu\arm\common\backtrace.c
+
+
+ div0.c
+ 1
+ ..\..\..\libcpu\arm\common\div0.c
+
+
+ showmem.c
+ 1
+ ..\..\..\libcpu\arm\common\showmem.c
+
+
+ cpuport.c
+ 1
+ ..\..\..\libcpu\arm\cortex-m4\cpuport.c
+
+
+ context_rvds.S
+ 2
+ ..\..\..\libcpu\arm\cortex-m4\context_rvds.S
+
+
+
+
+ DeviceDrivers
+
+
+ pin.c
+ 1
+ ..\..\..\components\drivers\misc\pin.c
+
+
+ serial.c
+ 1
+ ..\..\..\components\drivers\serial\serial.c
+
+
+ completion.c
+ 1
+ ..\..\..\components\drivers\src\completion.c
+
+
+ dataqueue.c
+ 1
+ ..\..\..\components\drivers\src\dataqueue.c
+
+
+ pipe.c
+ 1
+ ..\..\..\components\drivers\src\pipe.c
+
+
+ ringblk_buf.c
+ 1
+ ..\..\..\components\drivers\src\ringblk_buf.c
+
+
+ ringbuffer.c
+ 1
+ ..\..\..\components\drivers\src\ringbuffer.c
+
+
+ waitqueue.c
+ 1
+ ..\..\..\components\drivers\src\waitqueue.c
+
+
+ workqueue.c
+ 1
+ ..\..\..\components\drivers\src\workqueue.c
+
+
+
+
+ Drivers
+
+
+ board.c
+ 1
+ board\board.c
+
+
+ system_stm32mp1xx.c
+ 1
+ board\CubeMX_Config\Common\System\system_stm32mp1xx.c
+
+
+ stm32mp1xx_hal_msp.c
+ 1
+ board\CubeMX_Config\CM4\Src\stm32mp1xx_hal_msp.c
+
+
+ startup_stm32mp15xx.s
+ 2
+ ..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Source\Templates\arm\startup_stm32mp15xx.s
+
+
+ drv_gpio.c
+ 1
+ ..\libraries\HAL_Drivers\drv_gpio.c
+
+
+ drv_usart.c
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+
+ drv_common.c
+ 1
+ ..\libraries\HAL_Drivers\drv_common.c
+
+
+
+
+ finsh
+
+
+ shell.c
+ 1
+ ..\..\..\components\finsh\shell.c
+
+
+ cmd.c
+ 1
+ ..\..\..\components\finsh\cmd.c
+
+
+ msh.c
+ 1
+ ..\..\..\components\finsh\msh.c
+
+
+ finsh_compiler.c
+ 1
+ ..\..\..\components\finsh\finsh_compiler.c
+
+
+ finsh_error.c
+ 1
+ ..\..\..\components\finsh\finsh_error.c
+
+
+ finsh_heap.c
+ 1
+ ..\..\..\components\finsh\finsh_heap.c
+
+
+ finsh_init.c
+ 1
+ ..\..\..\components\finsh\finsh_init.c
+
+
+ finsh_node.c
+ 1
+ ..\..\..\components\finsh\finsh_node.c
+
+
+ finsh_ops.c
+ 1
+ ..\..\..\components\finsh\finsh_ops.c
+
+
+ finsh_parser.c
+ 1
+ ..\..\..\components\finsh\finsh_parser.c
+
+
+ finsh_var.c
+ 1
+ ..\..\..\components\finsh\finsh_var.c
+
+
+ finsh_vm.c
+ 1
+ ..\..\..\components\finsh\finsh_vm.c
+
+
+ finsh_token.c
+ 1
+ ..\..\..\components\finsh\finsh_token.c
+
+
+
+
+ Kernel
+
+
+ clock.c
+ 1
+ ..\..\..\src\clock.c
+
+
+ components.c
+ 1
+ ..\..\..\src\components.c
+
+
+ device.c
+ 1
+ ..\..\..\src\device.c
+
+
+ idle.c
+ 1
+ ..\..\..\src\idle.c
+
+
+ ipc.c
+ 1
+ ..\..\..\src\ipc.c
+
+
+ irq.c
+ 1
+ ..\..\..\src\irq.c
+
+
+ kservice.c
+ 1
+ ..\..\..\src\kservice.c
+
+
+ memheap.c
+ 1
+ ..\..\..\src\memheap.c
+
+
+ mempool.c
+ 1
+ ..\..\..\src\mempool.c
+
+
+ object.c
+ 1
+ ..\..\..\src\object.c
+
+
+ scheduler.c
+ 1
+ ..\..\..\src\scheduler.c
+
+
+ signal.c
+ 1
+ ..\..\..\src\signal.c
+
+
+ thread.c
+ 1
+ ..\..\..\src\thread.c
+
+
+ timer.c
+ 1
+ ..\..\..\src\timer.c
+
+
+
+
+ libc
+
+
+ libc.c
+ 1
+ ..\..\..\components\libc\compilers\armlibc\libc.c
+
+
+ mem_std.c
+ 1
+ ..\..\..\components\libc\compilers\armlibc\mem_std.c
+
+
+ stubs.c
+ 1
+ ..\..\..\components\libc\compilers\armlibc\stubs.c
+
+
+ time.c
+ 1
+ ..\..\..\components\libc\compilers\common\time.c
+
+
+
+
+ STM32_HAL
+
+
+ stm32mp1xx_hal.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal.c
+
+
+ stm32mp1xx_hal_hsem.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_hsem.c
+
+
+ stm32mp1xx_hal_exti.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_exti.c
+
+
+ stm32mp1xx_hal_ipcc.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_ipcc.c
+
+
+ stm32mp1xx_hal_cortex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cortex.c
+
+
+ stm32mp1xx_hal_dma.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma.c
+
+
+ stm32mp1xx_hal_dma_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma_ex.c
+
+
+ stm32mp1xx_hal_mdma.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_mdma.c
+
+
+ stm32mp1xx_hal_pwr.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr.c
+
+
+ stm32mp1xx_hal_pwr_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr_ex.c
+
+
+ stm32mp1xx_hal_rcc.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc.c
+
+
+ stm32mp1xx_hal_rcc_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc_ex.c
+
+
+ stm32mp1xx_hal_gpio.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_gpio.c
+
+
+ stm32mp1xx_hal_adc.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc.c
+
+
+ stm32mp1xx_hal_adc_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc_ex.c
+
+
+ stm32mp1xx_hal_dac.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac.c
+
+
+ stm32mp1xx_hal_dac_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac_ex.c
+
+
+ stm32mp1xx_hal_i2c.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c.c
+
+
+ stm32mp1xx_hal_i2c_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c_ex.c
+
+
+ stm32mp1xx_hal_spi.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_spi.c
+
+
+ stm32mp1xx_hal_tim.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim.c
+
+
+ stm32mp1xx_hal_tim_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim_ex.c
+
+
+ stm32mp1xx_hal_uart.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart.c
+
+
+ stm32mp1xx_hal_uart_ex.c
+ 1
+ ..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart_ex.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+ <Project Info>
+ 0
+ 1
+
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/rtconfig.h b/bsp/stm32/stm32mp157a-st-ev1/rtconfig.h
new file mode 100644
index 0000000000000000000000000000000000000000..65772b7eac35fb971e9debba6ceea7ae99b836eb
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/rtconfig.h
@@ -0,0 +1,175 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 100
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 512
+#define RT_DEBUG
+#define RT_DEBUG_COLOR
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_MEMHEAP
+#define RT_USING_MEMHEAP_AS_HEAP
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart4"
+#define RT_VER_NUM 0x40003
+#define ARCH_ARM
+#define RT_USING_CPU_FFS
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M4
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_USING_LIBC
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* Network interface device */
+
+
+/* light weight TCP/IP stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+#define SOC_FAMILY_STM32
+#define SOC_SERIES_STM32MP1
+
+/* Hardware Drivers Config */
+
+#define SOC_STM32MP157A
+
+/* Onboard Peripheral Drivers */
+
+#define BSP_USING_STLINK_TO_USART
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_GPIO
+#define BSP_USING_UART
+#define BSP_USING_UART4
+
+/* Board extended module Drivers */
+
+
+#endif
diff --git a/bsp/stm32/stm32mp157a-st-ev1/rtconfig.py b/bsp/stm32/stm32mp157a-st-ev1/rtconfig.py
new file mode 100644
index 0000000000000000000000000000000000000000..b1cad1d512dc8b7682bbe8e0402812c9801a84e8
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/rtconfig.py
@@ -0,0 +1,150 @@
+import os
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m4'
+CROSS_TOOL='gcc'
+
+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
+if os.getenv('RTT_CC'):
+ CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+ RTT_ROOT = os.getenv('RTT_ROOT')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if CROSS_TOOL == 'gcc':
+ PLATFORM = 'gcc'
+ EXEC_PATH = r'C:\Users\XXYYZZ'
+elif CROSS_TOOL == 'keil':
+ PLATFORM = 'armcc'
+ EXEC_PATH = r'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+ PLATFORM = 'iar'
+ EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
+
+if os.getenv('RTT_EXEC_PATH'):
+ EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+ # toolchains
+ PREFIX = 'arm-none-eabi-'
+ CC = PREFIX + 'gcc'
+ AS = PREFIX + 'gcc'
+ AR = PREFIX + 'ar'
+ CXX = PREFIX + 'g++'
+ LINK = PREFIX + 'gcc'
+ TARGET_EXT = 'elf'
+ SIZE = PREFIX + 'size'
+ OBJDUMP = PREFIX + 'objdump'
+ OBJCPY = PREFIX + 'objcopy'
+
+ DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+ CFLAGS = DEVICE + ' -Dgcc'
+ AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+ LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
+
+ CPATH = ''
+ LPATH = ''
+
+ if BUILD == 'debug':
+ CFLAGS += ' -O0 -gdwarf-2 -g'
+ AFLAGS += ' -gdwarf-2'
+ else:
+ CFLAGS += ' -O2'
+
+ CXXFLAGS = CFLAGS
+
+ POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+ # toolchains
+ CC = 'armcc'
+ CXX = 'armcc'
+ AS = 'armasm'
+ AR = 'armar'
+ LINK = 'armlink'
+ TARGET_EXT = 'axf'
+
+ DEVICE = ' --cpu Cortex-M4.fp '
+ CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+ AFLAGS = DEVICE + ' --apcs=interwork '
+ LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
+ CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
+ LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
+
+ CFLAGS += ' -D__MICROLIB '
+ AFLAGS += ' --pd "__MICROLIB SETA 1" '
+ LFLAGS += ' --library_type=microlib '
+ EXEC_PATH += '/ARM/ARMCC/bin/'
+
+ if BUILD == 'debug':
+ CFLAGS += ' -g -O0'
+ AFLAGS += ' -g'
+ else:
+ CFLAGS += ' -O2'
+
+ CXXFLAGS = CFLAGS
+ CFLAGS += ' -std=c99'
+
+ POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iar':
+ # toolchains
+ CC = 'iccarm'
+ CXX = 'iccarm'
+ AS = 'iasmarm'
+ AR = 'iarchive'
+ LINK = 'ilinkarm'
+ TARGET_EXT = 'out'
+
+ DEVICE = '-Dewarm'
+
+ CFLAGS = DEVICE
+ CFLAGS += ' --diag_suppress Pa050'
+ CFLAGS += ' --no_cse'
+ CFLAGS += ' --no_unroll'
+ CFLAGS += ' --no_inline'
+ CFLAGS += ' --no_code_motion'
+ CFLAGS += ' --no_tbaa'
+ CFLAGS += ' --no_clustering'
+ CFLAGS += ' --no_scheduling'
+ CFLAGS += ' --endian=little'
+ CFLAGS += ' --cpu=Cortex-M4'
+ CFLAGS += ' -e'
+ CFLAGS += ' --fpu=VFPv4_sp'
+ CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+ CFLAGS += ' --silent'
+
+ AFLAGS = DEVICE
+ AFLAGS += ' -s+'
+ AFLAGS += ' -w+'
+ AFLAGS += ' -r'
+ AFLAGS += ' --cpu Cortex-M4'
+ AFLAGS += ' --fpu VFPv4_sp'
+ AFLAGS += ' -S'
+
+ if BUILD == 'debug':
+ CFLAGS += ' --debug'
+ CFLAGS += ' -On'
+ else:
+ CFLAGS += ' -Oh'
+
+ LFLAGS = ' --config "board/linker_scripts/link.icf"'
+ LFLAGS += ' --entry __iar_program_start'
+
+ CXXFLAGS = CFLAGS
+
+ EXEC_PATH = EXEC_PATH + '/arm/bin/'
+ POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
+
+def dist_handle(BSP_ROOT, dist_dir):
+ import sys
+ cwd_path = os.getcwd()
+ sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+ from sdk_dist import dist_do_building
+ dist_do_building(BSP_ROOT, dist_dir)
diff --git a/bsp/stm32/stm32mp157a-st-ev1/template.ewp b/bsp/stm32/stm32mp157a-st-ev1/template.ewp
new file mode 100644
index 0000000000000000000000000000000000000000..6d6c615d16e243dda5021ec03d0a6f2710564720
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/template.ewp
@@ -0,0 +1,2106 @@
+
+
+ 3
+
+ rt-thread
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 31
+ 1
+ 1
+
+ ExePath
+ build\iar\Exe
+
+
+ ObjPath
+ build\iar\Obj
+
+
+ ListPath
+ build\iar\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ Automatic choice of formatter, without multibyte support.
+
+
+ Output description
+ Automatic choice of formatter, without multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.40.1.21529
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32MP157A_M4 ST STM32MP157A_M4
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\inc\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 27
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 27
+ 39
+
+
+ GFPUDeviceSlave
+ STM32MP157A_M4 ST STM32MP157A_M4
+
+
+ FPU2
+ 0
+ 4
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 27
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+ GenLocaleDisplayOnly
+
+
+ DSPExtension
+ 1
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 35
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+ Pa050
+
+
+ CCDiagRemark
+
+
+ CCDiagWarning
+
+
+ CCDiagError
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 00000000
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 1
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+ OICompilerExtraOption
+ 1
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+ AWarnRange1
+
+
+ AWarnRange2
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 3
+
+
+ OCOutputOverride
+ 0
+
+
+ OOCOutputFile
+ template.bin
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+ BUILDACTION
+ 1
+
+
+
+
+ ILINK
+ 0
+
+ 23
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ RT-Thread-STM32MP1_CM4.elf
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+ IlinkRawBinaryFile
+
+
+ IlinkRawBinarySymbol
+
+
+ IlinkRawBinarySegment
+
+
+ IlinkRawBinaryAlign
+
+
+ IlinkDefines
+
+
+ IlinkConfigDefines
+
+
+ IlinkMapFile
+ 0
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$\board\linker_scripts\link.icf
+
+
+ IlinkIcfFileSlave
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+ IlinkTreatAsRem
+
+
+ IlinkTreatAsWarn
+
+
+ IlinkTreatAsErr
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+ IlinkStackCallGraphFile
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ template_import_lib.o
+
+
+ OILinkExtraOption
+ 1
+
+
+ IlinkRawBinaryFile2
+
+
+ IlinkRawBinarySymbol2
+
+
+ IlinkRawBinarySegment2
+
+
+ IlinkRawBinaryAlign2
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 31
+ 1
+ 0
+
+ ExePath
+ Release\Exe
+
+
+ ObjPath
+ Release\Obj
+
+
+ ListPath
+ Release\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+
+
+ Output description
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 0
+
+
+ GRuntimeLibSelect
+ 0
+ 1
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 1
+
+
+ RTDescription
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.11.3.13977
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ Default None
+
+
+ GenLowLevelInterface
+ 0
+
+
+ GEndianModeBE
+ 0
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+
+
+ GBECoreSlave
+ 27
+ 1
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 27
+ 0
+
+
+ GFPUDeviceSlave
+ Default None
+
+
+ FPU2
+ 0
+ 0
+
+
+ NrRegs
+ 0
+ 0
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 27
+ 0
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+ GenLocaleDisplayOnly
+
+
+ DSPExtension
+ 0
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 35
+ 1
+ 0
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+ CCDiagRemark
+
+
+ CCDiagWarning
+
+
+ CCDiagError
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 0
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+ OICompilerExtraOption
+ 1
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 0
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+ AWarnRange1
+
+
+ AWarnRange2
+
+
+ ADebug
+ 0
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+ OOCOutputFormat
+ 3
+ 0
+
+
+ OCOutputOverride
+ 0
+
+
+ OOCOutputFile
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 0
+
+
+
+
+ CUSTOM
+ 3
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+ BUILDACTION
+ 1
+
+
+
+
+ ILINK
+ 0
+
+ 23
+ 1
+ 0
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ###Unitialized###
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+ IlinkRawBinaryFile
+
+
+ IlinkRawBinarySymbol
+
+
+ IlinkRawBinarySegment
+
+
+ IlinkRawBinaryAlign
+
+
+ IlinkDefines
+
+
+ IlinkConfigDefines
+
+
+ IlinkMapFile
+ 0
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 0
+
+
+ IlinkIcfFile
+ lnk0t.icf
+
+
+ IlinkIcfFileSlave
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+ IlinkTreatAsRem
+
+
+ IlinkTreatAsWarn
+
+
+ IlinkTreatAsErr
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 1
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+ IlinkStackCallGraphFile
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ ###Unitialized###
+
+
+ OILinkExtraOption
+ 1
+
+
+ IlinkRawBinaryFile2
+
+
+ IlinkRawBinarySymbol2
+
+
+ IlinkRawBinarySegment2
+
+
+ IlinkRawBinaryAlign2
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+ IarchiveInputs
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/template.eww b/bsp/stm32/stm32mp157a-st-ev1/template.eww
new file mode 100644
index 0000000000000000000000000000000000000000..c62178f07a5e15c70d24add2b6f369e079d7a335
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/template.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\template.ewp
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/template.uvopt b/bsp/stm32/stm32mp157a-st-ev1/template.uvopt
new file mode 100644
index 0000000000000000000000000000000000000000..ed90c9e187e8063cc4d07cc09e28620f73aeac3f
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/template.uvopt
@@ -0,0 +1,167 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+
+
+
+ 0
+ 0
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+
+ 25000000
+
+ 1
+ 1
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\build\keil\List\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 0
+ 0
+ 1
+
+ 255
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 11
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U -O207 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000
+
+
+ 0
+ JL2CM3
+ -U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000
+
+
+ 0
+ UL2CM3
+ UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)
+
+
+
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/template.uvoptx b/bsp/stm32/stm32mp157a-st-ev1/template.uvoptx
new file mode 100644
index 0000000000000000000000000000000000000000..e3a94d45ec46ef7c2eca71b4f388ff96197a76b7
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/template.uvoptx
@@ -0,0 +1,192 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+
+ 12000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\build\keil\List\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 ) -FC1000 -FD10020000
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U066BFF343339415043223048 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10050000 -FC1000 -FN0
+
+
+
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+ 0
+ 0
+ 0
+
+ 0
+ 0
+ 0
+ 2
+ 10000000
+
+
+
+
+
+ Source Group 1
+ 0
+ 0
+ 0
+ 0
+
+
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/template.uvprojx b/bsp/stm32/stm32mp157a-st-ev1/template.uvprojx
new file mode 100644
index 0000000000000000000000000000000000000000..67a2556f75a9ada9f3a9d9abfad201342a29d444
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/template.uvprojx
@@ -0,0 +1,411 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32MP157AAAx:Cortex-M4
+ STMicroelectronics
+ Keil.STM32MP1xx_DFP.1.3.0
+ http://www.keil.com/pack/
+ IRAM(0x10020000,0x00020000) IRAM2(0x10040000,0x00020000) IROM(0x10000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000)
+ UL2CM3(-S0 -C0 -P0 -FD10020000 -FC1000)
+ 0
+ $$Device:STM32MP157AAAx$Drivers\CMSIS\Device\ST\STM32MP1xx\Include\stm32mp157axx_cm4.h
+ $$Device:STM32MP157AAAx$SVD\STM32MP157x.svd
+ 0
+ 0
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\build\keil\Obj\
+ rt-thread
+ 1
+ 0
+ 0
+ 1
+ 0
+ .\build\keil\List\
+ 1
+ 0
+ 0
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 0
+ fromelf --bin !L --output rtthread.bin
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+ 1
+
+
+ SARMCM3.DLL
+ -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+ "" ()
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 8
+ 0
+ 0
+ 0
+ 0
+ 3
+ 4
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10020000
+ 0x20000
+
+
+ 1
+ 0x10000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x10000000
+ 0x40000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10050000
+ 0x10000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 4
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ .\board\linker_scripts\link.sct
+
+
+
+
+
+ Source Group 1
+
+
+
+
+
+
+
+
+
+
+
+ <Project Info>
+ 0
+ 1
+
+
+
+
+
+
+* If need to reburn the program, please reset the development board.
+
+
+## Contact Information
+
+accendant:
+
+- [liukang](https://github.com/thread-liu)
diff --git a/bsp/stm32/stm32mp157a-st-ev1/README_zh.md b/bsp/stm32/stm32mp157a-st-ev1/README_zh.md
new file mode 100644
index 0000000000000000000000000000000000000000..8b5e3a2ada1fbc1da8dd8f09cb31bed35127066d
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/README_zh.md
@@ -0,0 +1,187 @@
+# STM32MP157A-DK1 开发板 BSP 说明
+
+## 简介
+
+本文档为 RT-Thread 开发团队为 STM32MP157A-DK1 开发板提供的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+STM32MP157A-DK1 是 ST 推出的一款基于双 Cortex-A7 + Cortex-M4 内核的开发板。Cortex-A7 核工作频率为 800 MHZ，Cortex-M4 工作频率为 209MHZ。STM32MP157A 内部没有 Flash。
+
+开发板外观如下图所示：
+
+ 
+
+该开发板常用 **板载资源** 如下：
+
+- MCU：STM32MP157AACx
+- 常用外设
+ - LED：4个 ，LD4 (PA14)， LD6 (PA13)，LD7 (PH7)，LD8 (PD11)
+ - 按键，4个，WAKE_UP，RESET (NRST)，USER1(PA14)，USER2 (PA13)
+- 常用接口：USB 转串口、SD 卡接口、以太网接口、MIPI接口、USB HOST、Audio、HDMI、Arduino
+- 调试接口，标准 JTAG/SWD
+
+开发板更多详细信息请参考 ST 官方文档 [STM32MP157A-DK1 开发板介绍](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/stm32mp157a-dk1.html)。
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **板载外设** | **支持情况** | **备注** |
+| :----------- | :----------: | :--------------: |
+| USB 转串口 | 支持 | |
+| SD卡 | 暂不支持 | |
+| 以太网 | 暂不支持 | |
+| 音频接口 | 暂不支持 | |
+| **片上外设** | **支持情况** | **备注** |
+| GPIO | 支持 | |
+| UART | 支持 | UART4 (ST-Link) |
+| EXTI | 支持 | |
+| SPI | 支持 | |
+| TIM | 支持 | |
+| LPTIM | 支持 | |
+| I2C | 支持 | 软件、硬件都支持 |
+| ADC | 支持 | |
+| DAC | 支持 | |
+| WWDG | 支持 | |
+| USB Device | 暂不支持 | |
+| USB Host | 暂不支持 | |
+
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+ 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+ 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 IAR 工程。下面以 IAR 开发环境为例，介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用数据线连接开发板到 PC，打开电源开关。
+
+#### 编译下载
+
+双击 project.eww 文件，打开 IAR 工程，编译并下载程序到开发板。
+
+> 工程默认配置使用 ST-LINK 下载程序，在通过 ST-LINK连接开发板的基础上，点击下载按钮即可下载程序到开发板
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，蓝色 LD8 会周期性闪烁，终端会周期性输出 ”Hello RT-Thread!“
+
+连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），可以看到 RT-Thread 的输出信息:
+
+> 注：正点原子开发板 在使用终端工具如：PuTTy、XShell 时，会出现系统不能启动的问题，推荐使用串口调试助手如：sscom
+
+```bash
+ \ | /
+- RT - Thread Operating System
+ / | \ 3.1.1 build Nov 19 2018
+ 2006 - 2018 Copyright by rt-thread team
+msh >
+Hello RT-Thread!
+```
+#### 驱动使用
+##### 1. WWDG
+
+1. 在 bsp 下打开 env 工具；
+2. 输入 `menuconfig` 命令， 进入 Hardware Drivers config 打开 wwdg，保存并退出；
+3. 输入 `scons --target=iar` 命令重新生成工程；
+4. wwdg 设备会在喂狗前触发中断，LD5 会在中断中不停的闪烁；
+5. 在终端输入 `wwdg_sample` ，获取 wwdg 设备 Finsh 命令；
+6. `wwdg_sample run` 开启 wwdg 设备；
+7. `wwdg_sample set` 设置 wwdg 设备分频率；
+8. 通过调整 wwdg 设备分频率，开发板上 LD5 会有不同的闪烁频率。
+
+##### 2. DAC
+
+1. 在 bsp 下打开 env 工具；
+2. 输入`menuconfig`命令， 进入 Hardware Drivers config 打开 dac，保存并退出；
+3. 输入 `scons --target=iar` 命令重新生成工程；
+
+###### Finsh
+
+在使用设备前，需要先查找设备是否存在，可以使用命令 `dac probe` 后面跟注册的 DAC 设备的名称。如下所示：
+
+```c
+msh />dac probe dac1
+probe dac1 success
+```
+
+使能设备的某个通道可以使用命令 `dac enable` 后面跟通道号。
+
+```c
+msh />dac enable 1
+dac1 channel 1 enables success
+```
+
+设置 DAC 设备某个通道的数据可以使用命令 `dac write` 后面跟通道号。
+
+```c
+msh />dac write 1 1000
+dac1 channel 1 write value is 1000
+```
+
+关闭设备的某个通道可以使用命令 `dac disable` 后面跟通道号。
+
+```c
+msh />dac disable 1
+dac1 channel 1 disable success
+```
+#### 3. LPTIM
+
+1. 在 bsp 下打开 env 工具；
+2. 输入 `menuconfig` 命令， 进入 Hardware Drivers config 打开 lptim，保存并退出；
+3. 输入 `scons --target=iar` 命令重新生成工程；
+4. lptim 设备计时溢出时会触发中断，中断会打印字符串 `"hello rt-thread!"`；
+5. 在终端输入 `lptim_sample` ，获取 lptim 设备 Finsh 命令；
+6. `lptim_sample run` 开启 lptim 设备；
+7. `lptim_sample set` 设置 lptim 设备分频率。
+
+
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口4 的功能，如果需更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=iar` 命令重新生成工程。
+
+本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
+
+## 注意事项
+
+1. 下载程序前，将开发板设置为 "Engineering Mode" 模式。 在 DK1 开发板上，将底下的BOOT开关设成 BOOT0=0，BOOT2=1状态，就进入"Engineering Mode"，如下图所示：
+
+ 
+
+2. 再次烧写程序时，需要复位开发板。
+
+## 联系人信息
+
+维护人:
+
+- [liukang](https://github.com/thread-liu)
+
diff --git a/bsp/stm32/stm32mp157a-st-ev1/SConscript b/bsp/stm32/stm32mp157a-st-ev1/SConscript
new file mode 100644
index 0000000000000000000000000000000000000000..20f7689c53ca71a676748f79187f9764065466c5
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/SConscript
@@ -0,0 +1,15 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+ path = os.path.join(cwd, d)
+ if os.path.isfile(os.path.join(path, 'SConscript')):
+ objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
diff --git a/bsp/stm32/stm32mp157a-st-ev1/SConstruct b/bsp/stm32/stm32mp157a-st-ev1/SConstruct
new file mode 100644
index 0000000000000000000000000000000000000000..e1481a896b0d55ef0037989d313dd10c634b3a4d
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/SConstruct
@@ -0,0 +1,60 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+ RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+ RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+ from building import *
+except:
+ print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+ print(RTT_ROOT)
+ exit(-1)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+ AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+ CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+ AR = rtconfig.AR, ARFLAGS = '-rc',
+ CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+ LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+ env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+ env.Replace(ARFLAGS = [''])
+ env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+ libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+ libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+stm32_library = 'STM32MPxx_HAL'
+rtconfig.BSP_LIBRARY_TYPE = stm32_library
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)
diff --git a/bsp/stm32/stm32mp157a-st-ev1/applications/SConscript b/bsp/stm32/stm32mp157a-st-ev1/applications/SConscript
new file mode 100644
index 0000000000000000000000000000000000000000..04f04dd5435cd69acd90735e75caaffc0ba0d9ff
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/applications/SConscript
@@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/stm32/stm32mp157a-st-ev1/applications/main.c b/bsp/stm32/stm32mp157a-st-ev1/applications/main.c
new file mode 100644
index 0000000000000000000000000000000000000000..b38732f066590bbcf8bb1715ed44f236ee617790
--- /dev/null
+++ b/bsp/stm32/stm32mp157a-st-ev1/applications/main.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2020-06-05 thread-liu first version
+ */
+
+#include