* Initialize the rx descriptors for ring or chain mode operation.
* - Status field is initialized to 0.
* - EndOfRing set for the last descriptor.
* - buffer1 and buffer2 set to 0 for ring mode of operation. (note)
* - data1 and data2 set to 0. (note)
* @param[in] pointer to DmaDesc structure.
* @param[in] whether end of ring
* \return void.
* \note Initialization of the buffer1, buffer2, data1,data2 and status are not done here. This only initializes whether one wants to use this descriptor
* in chain mode or ring mode. For chain mode of operation the buffer2 and data2 are programmed before calling this function.
* Initialize the tx descriptors for ring or chain mode operation.
* - Status field is initialized to 0.
* - EndOfRing set for the last descriptor.
* - buffer1 and buffer2 set to 0 for ring mode of operation. (note)
* - data1 and data2 set to 0. (note)
* @param[in] pointer to DmaDesc structure.
* @param[in] whether end of ring
* \return void.
* \note Initialization of the buffer1, buffer2, data1,data2 and status are not done here. This only initializes whether one wants to use this descriptor
* in chain mode or ring mode. For chain mode of operation the buffer2 and data2 are programmed before calling this function.
GmacPmtCtrlStatus=0x002C,/* PMT control and status register */
GmacInterruptStatus=0x0038,/* Mac Interrupt ststus register */
GmacInterruptMask=0x003C,/* Mac Interrupt Mask register */
GmacAddr0High=0x0040,/* Mac address0 high Register */
GmacAddr0Low=0x0044,/* Mac address0 low Register */
GmacAddr1High=0x0048,/* Mac address1 high Register */
GmacAddr1Low=0x004C,/* Mac address1 low Register */
GmacAddr2High=0x0050,/* Mac address2 high Register */
GmacAddr2Low=0x0054,/* Mac address2 low Register */
GmacAddr3High=0x0058,/* Mac address3 high Register */
GmacAddr3Low=0x005C,/* Mac address3 low Register */
GmacAddr4High=0x0060,/* Mac address4 high Register */
GmacAddr4Low=0x0064,/* Mac address4 low Register */
GmacAddr5High=0x0068,/* Mac address5 high Register */
GmacAddr5Low=0x006C,/* Mac address5 low Register */
GmacAddr6High=0x0070,/* Mac address6 high Register */
GmacAddr6Low=0x0074,/* Mac address6 low Register */
GmacAddr7High=0x0078,/* Mac address7 high Register */
GmacAddr7Low=0x007C,/* Mac address7 low Register */
GmacAddr8High=0x0080,/* Mac address8 high Register */
GmacAddr8Low=0x0084,/* Mac address8 low Register */
GmacAddr9High=0x0088,/* Mac address9 high Register */
GmacAddr9Low=0x008C,/* Mac address9 low Register */
GmacAddr10High=0x0090,/* Mac address10 high Register */
GmacAddr10Low=0x0094,/* Mac address10 low Register */
GmacAddr11High=0x0098,/* Mac address11 high Register */
GmacAddr11Low=0x009C,/* Mac address11 low Register */
GmacAddr12High=0x00A0,/* Mac address12 high Register */
GmacAddr12Low=0x00A4,/* Mac address12 low Register */
GmacAddr13High=0x00A8,/* Mac address13 high Register */
GmacAddr13Low=0x00AC,/* Mac address13 low Register */
GmacAddr14High=0x00B0,/* Mac address14 high Register */
GmacAddr14Low=0x00B4,/* Mac address14 low Register */
GmacAddr15High=0x00B8,/* Mac address15 high Register */
GmacAddr15Low=0x00BC,/* Mac address15 low Register */
GmacStatus=0x00d8,/*MAC status*/
/*Time Stamp Register Map*/
GmacTSControl=0x0700,/* Controls the Timestamp update logic : only when IEEE 1588 time stamping is enabled in corekit */
GmacTSSubSecIncr=0x0704,/* 8 bit value by which sub second register is incremented : only when IEEE 1588 time stamping without external timestamp input */
GmacTSHigh=0x0708,/* 32 bit seconds(MS) : only when IEEE 1588 time stamping without external timestamp input */
GmacTSLow=0x070C,/* 32 bit nano seconds(MS) : only when IEEE 1588 time stamping without external timestamp input */
GmacTSHighUpdate=0x0710,/* 32 bit seconds(MS) to be written/added/subtracted : only when IEEE 1588 time stamping without external timestamp input */
GmacTSLowUpdate=0x0714,/* 32 bit nano seconds(MS) to be writeen/added/subtracted : only when IEEE 1588 time stamping without external timestamp input */
GmacTSAddend=0x0718,/* Used by Software to readjust the clock frequency linearly : only when IEEE 1588 time stamping without external timestamp input */
GmacTSTargetTimeHigh=0x071C,/* 32 bit seconds(MS) to be compared with system time : only when IEEE 1588 time stamping without external timestamp input */
GmacTSTargetTimeLow=0x0720,/* 32 bit nano seconds(MS) to be compared with system time : only when IEEE 1588 time stamping without external timestamp input */
GmacTSHighWord=0x0724,/* Time Stamp Higher Word Register (Version 2 only); only lower 16 bits are valid */
//GmacTSHighWordUpdate = 0x072C, /* Time Stamp Higher Word Update Register (Version 2 only); only lower 16 bits are valid */
GmacTSStatus=0x0728,/* Time Stamp Status Register */
GmacTSUPDT=0x00000008,/* Time Stamp Update 3 RW_SC 0 */
GmacTSINT=0x00000004,/* Time Atamp Initialize 2 RW_SC 0 */
GmacTSTRIG=0x00000010,/* Time stamp interrupt Trigger Enable 4 RW_SC 0 */
GmacTSCFUPDT=0x00000002,/* Time Stamp Fine/Coarse 1 RW 0 */
GmacTSCUPDTCoarse=0x00000000,/* 0=> Time Stamp update method is coarse */
GmacTSCUPDTFine=0x00000002,/* 1=> Time Stamp update method is fine */
GmacTSENA=0x00000001,/* Time Stamp Enable 0 RW 0 */
};
/* GmacTSSubSecIncr = 0x0704, 8 bit value by which sub second register is incremented : only when IEEE 1588 time stamping without external timestamp input */
enumGmacTSSubSecIncrReg
{
GmacSSINCMsk=0x000000FF,/* Only Lower 8 bits are valid bits 7:0 RW 00 */
};
/* GmacTSLow = 0x070C, Indicates whether the timestamp low count is positive or negative; for Adv timestamp it is always zero */
enumGmacTSSign
{
GmacTSSign=0x80000000,/* PSNT 31 RW 0 */
GmacTSPositive=0x00000000,
GmacTSNegative=0x80000000,
};
/*GmacTargetTimeLow = 0x0718, 32 bit nano seconds(MS) to be compared with system time : only when IEEE 1588 time stamping without external timestamp input */
enumGmacTSLowReg
{
GmacTSDecThr=0x3B9AC9FF,/*when TSCTRLSSR is set the max value for GmacTargetTimeLowReg and GmacTimeStampLow register is 0x3B9AC9FF at 1ns precision */
};
/* GmacTSHighWord = 0x0724, Time Stamp Higher Word Register (Version 2 only); only lower 16 bits are valid */
enumGmacTSHighWordReg
{
GmacTSHighWordMask=0x0000FFFF,/* Time Stamp Higher work register has only lower 16 bits valid */
};
/*GmacTSStatus = 0x0728, Time Stamp Status Register */
enumGmacTSStatusReg
{
GmacTSTargTimeReached=0x00000002,/* Time Stamp Target Time Reached 1 RO 0 */
GmacTSSecondsOverflow=0x00000001,/* Time Stamp Seconds Overflow 0 RO 0 */
u32*sec_val,u32*sub_sec_val);// Reads the timestamp low,high and higher(Ver2) registers in the the struct pointer; readonly contents
voidsynopGMAC_TS_load_target_timestamp(synopGMACdevice*gmacdev,u32sec_val,u32sub_sec_val);//Loads the timestamp target register with the values provided
