From 38bd06cc179ebf1a2d3185047ce67b7f374134bd Mon Sep 17 00:00:00 2001 From: wenbodong2015 Date: Tue, 7 Sep 2021 11:19:47 +0800 Subject: [PATCH] =?UTF-8?q?=E8=A7=A3=E5=86=B3=20HC32L196=20scons=E7=BC=96?= =?UTF-8?q?=E8=AF=91=E9=97=AE=E9=A2=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/hc32l196/SConstruct | 3 --- bsp/hc32l196/rtconfig.py | 1 - 2 files changed, 4 deletions(-) diff --git a/bsp/hc32l196/SConstruct b/bsp/hc32l196/SConstruct index 9782920a33..ba341c62af 100644 --- a/bsp/hc32l196/SConstruct +++ b/bsp/hc32l196/SConstruct @@ -2,7 +2,6 @@ import os import sys import rtconfig -print "############sconstruct##############" if os.getenv('RTT_ROOT'): RTT_ROOT = os.getenv('RTT_ROOT') else: @@ -38,8 +37,6 @@ Export('RTT_ROOT') Export('rtconfig') # prepare building environment -print "######################env:" -print env objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) # make a building diff --git a/bsp/hc32l196/rtconfig.py b/bsp/hc32l196/rtconfig.py index 2d44172455..cd1789c846 100644 --- a/bsp/hc32l196/rtconfig.py +++ b/bsp/hc32l196/rtconfig.py @@ -89,7 +89,6 @@ elif PLATFORM == 'armcc': CFLAGS += ' -O2' CXXFLAGS = CFLAGS - CFLAGS += ' -std=c99' POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' -- GitLab