From 0606261b97fa4ffb860bfa8ae9c254d8813d5703 Mon Sep 17 00:00:00 2001 From: thread-liu Date: Sat, 20 Jun 2020 14:04:27 +0800 Subject: [PATCH] [add] stm32mp1 drivers --- bsp/stm32/libraries/HAL_Drivers/Kconfig | 4 +- .../HAL_Drivers/config/mp1/dma_config.h | 117 +++++++++ .../HAL_Drivers/config/mp1/uart_config.h | 235 ++++++++++++++++++ bsp/stm32/libraries/HAL_Drivers/drv_common.c | 4 + bsp/stm32/libraries/HAL_Drivers/drv_config.h | 3 + bsp/stm32/libraries/HAL_Drivers/drv_dma.h | 4 +- bsp/stm32/libraries/HAL_Drivers/drv_gpio.c | 117 ++++++++- bsp/stm32/libraries/HAL_Drivers/drv_gpio.h | 5 + bsp/stm32/libraries/HAL_Drivers/drv_usart.c | 15 +- bsp/stm32/libraries/HAL_Drivers/drv_usart.h | 6 +- 10 files changed, 497 insertions(+), 13 deletions(-) create mode 100644 bsp/stm32/libraries/HAL_Drivers/config/mp1/dma_config.h create mode 100644 bsp/stm32/libraries/HAL_Drivers/config/mp1/uart_config.h diff --git a/bsp/stm32/libraries/HAL_Drivers/Kconfig b/bsp/stm32/libraries/HAL_Drivers/Kconfig index 6dc0c5bcbb..45160eee82 100644 --- a/bsp/stm32/libraries/HAL_Drivers/Kconfig +++ b/bsp/stm32/libraries/HAL_Drivers/Kconfig @@ -30,7 +30,7 @@ config BSP_USING_CRC select RT_HWCRYPTO_USING_CRC # "Crypto device frame dose not support above 8-bits granularity" # "Reserve progress, running well, about 32-bits granularity, such as stm32f1, stm32f4" - depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F0 || SOC_SERIES_STM32F7 || SOC_SERIES_STM32H7) + depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F0 || SOC_SERIES_STM32F7 || SOC_SERIES_STM32H7 || SOC_SERIES_STM32MP1) default n config BSP_USING_RNG @@ -38,7 +38,7 @@ config BSP_USING_RNG select RT_USING_HWCRYPTO select RT_HWCRYPTO_USING_RNG depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \ - SOC_SERIES_STM32H7) + SOC_SERIES_STM32H7 || SOC_SERIES_STM32MP1) default n config BSP_USING_UDID diff --git a/bsp/stm32/libraries/HAL_Drivers/config/mp1/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/mp1/dma_config.h new file mode 100644 index 0000000000..12a07cbe3c --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/mp1/dma_config.h @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-01-02 zylx first version + * 2019-01-08 SummerGift clean up the code + */ + +#ifndef __DMA_CONFIG_H__ +#define __DMA_CONFIG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + + + +/* DMA2 stream0 */ +#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE) +#define SPI1_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler +#define SPI1_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define SPI1_RX_DMA_INSTANCE DMA2_Stream0 +#define SPI1_RX_DMA_CHANNEL DMA_REQUEST_SPI1_RX +#define SPI1_RX_DMA_IRQ DMA2_Stream0_IRQn +#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE) +#define SPI4_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler +#define SPI4_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define SPI4_RX_DMA_INSTANCE DMA2_Stream0 +#define SPI4_RX_DMA_CHANNEL DMA_REQUEST_SPI4_RX +#define SPI4_RX_DMA_IRQ DMA2_Stream0_IRQn +#elif defined(BSP_UART5_RX_USING_DMA) && !defined(UART5_RX_DMA_INSTANCE) +#define UART5_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler +#define UART5_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define UART5_RX_DMA_INSTANCE DMA2_Stream0 +#define UART5_RX_DMA_CHANNEL DMA_REQUEST_UART5_RX +#define UART5_RX_DMA_IRQ DMA2_Stream0_IRQn +#endif + +/* DMA2 stream1 */ +#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) +#define SPI1_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler +#define SPI1_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define SPI1_TX_DMA_INSTANCE DMA2_Stream1 +#define SPI1_TX_DMA_CHANNEL DMA_REQUEST_SPI1_RX +#define SPI1_TX_DMA_IRQ DMA2_Stream1_IRQn +#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE) +#define SPI4_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler +#define SPI4_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define SPI4_TX_DMA_INSTANCE DMA2_Stream1 +#define SPI4_TX_DMA_CHANNEL DMA_REQUEST_SPI4_TX +#define SPI4_TX_DMA_IRQ DMA2_Stream1_IRQn +#endif + +/* DMA2 stream2 */ +#if defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) +#define QSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler +#define QSPI_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define QSPI_DMA_INSTANCE DMA2_Stream2 +#define QSPI_DMA_CHANNEL DMA_CHANNEL_11 +#define QSPI_DMA_IRQ DMA2_Stream2_IRQn +#endif + +/* DMA2 stream3 */ +#if defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE) +#define SPI5_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler +#define SPI5_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define SPI5_RX_DMA_INSTANCE DMA2_Stream3 +#define SPI5_RX_DMA_CHANNEL DMA_REQUEST_SPI5_RX +#define SPI5_RX_DMA_IRQ DMA2_Stream3_IRQn +#endif + +/* DMA2 stream4 */ +#if defined(BSP_SPI5_TX_USING_DMA) && !defined(SPI5_TX_DMA_INSTANCE) +#define SPI5_DMA_TX_IRQHandler DMA2_Stream4_IRQHandler +#define SPI5_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define SPI5_TX_DMA_INSTANCE DMA2_Stream4 +#define SPI5_TX_DMA_CHANNEL DMA_REQUEST_SPI5_TX +#define SPI5_TX_DMA_IRQ DMA2_Stream4_IRQn +#endif + +/* DMA2 stream5 */ +#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE) +#define UART4_DMA_TX_IRQHandler DMA2_Stream5_IRQHandler +#define UART4_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define UART4_TX_DMA_INSTANCE DMA2_Stream5 +#define UART4_TX_DMA_CHANNEL DMA_REQUEST_UART4_TX +#define UART4_TX_DMA_IRQ DMA2_Stream5_IRQn +#endif + +/* DMA2 stream6 */ +#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE) +#define UART4_DMA_RX_IRQHandler DMA2_Stream6_IRQHandler +#define UART4_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define UART4_RX_DMA_INSTANCE DMA2_Stream6 +#define UART4_RX_DMA_CHANNEL DMA_REQUEST_UART4_RX +#define UART4_RX_DMA_IRQ DMA2_Stream6_IRQn +#endif + +/* DMA2 stream7 */ +#if defined(BSP_UART5_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE) +#define UART5_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler +#define UART5_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN +#define UART5_TX_DMA_INSTANCE DMA2_Stream7 +#define UART5_TX_DMA_CHANNEL DMA_REQUEST_UART5_TX +#define UART5_TX_DMA_IRQ DMA2_Stream7_IRQn +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __DMA_CONFIG_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/mp1/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/mp1/uart_config.h new file mode 100644 index 0000000000..b13b25d362 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/mp1/uart_config.h @@ -0,0 +1,235 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-10-30 SummerGift first version + * 2019-01-03 zylx modify dma support + */ + +#ifndef __UART_CONFIG_H__ +#define __UART_CONFIG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(BSP_USING_UART1) +#ifndef UART1_CONFIG +#define UART1_CONFIG \ + { \ + .name = "uart1", \ + .Instance = USART1, \ + .irq_type = USART1_IRQn, \ + } +#endif /* UART1_CONFIG */ + +#if defined(BSP_UART1_RX_USING_DMA) +#ifndef UART1_DMA_RX_CONFIG +#define UART1_DMA_RX_CONFIG \ + { \ + .Instance = UART1_RX_DMA_INSTANCE, \ + .request = UART1_RX_DMA_CHANNEL, \ + .dma_rcc = UART1_RX_DMA_RCC, \ + .dma_irq = UART1_RX_DMA_IRQ, \ + } +#endif /* UART1_DMA_RX_CONFIG */ +#endif /* BSP_UART1_RX_USING_DMA */ + +#if defined(BSP_UART1_TX_USING_DMA) +#ifndef UART1_DMA_TX_CONFIG +#define UART1_DMA_TX_CONFIG \ + { \ + .Instance = UART1_TX_DMA_INSTANCE, \ + .request = UART1_TX_DMA_CHANNEL, \ + .dma_rcc = UART1_TX_DMA_RCC, \ + .dma_irq = UART1_TX_DMA_IRQ, \ + } +#endif /* UART1_DMA_TX_CONFIG */ +#endif /* BSP_UART1_TX_USING_DMA */ +#endif /* BSP_USING_UART1 */ + +#if defined(BSP_USING_UART2) +#ifndef UART2_CONFIG +#define UART2_CONFIG \ + { \ + .name = "uart2", \ + .Instance = USART2, \ + .irq_type = USART2_IRQn, \ + } +#endif /* UART2_CONFIG */ + +#if defined(BSP_UART2_RX_USING_DMA) +#ifndef UART2_DMA_RX_CONFIG +#define UART2_DMA_RX_CONFIG \ + { \ + .Instance = UART2_RX_DMA_INSTANCE, \ + .request = UART2_RX_DMA_CHANNEL, \ + .dma_rcc = UART2_RX_DMA_RCC, \ + .dma_irq = UART2_RX_DMA_IRQ, \ + } +#endif /* UART2_DMA_RX_CONFIG */ +#endif /* BSP_UART2_RX_USING_DMA */ + +#if defined(BSP_UART2_TX_USING_DMA) +#ifndef UART2_DMA_TX_CONFIG +#define UART2_DMA_TX_CONFIG \ + { \ + .Instance = UART2_TX_DMA_INSTANCE, \ + .request = UART2_TX_DMA_CHANNEL, \ + .dma_rcc = UART2_TX_DMA_RCC, \ + .dma_irq = UART2_TX_DMA_IRQ, \ + } +#endif /* UART2_DMA_TX_CONFIG */ +#endif /* BSP_UART2_TX_USING_DMA */ +#endif /* BSP_USING_UART2 */ + +#if defined(BSP_USING_UART3) +#ifndef UART3_CONFIG +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .Instance = USART3, \ + .irq_type = USART3_IRQn, \ + } +#endif /* UART3_CONFIG */ + +#if defined(BSP_UART3_RX_USING_DMA) +#ifndef UART3_DMA_RX_CONFIG +#define UART3_DMA_RX_CONFIG \ + { \ + .Instance = UART3_RX_DMA_INSTANCE, \ + .request = UART3_RX_DMA_CHANNEL, \ + .dma_rcc = UART3_RX_DMA_RCC, \ + .dma_irq = UART3_RX_DMA_IRQ, \ + } +#endif /* UART3_DMA_RX_CONFIG */ +#endif /* BSP_UART3_RX_USING_DMA */ + +#if defined(BSP_UART3_TX_USING_DMA) +#ifndef UART3_DMA_TX_CONFIG +#define UART3_DMA_TX_CONFIG \ + { \ + .Instance = UART3_TX_DMA_INSTANCE, \ + .request = UART3_TX_DMA_CHANNEL, \ + .dma_rcc = UART3_TX_DMA_RCC, \ + .dma_irq = UART3_TX_DMA_IRQ, \ + } +#endif /* UART3_DMA_TX_CONFIG */ +#endif /* BSP_UART3_TX_USING_DMA */ +#endif /* BSP_USING_UART3 */ + +#if defined(BSP_USING_UART4) +#ifndef UART4_CONFIG +#define UART4_CONFIG \ + { \ + .name = "uart4", \ + .Instance = UART4, \ + .irq_type = UART4_IRQn, \ + } +#endif /* UART4_CONFIG */ + +#if defined(BSP_UART4_RX_USING_DMA) +#ifndef UART4_DMA_RX_CONFIG +#define UART4_DMA_RX_CONFIG \ + { \ + .Instance = UART4_RX_DMA_INSTANCE, \ + .request = UART4_RX_DMA_CHANNEL, \ + .dma_rcc = UART4_RX_DMA_RCC, \ + .dma_irq = UART4_RX_DMA_IRQ, \ + } +#endif /* UART4_DMA_RX_CONFIG */ +#endif /* BSP_UART4_RX_USING_DMA */ + +#if defined(BSP_UART4_TX_USING_DMA) +#ifndef UART4_DMA_TX_CONFIG +#define UART4_DMA_TX_CONFIG \ + { \ + .Instance = UART4_TX_DMA_INSTANCE, \ + .request = UART4_TX_DMA_CHANNEL, \ + .dma_rcc = UART4_TX_DMA_RCC, \ + .dma_irq = UART4_TX_DMA_IRQ, \ + } +#endif /* UART4_DMA_TX_CONFIG */ +#endif /* BSP_UART4_RX_USING_DMA */ +#endif /* BSP_USING_UART4 */ + +#if defined(BSP_USING_UART5) +#ifndef UART5_CONFIG +#define UART5_CONFIG \ + { \ + .name = "uart5", \ + .Instance = UART5, \ + .irq_type = UART5_IRQn, \ + } +#endif /* UART5_CONFIG */ + +#if defined(BSP_UART5_RX_USING_DMA) +#ifndef UART5_DMA_RX_CONFIG +#define UART5_DMA_RX_CONFIG \ + { \ + .Instance = UART5_RX_DMA_INSTANCE, \ + .request = UART5_RX_DMA_CHANNEL, \ + .dma_rcc = UART5_RX_DMA_RCC, \ + .dma_irq = UART5_RX_DMA_IRQ, \ + } +#endif /* UART5_DMA_RX_CONFIG */ +#endif /* BSP_UART5_RX_USING_DMA */ + +#if defined(BSP_UART5_TX_USING_DMA) +#ifndef UART5_DMA_TX_CONFIG +#define UART5_DMA_TX_CONFIG \ + { \ + .Instance = UART5_TX_DMA_INSTANCE, \ + .request = UART5_TX_DMA_CHANNEL, \ + .dma_rcc = UART5_TX_DMA_RCC, \ + .dma_irq = UART5_TX_DMA_IRQ, \ + } +#endif /* UART5_DMA_TX_CONFIG */ +#endif /* BSP_UART5_TX_USING_DMA */ +#endif /* BSP_USING_UART5 */ + +#if defined(BSP_USING_UART6) +#ifndef UART6_CONFIG +#define UART6_CONFIG \ + { \ + .name = "uart6", \ + .Instance = USART6, \ + .irq_type = USART6_IRQn, \ + } +#endif /* UART6_CONFIG */ + +#if defined(BSP_UART6_RX_USING_DMA) +#ifndef UART6_DMA_RX_CONFIG +#define UART6_DMA_RX_CONFIG \ + { \ + .Instance = UART6_RX_DMA_INSTANCE, \ + .request = UART6_RX_DMA_CHANNEL, \ + .dma_rcc = UART6_RX_DMA_RCC, \ + .dma_irq = UART6_RX_DMA_IRQ, \ + } +#endif /* UART6_DMA_RX_CONFIG */ +#endif /* BSP_UART6_RX_USING_DMA */ + +#if defined(BSP_UART6_TX_USING_DMA) +#ifndef UART6_DMA_TX_CONFIG +#define UART6_DMA_TX_CONFIG \ + { \ + .Instance = UART6_TX_DMA_INSTANCE, \ + .request = UART6_TX_DMA_CHANNEL, \ + .dma_rcc = UART6_TX_DMA_RCC, \ + .dma_irq = UART6_TX_DMA_IRQ, \ + } +#endif /* UART6_DMA_TX_CONFIG */ +#endif /* BSP_UART6_TX_USING_DMA */ +#endif /* BSP_USING_UART6 */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.c b/bsp/stm32/libraries/HAL_Drivers/drv_common.c index 71175647e5..f150d81fef 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c @@ -29,10 +29,14 @@ void rt_hw_systick_init(void) { #if defined (SOC_SERIES_STM32H7) HAL_SYSTICK_Config((HAL_RCCEx_GetD1SysClockFreq()) / RT_TICK_PER_SECOND); +#elif defined (SOC_SERIES_STM32MP1) + HAL_SYSTICK_Config(HAL_RCC_GetSystemCoreClockFreq() / RT_TICK_PER_SECOND); #else HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND); #endif +#if !defined (SOC_SERIES_STM32MP1) HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); +#endif NVIC_SetPriority(SysTick_IRQn, 0xFF); } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h index cc1c3f5bde..78ee65c165 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h @@ -104,6 +104,9 @@ extern "C" { #include "h7/sdio_config.h" #include "h7/pwm_config.h" #include "h7/usbd_config.h" +#elif defined(SOC_SERIES_STM32MP1) +#include "mp1/dma_config.h" +#include "mp1/uart_config.h" #endif #ifdef __cplusplus diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h index 256068d5e1..b3815d061f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h @@ -22,7 +22,7 @@ extern "C" { || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) #define DMA_INSTANCE_TYPE DMA_Channel_TypeDef #elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\ - || defined(SOC_SERIES_STM32H7) + || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1) #define DMA_INSTANCE_TYPE DMA_Stream_TypeDef #endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */ @@ -36,7 +36,7 @@ struct dma_config { #endif #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)\ - || defined(SOC_SERIES_STM32H7) + || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1) rt_uint32_t request; #endif }; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c index 81434d73ce..fc4eb83743 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c @@ -7,6 +7,7 @@ * Date Author Notes * 2018-11-06 balanceTWK first version * 2019-04-23 WillianChan Fix GPIO serial number disorder + * 2020-06-16 thread-liu add STM32MP1 */ #include @@ -235,6 +236,23 @@ static const struct pin_irq_map pin_irq_map[] = {GPIO_PIN_13, EXTI4_15_IRQn}, {GPIO_PIN_14, EXTI4_15_IRQn}, {GPIO_PIN_15, EXTI4_15_IRQn}, +#elif defined(SOC_SERIES_STM32MP1) + {GPIO_PIN_0, EXTI0_IRQn}, + {GPIO_PIN_1, EXTI1_IRQn}, + {GPIO_PIN_2, EXTI2_IRQn}, + {GPIO_PIN_3, EXTI3_IRQn}, + {GPIO_PIN_4, EXTI4_IRQn}, + {GPIO_PIN_5, EXTI5_IRQn}, + {GPIO_PIN_6, EXTI6_IRQn}, + {GPIO_PIN_7, EXTI7_IRQn}, + {GPIO_PIN_8, EXTI8_IRQn}, + {GPIO_PIN_9, EXTI9_IRQn}, + {GPIO_PIN_10, EXTI10_IRQn}, + {GPIO_PIN_11, EXTI11_IRQn}, + {GPIO_PIN_12, EXTI12_IRQn}, + {GPIO_PIN_13, EXTI13_IRQn}, + {GPIO_PIN_14, EXTI14_IRQn}, + {GPIO_PIN_15, EXTI15_IRQn}, #else {GPIO_PIN_0, EXTI0_IRQn}, {GPIO_PIN_1, EXTI1_IRQn}, @@ -619,7 +637,7 @@ rt_inline void pin_irq_hdr(int irqno) } } -#if defined(SOC_SERIES_STM32G0) +#if defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin) { pin_irq_hdr(bit2bitno(GPIO_Pin)); @@ -670,6 +688,103 @@ void EXTI4_15_IRQHandler(void) rt_interrupt_leave(); } +#elif defined(SOC_STM32MP157A) +void EXTI0_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); + rt_interrupt_leave(); +} + +void EXTI1_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1); + rt_interrupt_leave(); +} + +void EXTI2_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2); + rt_interrupt_leave(); +} + +void EXTI3_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3); + rt_interrupt_leave(); +} + +void EXTI4_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4); + rt_interrupt_leave(); +} + +void EXTI5_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5); + rt_interrupt_leave(); +} + +void EXTI6_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6); + rt_interrupt_leave(); +} + +void EXTI7_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7); + rt_interrupt_leave(); +} + +void EXTI8_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8); + rt_interrupt_leave(); +} + +void EXTI9_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9); + rt_interrupt_leave(); +} + +void EXTI10_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10); + rt_interrupt_leave(); +} + +void EXTI11_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11); + rt_interrupt_leave(); +} + +void EXTI12_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12); + rt_interrupt_leave(); +} + +void EXTI13_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13); + rt_interrupt_leave(); +} + +void EXTI14_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_14); + rt_interrupt_leave(); +} + +void EXTI15_IRQHandler(void) { + rt_interrupt_enter(); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_15); + rt_interrupt_leave(); +} + #else void EXTI0_IRQHandler(void) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h index 98c704e972..bc0e13f63f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2018-11-06 balanceTWK first version + * 2020-06-16 thread-liu add stm32mp1 */ #ifndef __DRV_GPIO_H__ @@ -16,7 +17,11 @@ #define __STM32_PORT(port) GPIO##port##_BASE +#if defined(SOC_SERIES_STM32MP1) +#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x1000UL) )) + PIN) +#else #define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN) +#endif #define __STM32_PIN(index, gpio, gpio_index) \ { \ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index c5314426d8..02c8419b7d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -243,7 +243,7 @@ static int stm32_putc(struct rt_serial_device *serial, char c) UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC); #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \ || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \ - || defined(SOC_SERIES_STM32G4) + || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1) uart->handle.Instance->TDR = c; #else uart->handle.Instance->DR = c; @@ -264,7 +264,7 @@ static int stm32_getc(struct rt_serial_device *serial) { #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \ || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \ - || defined(SOC_SERIES_STM32G4) + || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1) ch = uart->handle.Instance->RDR & 0xff; #else ch = uart->handle.Instance->DR & 0xff; @@ -367,7 +367,7 @@ static void uart_isr(struct rt_serial_device *serial) } #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \ && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7) \ - && !defined(SOC_SERIES_STM32G4) + && !defined(SOC_SERIES_STM32G4) && !defined(SOC_SERIES_STM32MP1) if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD); @@ -873,7 +873,10 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) #if (defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G4)) && defined(DMAMUX1) /* enable DMAMUX clock for L4+ and G4 */ - __HAL_RCC_DMAMUX1_CLK_ENABLE(); + __HAL_RCC_DMAMUX1_CLK_ENABLE(); +#elif defined(SOC_SERIES_STM32MP1) + __HAL_RCC_DMAMUX_CLK_ENABLE(); + __HAL_RCC_DMA2_CLK_ENABLE(); #endif #endif @@ -895,7 +898,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) DMA_Handle->Instance = dma_config->Instance; DMA_Handle->Init.Channel = dma_config->channel; #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)\ - || defined(SOC_SERIES_STM32H7) + || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1) DMA_Handle->Instance = dma_config->Instance; DMA_Handle->Init.Request = dma_config->request; #endif @@ -916,7 +919,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) } DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM; -#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7) +#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1) DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE; #endif if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h index b6e4060288..e06f5bd77d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h @@ -23,7 +23,8 @@ int rt_hw_usart_init(void); #if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \ || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) #define DMA_INSTANCE_TYPE DMA_Channel_TypeDef -#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7) +#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) \ + || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1) #define DMA_INSTANCE_TYPE DMA_Stream_TypeDef #endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */ @@ -31,7 +32,8 @@ int rt_hw_usart_init(void); || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) \ || defined(SOC_SERIES_STM32G4) #define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG -#elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) +#elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) \ + || defined(SOC_SERIES_STM32MP1) #define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_IT #endif -- GitLab