提交 d99f95e6 编写于 作者: K Kirill A. Shutemov 提交者: Linus Torvalds

hexagon: drop _PAGE_FILE and pte_file()-related helpers

We've replaced remap_file_pages(2) implementation with emulation.  Nobody
creates non-linear mapping anymore.

This patch also increase number of bits availble for swap offset.
Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Richard Kuo <rkuo@codeaurora.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 ca5bfa7b
......@@ -61,13 +61,6 @@ extern unsigned long zero_page_mask;
#define _PAGE_DIRTY (1<<1)
#define _PAGE_ACCESSED (1<<2)
/*
* _PAGE_FILE is only meaningful if _PAGE_PRESENT is false, while
* _PAGE_DIRTY is only meaningful if _PAGE_PRESENT is true.
* So we can overload the bit...
*/
#define _PAGE_FILE _PAGE_DIRTY /* set: pagecache, unset = swap */
/*
* For now, let's say that Valid and Present are the same thing.
* Alternatively, we could say that it's the "or" of R, W, and X
......@@ -456,57 +449,36 @@ static inline int pte_exec(pte_t pte)
#define pgtable_cache_init() do { } while (0)
/*
* Swap/file PTE definitions. If _PAGE_PRESENT is zero, the rest of the
* PTE is interpreted as swap information. Depending on the _PAGE_FILE
* bit, the remaining free bits are eitehr interpreted as a file offset
* or a swap type/offset tuple. Rather than have the TLB fill handler
* test _PAGE_PRESENT, we're going to reserve the permissions bits
* and set them to all zeros for swap entries, which speeds up the
* miss handler at the cost of 3 bits of offset. That trade-off can
* be revisited if necessary, but Hexagon processor architecture and
* target applications suggest a lot of TLB misses and not much swap space.
* Swap/file PTE definitions. If _PAGE_PRESENT is zero, the rest of the PTE is
* interpreted as swap information. The remaining free bits are interpreted as
* swap type/offset tuple. Rather than have the TLB fill handler test
* _PAGE_PRESENT, we're going to reserve the permissions bits and set them to
* all zeros for swap entries, which speeds up the miss handler at the cost of
* 3 bits of offset. That trade-off can be revisited if necessary, but Hexagon
* processor architecture and target applications suggest a lot of TLB misses
* and not much swap space.
*
* Format of swap PTE:
* bit 0: Present (zero)
* bit 1: _PAGE_FILE (zero)
* bits 2-6: swap type (arch independent layer uses 5 bits max)
* bits 7-9: bits 2:0 of offset
* bits 10-12: effectively _PAGE_PROTNONE (all zero)
* bits 13-31: bits 21:3 of swap offset
*
* Format of file PTE:
* bit 0: Present (zero)
* bit 1: _PAGE_FILE (zero)
* bits 2-9: bits 7:0 of offset
* bits 10-12: effectively _PAGE_PROTNONE (all zero)
* bits 13-31: bits 26:8 of swap offset
* bits 1-5: swap type (arch independent layer uses 5 bits max)
* bits 6-9: bits 3:0 of offset
* bits 10-12: effectively _PAGE_PROTNONE (all zero)
* bits 13-31: bits 22:4 of swap offset
*
* The split offset makes some of the following macros a little gnarly,
* but there's plenty of precedent for this sort of thing.
*/
#define PTE_FILE_MAX_BITS 27
/* Used for swap PTEs */
#define __swp_type(swp_pte) (((swp_pte).val >> 2) & 0x1f)
#define __swp_type(swp_pte) (((swp_pte).val >> 1) & 0x1f)
#define __swp_offset(swp_pte) \
((((swp_pte).val >> 7) & 0x7) | (((swp_pte).val >> 10) & 0x003ffff8))
((((swp_pte).val >> 6) & 0xf) | (((swp_pte).val >> 9) & 0x7ffff0))
#define __swp_entry(type, offset) \
((swp_entry_t) { \
((type << 2) | \
((offset & 0x3ffff8) << 10) | ((offset & 0x7) << 7)) })
/* Used for file PTEs */
#define pte_file(pte) \
((pte_val(pte) & (_PAGE_FILE | _PAGE_PRESENT)) == _PAGE_FILE)
#define pte_to_pgoff(pte) \
(((pte_val(pte) >> 2) & 0xff) | ((pte_val(pte) >> 5) & 0x07ffff00))
#define pgoff_to_pte(off) \
((pte_t) { ((((off) & 0x7ffff00) << 5) | (((off) & 0xff) << 2)\
| _PAGE_FILE) })
((type << 1) | \
((offset & 0x7ffff0) << 9) | ((offset & 0xf) << 6)) })
/* Oh boy. There are a lot of possible arch overrides found in this file. */
#include <asm-generic/pgtable.h>
......
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