From 6133b4edbd12266ef9ccc3cbbfc0d5bb56e0d481 Mon Sep 17 00:00:00 2001 From: Andy Polyakov Date: Sun, 15 May 2016 15:37:46 +0200 Subject: [PATCH] ARMv8 assembly pack: add OPENSSL_cleanse. Reviewed-by: Richard Levitte --- Configurations/00-base-templates.conf | 2 +- crypto/arm64cpuid.pl | 31 +++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/Configurations/00-base-templates.conf b/Configurations/00-base-templates.conf index 0f8a2fda85..515cf00e20 100644 --- a/Configurations/00-base-templates.conf +++ b/Configurations/00-base-templates.conf @@ -245,7 +245,7 @@ }, aarch64_asm => { template => 1, - cpuid_asm_src => "armcap.c arm64cpuid.S mem_clr.c", + cpuid_asm_src => "armcap.c arm64cpuid.S", ec_asm_src => "ecp_nistz256.c ecp_nistz256-armv8.S", bn_asm_src => "bn_asm.c armv8-mont.S", aes_asm_src => "aes_core.c aes_cbc.c aesv8-armx.S vpaes-armv8.S", diff --git a/crypto/arm64cpuid.pl b/crypto/arm64cpuid.pl index b9501ebea8..c0af608142 100755 --- a/crypto/arm64cpuid.pl +++ b/crypto/arm64cpuid.pl @@ -69,6 +69,37 @@ _armv8_pmull_probe: pmull v0.1q, v0.1d, v0.1d ret .size _armv8_pmull_probe,.-_armv8_pmull_probe + +.globl OPENSSL_cleanse +.type OPENSSL_cleanse,%function +.align 5 +OPENSSL_cleanse: + cbz x1,.Lret // len==0? + cmp x1,#15 + b.hi .Lot // len>15 + nop +.Little: + strb wzr,[x0],#1 // store byte-by-byte + subs x1,x1,#1 + b.ne .Little +.Lret: ret + +.align 4 +.Lot: tst x0,#7 + b.eq .Laligned // inp is aligned + strb wzr,[x0],#1 // store byte-by-byte + sub x1,x1,#1 + b .Lot + +.align 4 +.Laligned: + str xzr,[x0],#8 // store word-by-word + sub x1,x1,#8 + tst x1,#-8 + b.ne .Laligned // len>=8 + cbnz x1,.Little // len!=0? + ret +.size OPENSSL_cleanse,.-OPENSSL_cleanse ___ print $code; -- GitLab