OcTimerLib: Support AMD ACPI PowerManagement timer

closes acidanthera/bugtracker#353

Include/IndustryStandard/CpuId.h

@@ -12,8 +12,8 @@
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 **/
 
-#ifndef CPUID_H_
-#define CPUID_H_
+#ifndef CPUID_H
+#define CPUID_H
 
 #include <Register/Cpuid.h>
 
@@ -212,4 +212,7 @@ enum {
   CpuIdCachePrefetch128    = 0xF1,  ///< 128-Byte Prefetching
 };
 
-#endif // CPUID_H_
+#define CPUID_VENDOR_INTEL  0x756E6547
+#define CPUID_VENDOR_AMD    0x68747541
+
+#endif // CPUID_H

Include/IndustryStandard/GenericIch.h

@@ -12,8 +12,8 @@
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 **/
 
-#ifndef GENERIC_ICH_H_
-#define GENERIC_ICH_H_
+#ifndef GENERIC_ICH_H
+#define GENERIC_ICH_H
 
 // GenericIchDefs  Generic ICH Definitions.
 //
@@ -50,6 +50,11 @@
 #define R_ICH_SMBUS_ACPI_CNT          R_ICH_ACPI_CNT
 #define B_ICH_SMBUS_ACPI_CNT_ACPI_EN  B_ICH_ACPI_CNT_ACPI_EN
 
+// AMD Bolton (AMD Bolton Register Reference Guide 3.03)
+
+#define R_AMD_ACPI_MMIO_BASE          0xFED80000 ///< AcpiMMioAddr (3-268)
+#define R_AMD_ACPI_MMIO_PMIO_BASE     0x300      ///< PMIO (3-268)
+#define R_AMD_ACPI_PM_TMR_BLOCK       0x64       ///< AcpiPmTmrBlk (3-289)
 
 // IchAcpiTimer  The ICH's ACPI Timer.
 
@@ -67,4 +72,4 @@
 #define PCI_ICH_SMBUS_ADDRESS(Register) \
   ((UINTN)(PCI_LIB_ADDRESS (PCI_BUS_NUMBER_ICH, PCI_DEVICE_NUMBER_ICH, PCI_FUNCTION_NUMBER_ICH_SMBUS, (Register))))
 
-#endif // GENERIC_ICH_H_
+#endif // GENERIC_ICH_H

Include/ProcessorInfo.h

@@ -12,11 +12,8 @@
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 **/
 
-#ifndef OC_PROCESSOR_INFO_H_
-#define OC_PROCESSOR_INFO_H_
-
-#define CPUID_VENDOR_INTEL  0x756E6547
-#define CPUID_VENDOR_AMD    0x68747541
+#ifndef OC_PROCESSOR_INFO_H
+#define OC_PROCESSOR_INFO_H
 
 // SandyBridge/IvyBridge bus clock is fixed at 100MHz
 
@@ -207,4 +204,4 @@ typedef enum {
   CpuPStateCoordinationHardwareAll = 0xFE
 } CPU_P_STATE_COORDINATION;
 
-#endif // OC_PROCESSOR_INFO_H_
+#endif // OC_PROCESSOR_INFO_H

Library/OcTimerLib/OcTimerLib.c

@@ -16,6 +16,7 @@
 
 #include <IndustryStandard/GenericIch.h>
 #include <IndustryStandard/Pci.h>
+#include <IndustryStandard/CpuId.h>
 
 #include <Library/BaseLib.h>
 #include <Library/DebugLib.h>
@@ -37,6 +38,7 @@ RecalculateTSC (
   )
 {
   UINT32   TimerAddr;
+  UINT32   CpuVendor;
   UINT64   Tsc0;
   UINT64   Tsc1;
   UINT32   AcpiTick0;
@@ -46,6 +48,8 @@ RecalculateTSC (
   UINT32   TimerResolution;
   EFI_TPL  PrevTpl;
 
+  TimerAddr = 0;
+
   //
   // Intel timer support.
   //
@@ -72,6 +76,24 @@ RecalculateTSC (
         DEBUG ((DEBUG_VERBOSE, "Acpi Timer Addr 0x%0x (SMB)\n", TimerAddr));
       }
     }
+  }
+
+  //
+  // AMD timer support.
+  //
+  if (TimerAddr == 0) {
+    //
+    // In an ideal world I believe we should detect AMD SMBus controller...
+    //
+    CpuVendor = 0;
+    AsmCpuid (CPUID_SIGNATURE, NULL, &CpuVendor, NULL, NULL);
+
+    if (CpuVendor == CPUID_VENDOR_AMD) {
+      TimerAddr = IoRead32 (
+        R_AMD_ACPI_MMIO_BASE + R_AMD_ACPI_MMIO_PMIO_BASE + R_AMD_ACPI_PM_TMR_BLOCK
+        );
+    }
+  }
 
   if (TimerAddr != 0) {
     mPerformanceCounterFrequency = 0;
@@ -149,7 +171,6 @@ RecalculateTSC (
       gBS->RestoreTPL (PrevTpl);
     }
   }
-  }
 
   DEBUG ((DEBUG_VERBOSE, "TscFrequency %lld\n", mPerformanceCounterFrequency));
 

Library/OcTimerLib/OcTimerLib.inf

@@ -37,6 +37,7 @@
 [Packages]
   OcSupportPkg/OcSupportPkg.dec
   MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
 
 [LibraryClasses]
   PciLib