diff --git a/bsp/stm32f10x/drivers/gpio.c b/bsp/stm32f10x/drivers/gpio.c index 5010481a1514c1aee75764bc028a6c34a74ea625..fd64151b7bc292f32462cb09bd2bf4177030f23a 100755 --- a/bsp/stm32f10x/drivers/gpio.c +++ b/bsp/stm32f10x/drivers/gpio.c @@ -653,7 +653,8 @@ rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) return RT_EOK; } -rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin) +rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin, + rt_uint32_t enabled) { const struct pin_index *index; const struct pin_irq_map *irqmap; @@ -668,74 +669,70 @@ rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin) { return RT_ENOSYS; } - irqindex = bit2bitno(index->pin); - if(irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) - { - return RT_ENOSYS; - } - - level = rt_hw_interrupt_disable(); - if(pin_irq_hdr_tab[irqindex].pin == -1) + if(enabled == PIN_IRQ_ENABLE) { + irqindex = bit2bitno(index->pin); + if(irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) + { + return RT_ENOSYS; + } + level = rt_hw_interrupt_disable(); + if(pin_irq_hdr_tab[irqindex].pin == -1) + { + rt_hw_interrupt_enable(level); + return RT_ENOSYS; + } + irqmap = &pin_irq_map[irqindex]; + /* GPIO Periph clock enable */ + RCC_APB2PeriphClockCmd(index->rcc, ENABLE); + /* Configure GPIO_InitStructure */ + GPIO_InitStructure.GPIO_Pin = index->pin; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(index->gpio, &GPIO_InitStructure); + + NVIC_InitStructure.NVIC_IRQChannel= irqmap->irqno; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority= 2; + NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE; + NVIC_Init(&NVIC_InitStructure); + + EXTI_InitStructure.EXTI_Line = irqmap->irqbit; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + switch(pin_irq_hdr_tab[irqindex].mode) + { + case PIN_IRQ_MODE_RISING: + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + break; + case PIN_IRQ_MODE_FALLING: + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; + break; + case PIN_IRQ_MODE_RISING_FALLING: + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling; + break; + } + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); rt_hw_interrupt_enable(level); - return RT_ENOSYS; } - irqmap = &pin_irq_map[irqindex]; - /* GPIO Periph clock enable */ - RCC_APB2PeriphClockCmd(index->rcc, ENABLE); - /* Configure GPIO_InitStructure */ - GPIO_InitStructure.GPIO_Pin = index->pin; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(index->gpio, &GPIO_InitStructure); - - NVIC_InitStructure.NVIC_IRQChannel= irqmap->irqno; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 2; - NVIC_InitStructure.NVIC_IRQChannelSubPriority= 2; - NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE; - NVIC_Init(&NVIC_InitStructure); - - EXTI_InitStructure.EXTI_Line = irqmap->irqbit; - EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - switch(pin_irq_hdr_tab[irqindex].mode) - { - case PIN_IRQ_MODE_RISING: - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; - break; - case PIN_IRQ_MODE_FALLING: - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; - break; - case PIN_IRQ_MODE_RISING_FALLING: - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling; - break; - } - EXTI_InitStructure.EXTI_LineCmd = ENABLE; - EXTI_Init(&EXTI_InitStructure); - rt_hw_interrupt_enable(level); - - return RT_EOK; -} -rt_err_t stm32_pin_irq_disable(struct rt_device *device, rt_base_t pin) -{ - const struct pin_index *index; - const struct pin_irq_map *irqmap; - EXTI_InitTypeDef EXTI_InitStructure; - - index = get_pin(pin); - if (index == RT_NULL) + else if(enabled == PIN_IRQ_DISABLE) { - return RT_ENOSYS; + irqmap = get_pin_irq_map(index->pin); + if(irqmap == RT_NULL) + { + return RT_ENOSYS; + } + EXTI_InitStructure.EXTI_Line = irqmap->irqbit; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + EXTI_InitStructure.EXTI_LineCmd = DISABLE; + EXTI_Init(&EXTI_InitStructure); } - irqmap = get_pin_irq_map(index->pin); - if(irqmap == RT_NULL) + else { return RT_ENOSYS; } - EXTI_InitStructure.EXTI_Line = irqmap->irqbit; - EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; - EXTI_InitStructure.EXTI_LineCmd = DISABLE; - EXTI_Init(&EXTI_InitStructure); + return RT_EOK; } const static struct rt_pin_ops _stm32_pin_ops = @@ -746,7 +743,6 @@ const static struct rt_pin_ops _stm32_pin_ops = stm32_pin_attach_irq, stm32_pin_dettach_irq, stm32_pin_irq_enable, - stm32_pin_irq_disable }; int stm32_hw_pin_init(void) diff --git a/components/drivers/include/drivers/pin.h b/components/drivers/include/drivers/pin.h index ac35ed3baa1c0f5177178b89436f11958b29fbde..a76798e2849d369ff3f1c6735d64423c0aad23de 100644 --- a/components/drivers/include/drivers/pin.h +++ b/components/drivers/include/drivers/pin.h @@ -50,6 +50,9 @@ struct rt_device_pin #define PIN_IRQ_MODE_FALLING 0x01 #define PIN_IRQ_MODE_RISING_FALLING 0x02 +#define PIN_IRQ_DISABLE 0x00 +#define PIN_IRQ_ENABLE 0x01 + #define PIN_IRQ_PIN_NONE -1 struct rt_device_pin_mode @@ -64,8 +67,8 @@ struct rt_device_pin_status }; struct rt_pin_irq_hdr { - rt_int32_t pin; - rt_uint32_t mode; + rt_int16_t pin; + rt_uint16_t mode; void (*hdr)(void *args); void *args; }; @@ -79,8 +82,7 @@ struct rt_pin_ops rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args); rt_err_t (*pin_dettach_irq)(struct rt_device *device, rt_int32_t pin); - rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin); - rt_err_t (*pin_irq_disable)(struct rt_device *device, rt_base_t pin); + rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled); }; int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data); @@ -91,8 +93,7 @@ int rt_pin_read(rt_base_t pin); rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args); rt_err_t rt_pin_dettach_irq(rt_int32_t pin); -rt_err_t pin_irq_enable(rt_base_t pin); -rt_err_t pin_irq_disable(rt_base_t pin); +rt_err_t pin_irq_enable(rt_base_t pin, rt_uint32_t enabled); int rt_device_pin_irq_register(const char *name, const struct rt_pin_ops *ops, void *user_data); diff --git a/components/drivers/misc/pin.c b/components/drivers/misc/pin.c index a3232b8e03710c136d4b51b9b54c4e769ab3e771..fb139575b4f43440ca399905476f54ef4f62391d 100644 --- a/components/drivers/misc/pin.c +++ b/components/drivers/misc/pin.c @@ -117,21 +117,12 @@ rt_err_t rt_pin_dettach_irq(rt_int32_t pin) } return RT_ENOSYS; } -rt_err_t pin_irq_enable(rt_base_t pin) +rt_err_t pin_irq_enable(rt_base_t pin, rt_uint32_t enabled) { RT_ASSERT(_hw_pin.ops != RT_NULL); if(_hw_pin.ops->pin_irq_enable) { - return _hw_pin.ops->pin_irq_enable(&_hw_pin.parent, pin); - } - return RT_ENOSYS; -} -rt_err_t pin_irq_disable(rt_base_t pin) -{ - RT_ASSERT(_hw_pin.ops != RT_NULL); - if(_hw_pin.ops->pin_irq_disable) - { - return _hw_pin.ops->pin_irq_disable(&_hw_pin.parent, pin); + return _hw_pin.ops->pin_irq_enable(&_hw_pin.parent, pin, enabled); } return RT_ENOSYS; }