diff --git a/.github/workflows/action.yml b/.github/workflows/action.yml
index 8f3cf566a5348752dda60e706c7a23a9e936535e..ab48262224902e15e2a70dd0dd84a6eae69d8917 100644
--- a/.github/workflows/action.yml
+++ b/.github/workflows/action.yml
@@ -104,6 +104,7 @@ jobs:
- {RTT_BSP: "stm32/stm32h743-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32h743-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32h747-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
+ - {RTT_BSP: "stm32/stm32h750-artpi-h750", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l4r9-st-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l010-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l053-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
diff --git a/bsp/stm32/stm32h750-artpi-h750/.config b/bsp/stm32/stm32h750-artpi-h750/.config
new file mode 100644
index 0000000000000000000000000000000000000000..c31157512a59f984afef0f78b970a7d54c8defb9
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/.config
@@ -0,0 +1,466 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=1000
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+# CONFIG_RT_USING_TIMER_SOFT is not set
+CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_COLOR is not set
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+# CONFIG_RT_USING_MEMHEAP is not set
+# CONFIG_RT_USING_NOHEAP is not set
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
+CONFIG_RT_VER_NUM=0x40003
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M7=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+CONFIG_FINSH_USING_MSH_ONLY=y
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+# CONFIG_RT_USING_LIBC is not set
+# CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_LIBC_USING_TIME=y
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_LWP is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32H7=y
+
+#
+# Hardware Drivers Config
+#
+CONFIG_SOC_STM32H750XB=y
+
+#
+# Onboard Peripheral Drivers
+#
+# CONFIG_BSP_USING_QSPI_FLASH is not set
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+CONFIG_BSP_USING_UART=y
+CONFIG_BSP_USING_UART3=y
+CONFIG_BSP_USING_UART4=y
+# CONFIG_BSP_USING_SDIO is not set
+# CONFIG_BSP_USING_CRC is not set
+# CONFIG_BSP_USING_RNG is not set
+# CONFIG_BSP_USING_UDID is not set
+
+#
+# Board extended module Drivers
+#
diff --git a/bsp/stm32/stm32h750-artpi-h750/.gitignore b/bsp/stm32/stm32h750-artpi-h750/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..7221bde019df6157cbf9e42ef5ab8a78420e3b68
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/.gitignore
@@ -0,0 +1,42 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h
diff --git a/bsp/stm32/stm32h750-artpi-h750/EventRecorderStub.scvd b/bsp/stm32/stm32h750-artpi-h750/EventRecorderStub.scvd
new file mode 100644
index 0000000000000000000000000000000000000000..2956b29683898915efa436cc948384a2c431dc31
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/EventRecorderStub.scvd
@@ -0,0 +1,9 @@
+
+
+
+
+
+
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/Kconfig b/bsp/stm32/stm32h750-artpi-h750/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..8cbc7b71a8c0cf95b0cefa5f35f19353215eb570
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/Kconfig
@@ -0,0 +1,21 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+ string
+ option env="BSP_ROOT"
+ default "."
+
+config RTT_DIR
+ string
+ option env="RTT_ROOT"
+ default "../../.."
+
+config PKGS_DIR
+ string
+ option env="PKGS_ROOT"
+ default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "../libraries/Kconfig"
+source "board/Kconfig"
diff --git a/bsp/stm32/stm32h750-artpi-h750/README.md b/bsp/stm32/stm32h750-artpi-h750/README.md
new file mode 100644
index 0000000000000000000000000000000000000000..3c598c2845403402026c07d22adc7567fb3e9b31
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/README.md
@@ -0,0 +1,128 @@
+# STM32H750-artpi 开发板 BSP 说明
+
+## 简介
+
+本文档 为 STM32H750-ART-PI 开发板提供的 BSP (板级支持包) 说明。
+
+主要内容如下:
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。在进阶使用指南章节,将会介绍更多高级功能,帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+STM32H750 是RTTHREAD推出的一款基于 ARM Cortex-M7 内核的开发板,最高主频为 480Mhz,该开发板具有丰富的板载资源,可以充分发挥 STM32H750 的芯片性能。
+
+开发板外观如下图所示:
+
+![board](figures/board.jpg)
+
+该开发板常用 **板载资源** 如下:
+
+- MCU:STM32H750,主频 480MHz,128KB FLASH, 1MB RAM
+- 常用接口:USB 转串口、USB OTG、RGB888等
+- 调试接口,标准 ST-LINK
+
+开发板更多详细信息请参考[H750-ART-PI](https://www.rt-thread.org/product/153.html)。
+
+官方仓库[sdk-bsp-stm32h750-realthread-artpi](https://github.com/RT-Thread-Studio/sdk-bsp-stm32h750-realthread-artpi)
+
+官方主页 [ART-PI](https://art-pi.gitee.io/website)
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下:
+
+| **板载外设** | **支持情况** | **备注** |
+| :----------- | :----------: | :------------------------ |
+| LED | 待支持 | 一个红灯,一个蓝灯 |
+| BUTTON | 待支持 | 一个用户可控button |
+| QSPI FLASH | 待支持 | 1MB w25q64 QSPI接口FLASH |
+| SPI FLASH | 待支持 | 2MB w25q128 SPI FLASH |
+| SDCARD | 待支持 | sdcard接口 |
+| AP6212 | 待支持 | WIFI & BLUETOOTH |
+| LCD RG888 | 待支持 | 显示屏接口 |
+| **片上外设** | **支持情况** | **备注** |
+| GPIO | 支持 | |
+| UART | 支持 | UART4 UART3 |
+| SPI | 支持 | SPI |
+| QSPI | 支持 | |
+| | | |
+
+
+## 使用说明
+
+使用说明分为如下两个章节:
+
+- 快速上手
+
+ 本章节是为刚接触 RT-Thread 的新手准备的使用说明,遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上,看到实验效果 。
+
+- 进阶使用
+
+ 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置,可以开启更多板载资源,实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 MDK5 和 IAR 工程,并且支持 GCC 开发环境。下面以 MDK5 开发环境为例,介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用数据线连接开发板到 PC,将 TVCC 接到 3.3V。使用 usb 转串口工具连接 TTLRX 和 TTLTX。
+
+#### 编译下载
+
+双击 project.uvprojx 文件,打开 MDK5 工程,编译并下载程序到开发板。
+
+> 工程默认配置使用 ST_LINK 仿真器下载程序,在通过 ST_LINK 连接开发板的基础上,点击下载按钮即可下载程序到开发板
+
+#### 运行结果
+
+下载程序成功之后,系统会自动运行,LED闪烁。
+
+连接开发板对应串口到 PC , 在终端工具里打开相应的串口(115200-8-1-N),复位设备后,可以看到 RT-Thread 的输出信息:
+
+```bash
+ \ | /
+- RT - Thread Operating System
+ / | \ 4.0.2 build Oct 25 2019
+ 2006 - 2019 Copyright by rt-thread team
+msh >
+```
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口1 的功能,如果需使用更多高级功能,需要利用 ENV 工具对BSP 进行配置,步骤如下:
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程,配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
+
+本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
+
+## 注意事项
+
+- 调试串口为串口4 映射说明
+
+ PI9 ------> USART4_RX
+
+ PA0 ------> USART4_TX
+
+## 联系人信息
+
+ART-Pi 是一个开源创意硬件平台,期待有更多的小伙伴能一起发现更多的乐趣,在使用过程中若您有任何的想法和建议,建议您通过以下方式来联系到我们。
+
+RT-Thread [社区论坛](https://club.rt-thread.org/)。
+
+- ART-Pi 官方交流 QQ 群(1016035998)。
+
+## 贡献代码
+
+如果您对 ART-Pi 感兴趣,并有一些好玩的项目愿意与大家分享,欢迎给我们贡献代码,您可以参考 [ART-Pi 代码贡献手册](https://github.com/RT-Thread-Studio/sdk-bsp-stm32h750-realthread-artpi/blob/master/documents/UM5004-RT-Thread ART-Pi 代码贡献手册.md) 。
\ No newline at end of file
diff --git a/bsp/stm32/stm32h750-artpi-h750/SConscript b/bsp/stm32/stm32h750-artpi-h750/SConscript
new file mode 100644
index 0000000000000000000000000000000000000000..c7ef7659ecea92b1dd9b71a97736a8552ee02551
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/SConscript
@@ -0,0 +1,14 @@
+# for module compiling
+import os
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+ path = os.path.join(cwd, d)
+ if os.path.isfile(os.path.join(path, 'SConscript')):
+ objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
diff --git a/bsp/stm32/stm32h750-artpi-h750/SConstruct b/bsp/stm32/stm32h750-artpi-h750/SConstruct
new file mode 100644
index 0000000000000000000000000000000000000000..48974d990f93100c8fc7a4b64328082a56cadd72
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/SConstruct
@@ -0,0 +1,60 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+ RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+ RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+ from building import *
+except:
+ print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+ print(RTT_ROOT)
+ exit(-1)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+ AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+ CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+ AR = rtconfig.AR, ARFLAGS = '-rc',
+ CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+ LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+ env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+ env.Replace(ARFLAGS = [''])
+ env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+ libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+ libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+stm32_library = 'STM32H7xx_HAL'
+rtconfig.BSP_LIBRARY_TYPE = stm32_library
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)
diff --git a/bsp/stm32/stm32h750-artpi-h750/applications/SConscript b/bsp/stm32/stm32h750-artpi-h750/applications/SConscript
new file mode 100644
index 0000000000000000000000000000000000000000..10deb3f896ba4d1b9cd87ddbcbfb18a4b572aee4
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/applications/SConscript
@@ -0,0 +1,12 @@
+import rtconfig
+from building import *
+
+cwd = GetCurrentDir()
+CPPPATH = [cwd, str(Dir('#'))]
+src = Split("""
+main.c
+""")
+
+group = DefineGroup('Applications', src, depend = [''])
+
+Return('group')
diff --git a/bsp/stm32/stm32h750-artpi-h750/applications/main.c b/bsp/stm32/stm32h750-artpi-h750/applications/main.c
new file mode 100644
index 0000000000000000000000000000000000000000..6ab088b624072d242e6ab4d417b7d237f6459864
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/applications/main.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2021-03-17 supperthomas first version
+ */
+
+#include
+#include
+#include
+
+/* defined the LED0 pin: PI8 */
+#define LED0_PIN GET_PIN(I, 8)
+
+int main(void)
+{
+ int count = 1;
+ /* set LED0 pin mode to output */
+ rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
+
+ while (count++)
+ {
+ rt_pin_write(LED0_PIN, PIN_HIGH);
+ rt_thread_mdelay(500);
+ rt_pin_write(LED0_PIN, PIN_LOW);
+ rt_thread_mdelay(500);
+ }
+ return RT_EOK;
+}
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Inc/main.h b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Inc/main.h
new file mode 100644
index 0000000000000000000000000000000000000000..4677beb2d962e4d4eccb2d61378d99f927364dc5
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Inc/main.h
@@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h
new file mode 100644
index 0000000000000000000000000000000000000000..7f31669688672788432751b96e3d0c1b344a4a1a
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h
@@ -0,0 +1,511 @@
+/**
+ ******************************************************************************
+ * @file stm32h7xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7xx_HAL_CONF_H
+#define STM32H7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+
+ /* #define HAL_ADC_MODULE_ENABLED */
+/* #define HAL_FDCAN_MODULE_ENABLED */
+/* #define HAL_FMAC_MODULE_ENABLED */
+/* #define HAL_CEC_MODULE_ENABLED */
+/* #define HAL_COMP_MODULE_ENABLED */
+/* #define HAL_CORDIC_MODULE_ENABLED */
+/* #define HAL_CRC_MODULE_ENABLED */
+/* #define HAL_CRYP_MODULE_ENABLED */
+/* #define HAL_DAC_MODULE_ENABLED */
+/* #define HAL_DCMI_MODULE_ENABLED */
+/* #define HAL_DMA2D_MODULE_ENABLED */
+/* #define HAL_ETH_MODULE_ENABLED */
+/* #define HAL_NAND_MODULE_ENABLED */
+/* #define HAL_NOR_MODULE_ENABLED */
+/* #define HAL_OTFDEC_MODULE_ENABLED */
+/* #define HAL_SRAM_MODULE_ENABLED */
+/* #define HAL_SDRAM_MODULE_ENABLED */
+/* #define HAL_HASH_MODULE_ENABLED */
+/* #define HAL_HRTIM_MODULE_ENABLED */
+/* #define HAL_HSEM_MODULE_ENABLED */
+/* #define HAL_GFXMMU_MODULE_ENABLED */
+/* #define HAL_JPEG_MODULE_ENABLED */
+/* #define HAL_OPAMP_MODULE_ENABLED */
+/* #define HAL_OSPI_MODULE_ENABLED */
+/* #define HAL_OSPI_MODULE_ENABLED */
+/* #define HAL_I2S_MODULE_ENABLED */
+/* #define HAL_SMBUS_MODULE_ENABLED */
+/* #define HAL_IWDG_MODULE_ENABLED */
+/* #define HAL_LPTIM_MODULE_ENABLED */
+/* #define HAL_LTDC_MODULE_ENABLED */
+/* #define HAL_QSPI_MODULE_ENABLED */
+/* #define HAL_RNG_MODULE_ENABLED */
+/* #define HAL_RTC_MODULE_ENABLED */
+/* #define HAL_SAI_MODULE_ENABLED */
+/* #define HAL_SD_MODULE_ENABLED */
+/* #define HAL_MMC_MODULE_ENABLED */
+/* #define HAL_SPDIFRX_MODULE_ENABLED */
+/* #define HAL_SPI_MODULE_ENABLED */
+/* #define HAL_SWPMI_MODULE_ENABLED */
+/* #define HAL_TIM_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED */
+/* #define HAL_IRDA_MODULE_ENABLED */
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED */
+/* #define HAL_PCD_MODULE_ENABLED */
+/* #define HAL_HCD_MODULE_ENABLED */
+/* #define HAL_DFSDM_MODULE_ENABLED */
+/* #define HAL_DSI_MODULE_ENABLED */
+/* #define HAL_JPEG_MODULE_ENABLED */
+/* #define HAL_MDIOS_MODULE_ENABLED */
+/* #define HAL_PSSI_MODULE_ENABLED */
+/* #define HAL_DTS_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_MDMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_HSEM_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal oscillator (CSI) default value.
+ * This value is the default CSI value after Reset.
+ */
+#if !defined (CSI_VALUE)
+ #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* CSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+
+/**
+ * @brief External clock source for I2S peripheral
+ * This value is used by the I2S HAL module to compute the I2S clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+ #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
+#define USE_RTOS 0U
+#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
+#define USE_SPI_CRC 0U /*!< use CRC in SPI */
+
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
+#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
+#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
+#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
+#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
+#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
+#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */
+#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
+#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
+#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
+#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
+#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
+#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
+#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
+#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
+#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */
+#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
+#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
+#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
+#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
+
+/* ########################### Ethernet Configuration ######################### */
+#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
+#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */
+
+#define ETH_MAC_ADDR0 ((uint8_t)0x02)
+#define ETH_MAC_ADDR1 ((uint8_t)0x00)
+#define ETH_MAC_ADDR2 ((uint8_t)0x00)
+#define ETH_MAC_ADDR3 ((uint8_t)0x00)
+#define ETH_MAC_ADDR4 ((uint8_t)0x00)
+#define ETH_MAC_ADDR5 ((uint8_t)0x00)
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32h7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32h7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32h7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_MDMA_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdma.h"
+#endif /* HAL_MDMA_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32h7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+ #include "stm32h7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+ #include "stm32h7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32h7xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32h7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+ #include "stm32h7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32h7xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32h7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32h7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+ #include "stm32h7xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32h7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32h7xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+ #include "stm32h7xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32h7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32h7xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32h7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32h7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+ #include "stm32h7xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+ #include "stm32h7xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+ #include "stm32h7xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+ #include "stm32h7xx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32h7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32h7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+ #include "stm32h7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+ #include "stm32h7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32h7xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32h7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32h7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32h7xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_OSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_ospi.h"
+#endif /* HAL_OSPI_MODULE_ENABLED */
+
+#ifdef HAL_OTFDEC_MODULE_ENABLED
+#include "stm32h7xx_hal_otfdec.h"
+#endif /* HAL_OTFDEC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32h7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+ #include "stm32h7xx_hal_ramecc.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32h7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32h7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32h7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32h7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+ #include "stm32h7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32h7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+ #include "stm32h7xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32h7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32h7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32h7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32h7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32h7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32h7xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+ #include "stm32h7xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+ #include "stm32h7xx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7xx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c
new file mode 100644
index 0000000000000000000000000000000000000000..77a19bb14ba6bd767c9e63a6c3ba1b25ecfd82bc
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c
@@ -0,0 +1,226 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : stm32h7xx_hal_msp.c
+ * Description : This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(huart->Instance==UART4)
+ {
+ /* USER CODE BEGIN UART4_MspInit 0 */
+
+ /* USER CODE END UART4_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_UART4_CLK_ENABLE();
+
+ __HAL_RCC_GPIOI_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**UART4 GPIO Configuration
+ PI9 ------> UART4_RX
+ PA0 ------> UART4_TX
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_9;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
+ HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* UART4 interrupt Init */
+ HAL_NVIC_SetPriority(UART4_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(UART4_IRQn);
+ /* USER CODE BEGIN UART4_MspInit 1 */
+
+ /* USER CODE END UART4_MspInit 1 */
+ }
+ else if(huart->Instance==USART3)
+ {
+ /* USER CODE BEGIN USART3_MspInit 0 */
+
+ /* USER CODE END USART3_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_USART3_CLK_ENABLE();
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ /**USART3 GPIO Configuration
+ PB10 ------> USART3_TX
+ PB11 ------> USART3_RX
+ PD11 ------> USART3_CTS
+ PD12 ------> USART3_RTS
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /* USART3 interrupt Init */
+ HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(USART3_IRQn);
+
+ NVIC_EnableIRQ(USART3_IRQn);
+ /* USER CODE BEGIN USART3_MspInit 1 */
+
+ /* USER CODE END USART3_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+ if(huart->Instance==UART4)
+ {
+ /* USER CODE BEGIN UART4_MspDeInit 0 */
+
+ /* USER CODE END UART4_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_UART4_CLK_DISABLE();
+
+ /**UART4 GPIO Configuration
+ PI9 ------> UART4_RX
+ PA0 ------> UART4_TX
+ */
+ HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9);
+
+ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0);
+
+ /* UART4 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(UART4_IRQn);
+ /* USER CODE BEGIN UART4_MspDeInit 1 */
+
+ /* USER CODE END UART4_MspDeInit 1 */
+ }
+ else if(huart->Instance==USART3)
+ {
+ /* USER CODE BEGIN USART3_MspDeInit 0 */
+
+ /* USER CODE END USART3_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART3_CLK_DISABLE();
+
+ /**USART3 GPIO Configuration
+ PB10 ------> USART3_TX
+ PB11 ------> USART3_RX
+ PD11 ------> USART3_CTS
+ PD12 ------> USART3_RTS
+ */
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11);
+
+ HAL_GPIO_DeInit(GPIOD, GPIO_PIN_11|GPIO_PIN_12);
+
+ /* USART3 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(USART3_IRQn);
+ /* USER CODE BEGIN USART3_MspDeInit 1 */
+
+ /* USER CODE END USART3_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/CubeMX_Config.ioc
new file mode 100644
index 0000000000000000000000000000000000000000..a71fd184025c3ca99ee3221cc6cdc411616ddca7
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/CubeMX_Config/CubeMX_Config.ioc
@@ -0,0 +1,185 @@
+#MicroXplorer Configuration settings - do not modify
+File.Version=6
+GPIO.groupedBy=Group By Peripherals
+KeepUserPlacement=false
+Mcu.Family=STM32H7
+Mcu.IP0=CORTEX_M7
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IP4=UART4
+Mcu.IP5=USART3
+Mcu.IPNb=6
+Mcu.Name=STM32H750XBHx
+Mcu.Package=TFBGA240
+Mcu.Pin0=PI9
+Mcu.Pin1=PI8
+Mcu.Pin10=VP_SYS_VS_Systick
+Mcu.Pin2=PI11
+Mcu.Pin3=PH1-OSC_OUT (PH1)
+Mcu.Pin4=PH0-OSC_IN (PH0)
+Mcu.Pin5=PA0
+Mcu.Pin6=PB10
+Mcu.Pin7=PB11
+Mcu.Pin8=PD11
+Mcu.Pin9=PD12
+Mcu.PinsNb=11
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32H750XBHx
+MxCube.Version=6.0.1
+MxDb.Version=DB.6.0.0
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.UART4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+PA0.Locked=true
+PA0.Mode=Asynchronous
+PA0.Signal=UART4_TX
+PB10.Locked=true
+PB10.Mode=Asynchronous
+PB10.Signal=USART3_TX
+PB11.Locked=true
+PB11.Mode=Asynchronous
+PB11.Signal=USART3_RX
+PD11.Mode=CTS_RTS
+PD11.Signal=USART3_CTS
+PD12.Mode=CTS_RTS
+PD12.Signal=USART3_RTS
+PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
+PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
+PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
+PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
+PI11.Locked=true
+PI11.Signal=GPIO_Output
+PI8.Locked=true
+PI8.Signal=GPIO_Output
+PI9.Locked=true
+PI9.Mode=Asynchronous
+PI9.Signal=UART4_RX
+PinOutPanel.CurrentBGAView=Top
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32H750XBHx
+ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.8.0
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=1
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CubeMX_Config.ioc
+ProjectManager.ProjectName=CubeMX_Config
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=MDK-ARM V5
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_UART4_Init-UART4-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+RCC.ADCFreq_Value=400000000
+RCC.AHB12Freq_Value=240000000
+RCC.AHB4Freq_Value=240000000
+RCC.APB1Freq_Value=120000000
+RCC.APB2Freq_Value=120000000
+RCC.APB3Freq_Value=120000000
+RCC.APB4Freq_Value=120000000
+RCC.AXIClockFreq_Value=240000000
+RCC.CECFreq_Value=32000
+RCC.CKPERFreq_Value=64000000
+RCC.CortexFreq_Value=480000000
+RCC.CpuClockFreq_Value=480000000
+RCC.D1CPREFreq_Value=480000000
+RCC.D1PPRE=RCC_APB3_DIV2
+RCC.D2PPRE1=RCC_APB1_DIV2
+RCC.D2PPRE2=RCC_APB2_DIV2
+RCC.D3PPRE=RCC_APB4_DIV2
+RCC.DFSDMACLkFreq_Value=480000000
+RCC.DFSDMFreq_Value=120000000
+RCC.DIVM1=5
+RCC.DIVM2=2
+RCC.DIVM3=5
+RCC.DIVN1=192
+RCC.DIVN2=64
+RCC.DIVN3=160
+RCC.DIVP1Freq_Value=480000000
+RCC.DIVP2Freq_Value=400000000
+RCC.DIVP3Freq_Value=400000000
+RCC.DIVQ1Freq_Value=480000000
+RCC.DIVQ2Freq_Value=400000000
+RCC.DIVQ3Freq_Value=400000000
+RCC.DIVR1Freq_Value=480000000
+RCC.DIVR2Freq_Value=400000000
+RCC.DIVR3Freq_Value=400000000
+RCC.FDCANFreq_Value=480000000
+RCC.FMCFreq_Value=240000000
+RCC.FamilyName=M
+RCC.HCLK3ClockFreq_Value=240000000
+RCC.HCLKFreq_Value=240000000
+RCC.HPRE=RCC_HCLK_DIV2
+RCC.HRTIMFreq_Value=240000000
+RCC.I2C123Freq_Value=120000000
+RCC.I2C4Freq_Value=120000000
+RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
+RCC.LPTIM1Freq_Value=120000000
+RCC.LPTIM2Freq_Value=120000000
+RCC.LPTIM345Freq_Value=120000000
+RCC.LPUART1Freq_Value=120000000
+RCC.LTDCFreq_Value=400000000
+RCC.MCO1PinFreq_Value=64000000
+RCC.MCO2PinFreq_Value=480000000
+RCC.PLL2FRACN=0
+RCC.PLL3FRACN=0
+RCC.PLLFRACN=0
+RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
+RCC.QSPIFreq_Value=240000000
+RCC.RNGFreq_Value=48000000
+RCC.RTCFreq_Value=32000
+RCC.SAI1Freq_Value=480000000
+RCC.SAI23Freq_Value=480000000
+RCC.SAI4AFreq_Value=480000000
+RCC.SAI4BFreq_Value=480000000
+RCC.SDMMCFreq_Value=480000000
+RCC.SPDIFRXFreq_Value=480000000
+RCC.SPI123Freq_Value=480000000
+RCC.SPI45Freq_Value=120000000
+RCC.SPI6Freq_Value=120000000
+RCC.SWPMI1Freq_Value=120000000
+RCC.SYSCLKFreq_VALUE=480000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.Tim1OutputFreq_Value=240000000
+RCC.Tim2OutputFreq_Value=240000000
+RCC.TraceFreq_Value=64000000
+RCC.USART16Freq_Value=120000000
+RCC.USART234578Freq_Value=120000000
+RCC.USBFreq_Value=480000000
+RCC.VCO1OutputFreq_Value=960000000
+RCC.VCO2OutputFreq_Value=800000000
+RCC.VCO3OutputFreq_Value=800000000
+RCC.VCOInput1Freq_Value=5000000
+RCC.VCOInput2Freq_Value=12500000
+RCC.VCOInput3Freq_Value=5000000
+USART3.IPParameters=VirtualMode-Asynchronous
+USART3.VirtualMode-Asynchronous=VM_ASYNC
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/Kconfig b/bsp/stm32/stm32h750-artpi-h750/board/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..2d07f8c8e3c24416431a9c75c5e62f4cb0d46016
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/Kconfig
@@ -0,0 +1,58 @@
+menu "Hardware Drivers Config"
+
+config SOC_STM32H750XB
+ bool
+ select SOC_SERIES_STM32H7
+ select RT_USING_COMPONENTS_INIT
+ select RT_USING_USER_MAIN
+ default y
+
+menu "Onboard Peripheral Drivers"
+
+ config BSP_USING_QSPI_FLASH
+ bool "Enable QSPI FLASH (W25Q64)"
+ select BSP_USING_QSPI
+ select RT_USING_SFUD
+ select RT_SFUD_USING_QSPI
+ default n
+endmenu
+
+menu "On-chip Peripheral Drivers"
+
+ config BSP_USING_GPIO
+ bool "Enable GPIO"
+ select RT_USING_PIN
+ default y
+
+ menuconfig BSP_USING_UART
+ bool "Enable UART"
+ default y
+ select RT_USING_SERIAL
+ if BSP_USING_UART
+ config BSP_USING_UART3
+ bool "Enable UART3"
+ default y
+
+ config BSP_USING_UART4
+ bool "Enable UART4"
+ default y
+ endif
+
+
+
+ config BSP_USING_SDIO
+ bool "Enable SDIO"
+ select RT_USING_SDIO
+ select RT_USING_DFS
+ default n
+
+
+ source "../libraries/HAL_Drivers/Kconfig"
+
+endmenu
+
+menu "Board extended module Drivers"
+
+endmenu
+
+endmenu
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/SConscript b/bsp/stm32/stm32h750-artpi-h750/board/SConscript
new file mode 100644
index 0000000000000000000000000000000000000000..b914230f3a7cca852a75a14c44372c636606f203
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/SConscript
@@ -0,0 +1,31 @@
+import rtconfig
+from building import *
+
+cwd = GetCurrentDir()
+
+# add the general drivers.
+src = Glob('board.c')
+src += Glob('CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c')
+
+if GetDepend(['BSP_USING_QSPI_FLASH']):
+ src += Glob('ports/drv_qspi_flash.c')
+
+if GetDepend('BSP_USING_SPI_LCD'):
+ src = src + ['ports/drv_lcd.c']
+
+path = [cwd]
+path += [cwd + '/CubeMX_Config/Core/Inc']
+
+if rtconfig.CROSS_TOOL == 'gcc':
+ src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h750xx.s']
+elif rtconfig.CROSS_TOOL == 'keil':
+ src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h750xx.s']
+elif rtconfig.CROSS_TOOL == 'iar':
+ src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h750xx.s']
+
+# STM32H743xx || STM32H750xx || STM32F753xx
+# You can select chips from the list above
+CPPDEFINES = ['STM32H750xx']
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+Return('group')
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/board.c b/bsp/stm32/stm32h750-artpi-h750/board/board.c
new file mode 100644
index 0000000000000000000000000000000000000000..b00158da682a1f16ab77b6c0a938bb50b19960dc
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/board.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2019-10-26 zylx first version
+ */
+
+#include "board.h"
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+ /** Supply configuration update enable
+ */
+ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+
+ while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLM = 5;
+ RCC_OscInitStruct.PLL.PLLN = 192;
+ RCC_OscInitStruct.PLL.PLLP = 2;
+ RCC_OscInitStruct.PLL.PLLQ = 2;
+ RCC_OscInitStruct.PLL.PLLR = 2;
+ RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
+ RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+ RCC_OscInitStruct.PLL.PLLFRACN = 0;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
+ |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+ RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+ RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4;
+ PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/board.h b/bsp/stm32/stm32h750-artpi-h750/board/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..5c00854d412e482e33a11fe168b0e01eabaece26
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/board.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2018-11-5 SummerGift first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include
+#include
+#include "drv_common.h"
+#include "drv_gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
+#define STM32_FLASH_SIZE (128 * 1024)
+#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
+
+#define STM32_SRAM_SIZE (128)
+#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN (&__bss_end)
+#endif
+
+#define HEAP_END STM32_SRAM_END
+
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.icf b/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.icf
new file mode 100644
index 0000000000000000000000000000000000000000..57ea14172754bd070b6d7f6f5ea5a068d05aadd8
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.icf
@@ -0,0 +1,28 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x00020000;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20020000;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x800;
+define symbol __ICFEDIT_size_heap__ = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite, last block CSTACK};
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.lds b/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.lds
new file mode 100644
index 0000000000000000000000000000000000000000..a97ce9dc07a4d4978c6fc625a50e388a6313ba12
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.lds
@@ -0,0 +1,157 @@
+/*
+ * linker script for STM32F4xx with GNU ld
+ * bernard.xiong 2009-10-14
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+ ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128k /* 128KB flash */
+ RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K DTCM */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x200;
+
+SECTIONS
+{
+ .text :
+ {
+ . = ALIGN(4);
+ _stext = .;
+ KEEP(*(.isr_vector)) /* Startup code */
+
+ . = ALIGN(4);
+ *(.text) /* remaining code */
+ *(.text.*) /* remaining code */
+ *(.rodata) /* read-only data (constants) */
+ *(.rodata*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.gnu.linkonce.t*)
+
+ /* section information for finsh shell */
+ . = ALIGN(4);
+ __fsymtab_start = .;
+ KEEP(*(FSymTab))
+ __fsymtab_end = .;
+
+ . = ALIGN(4);
+ __vsymtab_start = .;
+ KEEP(*(VSymTab))
+ __vsymtab_end = .;
+
+ /* section information for initial. */
+ . = ALIGN(4);
+ __rt_init_start = .;
+ KEEP(*(SORT(.rti_fn*)))
+ __rt_init_end = .;
+
+ . = ALIGN(4);
+
+ PROVIDE(__ctors_start__ = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE(__ctors_end__ = .);
+
+ . = ALIGN(4);
+
+ _etext = .;
+ } > ROM = 0
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+ /* This is used by the startup in order to initialize the .data secion */
+ _sidata = .;
+ } > ROM
+ __exidx_end = .;
+
+ /* .data section which is used for initialized data */
+
+ .data : AT (_sidata)
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _sdata = . ;
+
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+
+ PROVIDE(__dtors_start__ = .);
+ KEEP(*(SORT(.dtors.*)))
+ KEEP(*(.dtors))
+ PROVIDE(__dtors_end__ = .);
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _edata = . ;
+ } >RAM
+
+ .stack :
+ {
+ . = ALIGN(4);
+ _sstack = .;
+ . = . + _system_stack_size;
+ . = ALIGN(4);
+ _estack = .;
+ } >RAM
+
+ __bss_start = .;
+ .bss :
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .;
+
+ *(.bss)
+ *(.bss.*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _ebss = . ;
+
+ *(.bss.init)
+ } > RAM
+ __bss_end = .;
+
+ _end = .;
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ * Symbols in the DWARF debugging sections are relative to the beginning
+ * of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.sct b/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.sct
new file mode 100644
index 0000000000000000000000000000000000000000..f13040124c69d5ed428e73dad1939637302c494a
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.sct
@@ -0,0 +1,19 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00020000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ .ANY (+XO)
+ }
+ RW_IRAM1 0x20000000 0x00020000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+ RW_IRAM2 0x24000000 0x00080000 {
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/figures/board.jpg b/bsp/stm32/stm32h750-artpi-h750/figures/board.jpg
new file mode 100644
index 0000000000000000000000000000000000000000..d83e0f3082ade2712cf02b504220725980fc395e
Binary files /dev/null and b/bsp/stm32/stm32h750-artpi-h750/figures/board.jpg differ
diff --git a/bsp/stm32/stm32h750-artpi-h750/project.ewp b/bsp/stm32/stm32h750-artpi-h750/project.ewp
new file mode 100644
index 0000000000000000000000000000000000000000..46ff03c59557fea11b7eabc7c7f5b3951fc48b78
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/project.ewp
@@ -0,0 +1,2268 @@
+
+
+ 3
+
+ rtthread
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 31
+ 1
+ 1
+
+ ExePath
+ build\iar\Exe
+
+
+ ObjPath
+ build\iar\Obj
+
+
+ ListPath
+ build\iar\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ Automatic choice of formatter, without multibyte support.
+
+
+ Output description
+ Automatic choice of formatter, without multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 1
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 1
+
+
+ RTDescription
+ Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.30.1.17146
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32H743ZI ST STM32H743ZI
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
+
+
+ GBECoreSlave
+ 26
+ 41
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 41
+
+
+ GFPUDeviceSlave
+ STM32H743ZI ST STM32H743ZI
+
+
+ FPU2
+ 0
+ 7
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 41
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCDefines
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 1
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 00000000
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 1
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 3
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ ../../../rtthread.bin
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 21
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ project.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 0
+
+
+ IlinkIcfFile
+ lnk0t.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ ###Unitialized###
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 31
+ 1
+ 0
+
+ ExePath
+ Release\Exe
+
+
+ ObjPath
+ Release\Obj
+
+
+ ListPath
+ Release\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+
+
+
+ Output description
+
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 0
+
+
+ GRuntimeLibSelect
+ 0
+ 1
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 1
+
+
+ RTDescription
+
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.11.3.13977
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ Default None
+
+
+ GenLowLevelInterface
+ 0
+
+
+ GEndianModeBE
+ 0
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+
+
+
+ GBECoreSlave
+ 26
+ 1
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 0
+
+
+ GFPUDeviceSlave
+ Default None
+
+
+ FPU2
+ 0
+ 0
+
+
+ NrRegs
+ 0
+ 0
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 0
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 0
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 0
+
+ CCDefines
+ NDEBUG
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 1
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 0
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 0
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 0
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+ OOCOutputFormat
+ 3
+ 0
+
+
+ OCOutputOverride
+ 0
+
+
+ OOCOutputFile
+
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 0
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 21
+ 1
+ 0
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ###Unitialized###
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 0
+
+
+ IlinkIcfFile
+ lnk0t.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 1
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ ###Unitialized###
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Applications
+
+ $PROJ_DIR$\applications\main.c
+
+
+
+ cpu
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m7\context_iar.S
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m7\cpu_cache.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m7\cpuport.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c
+
+
+ $PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c
+
+
+
+ DeviceDrivers
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\completion.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\pipe.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c
+
+
+ $PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c
+
+
+
+ Drivers
+
+ $PROJ_DIR$\board\board.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c
+
+
+ $PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\iar\startup_stm32h750xx.s
+
+
+ $PROJ_DIR$\board\CubeMX_Config\Core\Src\stm32h7xx_hal_msp.c
+
+
+
+ finsh
+
+ $PROJ_DIR$\..\..\..\components\finsh\cmd.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\msh.c
+
+
+ $PROJ_DIR$\..\..\..\components\finsh\shell.c
+
+
+
+ Kernel
+
+ $PROJ_DIR$\..\..\..\src\clock.c
+
+
+ $PROJ_DIR$\..\..\..\src\components.c
+
+
+ $PROJ_DIR$\..\..\..\src\device.c
+
+
+ $PROJ_DIR$\..\..\..\src\idle.c
+
+
+ $PROJ_DIR$\..\..\..\src\ipc.c
+
+
+ $PROJ_DIR$\..\..\..\src\irq.c
+
+
+ $PROJ_DIR$\..\..\..\src\kservice.c
+
+
+ $PROJ_DIR$\..\..\..\src\mem.c
+
+
+ $PROJ_DIR$\..\..\..\src\mempool.c
+
+
+ $PROJ_DIR$\..\..\..\src\object.c
+
+
+ $PROJ_DIR$\..\..\..\src\scheduler.c
+
+
+ $PROJ_DIR$\..\..\..\src\signal.c
+
+
+ $PROJ_DIR$\..\..\..\src\thread.c
+
+
+ $PROJ_DIR$\..\..\..\src\timer.c
+
+
+
+ libc
+
+ $PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c
+
+
+
+ STM32_HAL
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cec.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_comp.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rng.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_sram.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_usart.c
+
+
+ $PROJ_DIR$\..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/project.eww b/bsp/stm32/stm32h750-artpi-h750/project.eww
new file mode 100644
index 0000000000000000000000000000000000000000..c2cb02eb1e89d73e24183274c1c886ddf74f9537
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/project.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\project.ewp
+
+
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/project.uvoptx b/bsp/stm32/stm32h750-artpi-h750/project.uvoptx
new file mode 100644
index 0000000000000000000000000000000000000000..32aea0646d2102f349a731b4eae1986441573be1
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/project.uvoptx
@@ -0,0 +1,1158 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+
+ 12000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\build\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32H7x_128k -FL020000 -FS08000000 -FP0($$Device:STM32H750XBHx$CMSIS\Flash\STM32H7x_128k.FLM)
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U066BFF393732484257162540 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k -FS08000000 -FL020000
+
+
+
+
+ 0
+ 0
+ 516
+ 1
+ 134238434
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+ \\rt_thread\../libraries/HAL_Drivers/drv_usart.c\516
+
+
+ 1
+ 0
+ 105
+ 1
+ 134264914
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ applications\main.c
+
+ \\rt_thread\applications/main.c\105
+
+
+ 2
+ 0
+ 108
+ 1
+ 134262562
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+ \\rt_thread\../libraries/HAL_Drivers/drv_usart.c\108
+
+
+ 3
+ 0
+ 115
+ 1
+ 134262586
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+ \\rt_thread\../libraries/HAL_Drivers/drv_usart.c\115
+
+
+ 4
+ 0
+ 164
+ 1
+ 134262714
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+ \\rt_thread\../libraries/HAL_Drivers/drv_usart.c\164
+
+
+ 5
+ 0
+ 222
+ 1
+ 134262916
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+ \\rt_thread\../libraries/HAL_Drivers/drv_usart.c\222
+
+
+ 6
+ 0
+ 224
+ 1
+ 134262950
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+ \\rt_thread\../libraries/HAL_Drivers/drv_usart.c\224
+
+
+
+
+ 0
+ 1
+ uart
+
+
+ 1
+ 1
+ baud_rate
+
+
+ 2
+ 1
+ cfg->baud_rate,0x0A
+
+
+ 3
+ 1
+ huart
+
+
+ 4
+ 1
+ uart->handle
+
+
+
+ 0
+
+
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+ System Viewer\USART3
+ 35905
+
+
+
+ 1
+ 1
+ 0
+ 2
+ 10000000
+
+
+
+
+
+ Applications
+ 1
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+ applications\main.c
+ main.c
+ 0
+ 0
+
+
+
+
+ cpu
+ 1
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\common\backtrace.c
+ backtrace.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\common\div0.c
+ div0.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\common\showmem.c
+ showmem.c
+ 0
+ 0
+
+
+ 2
+ 5
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\cortex-m7\cpu_cache.c
+ cpu_cache.c
+ 0
+ 0
+
+
+ 2
+ 6
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\cortex-m7\cpuport.c
+ cpuport.c
+ 0
+ 0
+
+
+ 2
+ 7
+ 2
+ 0
+ 0
+ 0
+ ..\..\..\libcpu\arm\cortex-m7\context_rvds.S
+ context_rvds.S
+ 0
+ 0
+
+
+
+
+ DeviceDrivers
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 8
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\misc\pin.c
+ pin.c
+ 0
+ 0
+
+
+ 3
+ 9
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\serial\serial.c
+ serial.c
+ 0
+ 0
+
+
+ 3
+ 10
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\completion.c
+ completion.c
+ 0
+ 0
+
+
+ 3
+ 11
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\dataqueue.c
+ dataqueue.c
+ 0
+ 0
+
+
+ 3
+ 12
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\pipe.c
+ pipe.c
+ 0
+ 0
+
+
+ 3
+ 13
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\ringblk_buf.c
+ ringblk_buf.c
+ 0
+ 0
+
+
+ 3
+ 14
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\ringbuffer.c
+ ringbuffer.c
+ 0
+ 0
+
+
+ 3
+ 15
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\waitqueue.c
+ waitqueue.c
+ 0
+ 0
+
+
+ 3
+ 16
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\drivers\src\workqueue.c
+ workqueue.c
+ 0
+ 0
+
+
+
+
+ Drivers
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 17
+ 1
+ 0
+ 0
+ 0
+ board\board.c
+ board.c
+ 0
+ 0
+
+
+ 4
+ 18
+ 1
+ 0
+ 0
+ 0
+ board\CubeMX_Config\Core\Src\stm32h7xx_hal_msp.c
+ stm32h7xx_hal_msp.c
+ 0
+ 0
+
+
+ 4
+ 19
+ 2
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\arm\startup_stm32h750xx.s
+ startup_stm32h750xx.s
+ 0
+ 0
+
+
+ 4
+ 20
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\HAL_Drivers\drv_gpio.c
+ drv_gpio.c
+ 0
+ 0
+
+
+ 4
+ 21
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\HAL_Drivers\drv_usart.c
+ drv_usart.c
+ 0
+ 0
+
+
+ 4
+ 22
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\HAL_Drivers\drv_common.c
+ drv_common.c
+ 0
+ 0
+
+
+
+
+ finsh
+ 1
+ 0
+ 0
+ 0
+
+ 5
+ 23
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\shell.c
+ shell.c
+ 0
+ 0
+
+
+ 5
+ 24
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\cmd.c
+ cmd.c
+ 0
+ 0
+
+
+ 5
+ 25
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\finsh\msh.c
+ msh.c
+ 0
+ 0
+
+
+
+
+ Kernel
+ 1
+ 0
+ 0
+ 0
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\clock.c
+ clock.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\components.c
+ components.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\device.c
+ device.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\idle.c
+ idle.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\ipc.c
+ ipc.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\irq.c
+ irq.c
+ 0
+ 0
+
+
+ 6
+ 32
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\kservice.c
+ kservice.c
+ 0
+ 0
+
+
+ 6
+ 33
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\mem.c
+ mem.c
+ 0
+ 0
+
+
+ 6
+ 34
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\mempool.c
+ mempool.c
+ 0
+ 0
+
+
+ 6
+ 35
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\object.c
+ object.c
+ 0
+ 0
+
+
+ 6
+ 36
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\scheduler.c
+ scheduler.c
+ 0
+ 0
+
+
+ 6
+ 37
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\signal.c
+ signal.c
+ 0
+ 0
+
+
+ 6
+ 38
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\thread.c
+ thread.c
+ 0
+ 0
+
+
+ 6
+ 39
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\src\timer.c
+ timer.c
+ 0
+ 0
+
+
+
+
+ libc
+ 1
+ 0
+ 0
+ 0
+
+ 7
+ 40
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\components\libc\compilers\common\time.c
+ time.c
+ 0
+ 0
+
+
+
+
+ STM32_HAL
+ 1
+ 0
+ 0
+ 0
+
+ 8
+ 41
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c
+ system_stm32h7xx.c
+ 0
+ 0
+
+
+ 8
+ 42
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c
+ stm32h7xx_hal.c
+ 0
+ 0
+
+
+ 8
+ 43
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cec.c
+ stm32h7xx_hal_cec.c
+ 0
+ 0
+
+
+ 8
+ 44
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c
+ stm32h7xx_hal_cortex.c
+ 0
+ 0
+
+
+ 8
+ 45
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_comp.c
+ stm32h7xx_hal_comp.c
+ 0
+ 0
+
+
+ 8
+ 46
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc.c
+ stm32h7xx_hal_crc.c
+ 0
+ 0
+
+
+ 8
+ 47
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc_ex.c
+ stm32h7xx_hal_crc_ex.c
+ 0
+ 0
+
+
+ 8
+ 48
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp.c
+ stm32h7xx_hal_cryp.c
+ 0
+ 0
+
+
+ 8
+ 49
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp_ex.c
+ stm32h7xx_hal_cryp_ex.c
+ 0
+ 0
+
+
+ 8
+ 50
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c
+ stm32h7xx_hal_dma.c
+ 0
+ 0
+
+
+ 8
+ 51
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c
+ stm32h7xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 8
+ 52
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c
+ stm32h7xx_hal_mdma.c
+ 0
+ 0
+
+
+ 8
+ 53
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c
+ stm32h7xx_hal_pwr.c
+ 0
+ 0
+
+
+ 8
+ 54
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c
+ stm32h7xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 8
+ 55
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c
+ stm32h7xx_hal_rcc.c
+ 0
+ 0
+
+
+ 8
+ 56
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c
+ stm32h7xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 8
+ 57
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rng.c
+ stm32h7xx_hal_rng.c
+ 0
+ 0
+
+
+ 8
+ 58
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_sram.c
+ stm32h7xx_hal_sram.c
+ 0
+ 0
+
+
+ 8
+ 59
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c
+ stm32h7xx_hal_gpio.c
+ 0
+ 0
+
+
+ 8
+ 60
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c
+ stm32h7xx_hal_uart.c
+ 0
+ 0
+
+
+ 8
+ 61
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_usart.c
+ stm32h7xx_hal_usart.c
+ 0
+ 0
+
+
+ 8
+ 62
+ 1
+ 0
+ 0
+ 0
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c
+ stm32h7xx_hal_uart_ex.c
+ 0
+ 0
+
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/project.uvprojx b/bsp/stm32/stm32h750-artpi-h750/project.uvprojx
new file mode 100644
index 0000000000000000000000000000000000000000..a1cb30f17d3125aad616d2e36aca44353aab39e8
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/project.uvprojx
@@ -0,0 +1,742 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32H750XBHx
+ STMicroelectronics
+ Keil.STM32H7xx_DFP.2.5.0
+ http://www.keil.com/pack/
+ IRAM(0x20000000,0x00020000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00020000) XRAM(0x30000000,0x00048000) XRAM2(0x38000000,0x00010000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE
+
+
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k -FS08000000 -FL020000 -FP0($$Device:STM32H750XBHx$CMSIS\Flash\STM32H7x_128k.FLM))
+ 0
+ $$Device:STM32H750XBHx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h
+
+
+
+
+
+
+
+
+
+ $$Device:STM32H750XBHx$CMSIS\SVD\STM32H750x.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\build\
+ rt-thread
+ 1
+ 0
+ 0
+ 1
+ 0
+ .\build\
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 0
+ fromelf --bin !L --output rtthread.bin
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 1
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM7
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM7
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M7"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 1
+ 0
+ 3
+ 0
+ 1
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 4
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 1
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 1
+ 0x8000000
+ 0x20000
+
+
+ 1
+ 0x30000000
+ 0x48000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x20000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x30000000
+ 0x48000
+
+
+ 0
+ 0x38000000
+ 0x10000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x24000000
+ 0x80000
+
+
+
+
+
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ STM32H750xx, USE_HAL_DRIVER, __RTTHREAD__
+
+ ..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m7;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\Core\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Inc;..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Include;..\libraries\STM32H7xx_HAL\CMSIS\Include
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+ .\board\linker_scripts\link.sct
+
+
+
+
+
+
+
+
+
+
+ Applications
+
+
+ main.c
+ 1
+ applications\main.c
+
+
+
+
+ cpu
+
+
+ backtrace.c
+ 1
+ ..\..\..\libcpu\arm\common\backtrace.c
+
+
+ div0.c
+ 1
+ ..\..\..\libcpu\arm\common\div0.c
+
+
+ showmem.c
+ 1
+ ..\..\..\libcpu\arm\common\showmem.c
+
+
+ cpu_cache.c
+ 1
+ ..\..\..\libcpu\arm\cortex-m7\cpu_cache.c
+
+
+ cpuport.c
+ 1
+ ..\..\..\libcpu\arm\cortex-m7\cpuport.c
+
+
+ context_rvds.S
+ 2
+ ..\..\..\libcpu\arm\cortex-m7\context_rvds.S
+
+
+
+
+ DeviceDrivers
+
+
+ pin.c
+ 1
+ ..\..\..\components\drivers\misc\pin.c
+
+
+ serial.c
+ 1
+ ..\..\..\components\drivers\serial\serial.c
+
+
+ completion.c
+ 1
+ ..\..\..\components\drivers\src\completion.c
+
+
+ dataqueue.c
+ 1
+ ..\..\..\components\drivers\src\dataqueue.c
+
+
+ pipe.c
+ 1
+ ..\..\..\components\drivers\src\pipe.c
+
+
+ ringblk_buf.c
+ 1
+ ..\..\..\components\drivers\src\ringblk_buf.c
+
+
+ ringbuffer.c
+ 1
+ ..\..\..\components\drivers\src\ringbuffer.c
+
+
+ waitqueue.c
+ 1
+ ..\..\..\components\drivers\src\waitqueue.c
+
+
+ workqueue.c
+ 1
+ ..\..\..\components\drivers\src\workqueue.c
+
+
+
+
+ Drivers
+
+
+ board.c
+ 1
+ board\board.c
+
+
+ stm32h7xx_hal_msp.c
+ 1
+ board\CubeMX_Config\Core\Src\stm32h7xx_hal_msp.c
+
+
+ startup_stm32h750xx.s
+ 2
+ ..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\arm\startup_stm32h750xx.s
+
+
+ drv_gpio.c
+ 1
+ ..\libraries\HAL_Drivers\drv_gpio.c
+
+
+ drv_usart.c
+ 1
+ ..\libraries\HAL_Drivers\drv_usart.c
+
+
+ drv_common.c
+ 1
+ ..\libraries\HAL_Drivers\drv_common.c
+
+
+
+
+ finsh
+
+
+ shell.c
+ 1
+ ..\..\..\components\finsh\shell.c
+
+
+ cmd.c
+ 1
+ ..\..\..\components\finsh\cmd.c
+
+
+ msh.c
+ 1
+ ..\..\..\components\finsh\msh.c
+
+
+
+
+ Kernel
+
+
+ clock.c
+ 1
+ ..\..\..\src\clock.c
+
+
+ components.c
+ 1
+ ..\..\..\src\components.c
+
+
+ device.c
+ 1
+ ..\..\..\src\device.c
+
+
+ idle.c
+ 1
+ ..\..\..\src\idle.c
+
+
+ ipc.c
+ 1
+ ..\..\..\src\ipc.c
+
+
+ irq.c
+ 1
+ ..\..\..\src\irq.c
+
+
+ kservice.c
+ 1
+ ..\..\..\src\kservice.c
+
+
+ mem.c
+ 1
+ ..\..\..\src\mem.c
+
+
+ mempool.c
+ 1
+ ..\..\..\src\mempool.c
+
+
+ object.c
+ 1
+ ..\..\..\src\object.c
+
+
+ scheduler.c
+ 1
+ ..\..\..\src\scheduler.c
+
+
+ signal.c
+ 1
+ ..\..\..\src\signal.c
+
+
+ thread.c
+ 1
+ ..\..\..\src\thread.c
+
+
+ timer.c
+ 1
+ ..\..\..\src\timer.c
+
+
+
+
+ libc
+
+
+ time.c
+ 1
+ ..\..\..\components\libc\compilers\common\time.c
+
+
+
+
+ STM32_HAL
+
+
+ system_stm32h7xx.c
+ 1
+ ..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c
+
+
+ stm32h7xx_hal.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c
+
+
+ stm32h7xx_hal_cec.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cec.c
+
+
+ stm32h7xx_hal_cortex.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c
+
+
+ stm32h7xx_hal_comp.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_comp.c
+
+
+ stm32h7xx_hal_crc.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc.c
+
+
+ stm32h7xx_hal_crc_ex.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc_ex.c
+
+
+ stm32h7xx_hal_cryp.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp.c
+
+
+ stm32h7xx_hal_cryp_ex.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp_ex.c
+
+
+ stm32h7xx_hal_dma.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c
+
+
+ stm32h7xx_hal_dma_ex.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c
+
+
+ stm32h7xx_hal_mdma.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c
+
+
+ stm32h7xx_hal_pwr.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c
+
+
+ stm32h7xx_hal_pwr_ex.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c
+
+
+ stm32h7xx_hal_rcc.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c
+
+
+ stm32h7xx_hal_rcc_ex.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c
+
+
+ stm32h7xx_hal_rng.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rng.c
+
+
+ stm32h7xx_hal_sram.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_sram.c
+
+
+ stm32h7xx_hal_gpio.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c
+
+
+ stm32h7xx_hal_uart.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c
+
+
+ stm32h7xx_hal_usart.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_usart.c
+
+
+ stm32h7xx_hal_uart_ex.c
+ 1
+ ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/rtconfig.h b/bsp/stm32/stm32h750-artpi-h750/rtconfig.h
new file mode 100644
index 0000000000000000000000000000000000000000..8d751712034ae1187fa3f14b0a275a9c16d68898
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/rtconfig.h
@@ -0,0 +1,170 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 1000
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+#define RT_DEBUG
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_SMALL_MEM
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart4"
+#define RT_VER_NUM 0x40003
+#define ARCH_ARM
+#define RT_USING_CPU_FFS
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M7
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_USING_MSH_ONLY
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_LIBC_USING_TIME
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* Network interface device */
+
+
+/* light weight TCP/IP stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+#define SOC_FAMILY_STM32
+#define SOC_SERIES_STM32H7
+
+/* Hardware Drivers Config */
+
+#define SOC_STM32H750XB
+
+/* Onboard Peripheral Drivers */
+
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_GPIO
+#define BSP_USING_UART
+#define BSP_USING_UART3
+#define BSP_USING_UART4
+
+/* Board extended module Drivers */
+
+
+#endif
diff --git a/bsp/stm32/stm32h750-artpi-h750/rtconfig.py b/bsp/stm32/stm32h750-artpi-h750/rtconfig.py
new file mode 100644
index 0000000000000000000000000000000000000000..2c9cbdd792481d584ae882e21a35ad7e5253d03c
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/rtconfig.py
@@ -0,0 +1,151 @@
+import os
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m7'
+CROSS_TOOL='gcc'
+
+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
+if os.getenv('RTT_CC'):
+ CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+ RTT_ROOT = os.getenv('RTT_ROOT')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if CROSS_TOOL == 'gcc':
+ PLATFORM = 'gcc'
+ EXEC_PATH = r'C:\Users\XXYYZZ'
+elif CROSS_TOOL == 'keil':
+ PLATFORM = 'armcc'
+ EXEC_PATH = r'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+ PLATFORM = 'iar'
+ EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
+
+if os.getenv('RTT_EXEC_PATH'):
+ EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+ # toolchains
+ PREFIX = 'arm-none-eabi-'
+ CC = PREFIX + 'gcc'
+ AS = PREFIX + 'gcc'
+ AR = PREFIX + 'ar'
+ CXX = PREFIX + 'g++'
+ LINK = PREFIX + 'gcc'
+ TARGET_EXT = 'elf'
+ SIZE = PREFIX + 'size'
+ OBJDUMP = PREFIX + 'objdump'
+ OBJCPY = PREFIX + 'objcopy'
+
+ DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+ CFLAGS = DEVICE + ' -Dgcc'
+ AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+ LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
+
+ CPATH = ''
+ LPATH = ''
+
+ if BUILD == 'debug':
+ CFLAGS += ' -O0 -gdwarf-2 -g'
+ AFLAGS += ' -gdwarf-2'
+ else:
+ CFLAGS += ' -O2'
+
+ CXXFLAGS = CFLAGS
+ CFLAGS += ' -std=c99'
+
+ POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+ # toolchains
+ CC = 'armcc'
+ CXX = 'armcc'
+ AS = 'armasm'
+ AR = 'armar'
+ LINK = 'armlink'
+ TARGET_EXT = 'axf'
+
+ DEVICE = ' --cpu Cortex-M7.fp.sp'
+ CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+ AFLAGS = DEVICE + ' --apcs=interwork '
+ LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
+ CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
+ LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
+
+ CFLAGS += ' -D__MICROLIB '
+ AFLAGS += ' --pd "__MICROLIB SETA 1" '
+ LFLAGS += ' --library_type=microlib '
+ EXEC_PATH += '/ARM/ARMCC/bin/'
+
+ if BUILD == 'debug':
+ CFLAGS += ' -g -O0'
+ AFLAGS += ' -g'
+ else:
+ CFLAGS += ' -O2'
+
+ CXXFLAGS = CFLAGS
+ CFLAGS += ' -std=c99'
+
+ POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iar':
+ # toolchains
+ CC = 'iccarm'
+ CXX = 'iccarm'
+ AS = 'iasmarm'
+ AR = 'iarchive'
+ LINK = 'ilinkarm'
+ TARGET_EXT = 'out'
+
+ DEVICE = '-Dewarm'
+
+ CFLAGS = DEVICE
+ CFLAGS += ' --diag_suppress Pa050'
+ CFLAGS += ' --no_cse'
+ CFLAGS += ' --no_unroll'
+ CFLAGS += ' --no_inline'
+ CFLAGS += ' --no_code_motion'
+ CFLAGS += ' --no_tbaa'
+ CFLAGS += ' --no_clustering'
+ CFLAGS += ' --no_scheduling'
+ CFLAGS += ' --endian=little'
+ CFLAGS += ' --cpu=Cortex-M7'
+ CFLAGS += ' -e'
+ CFLAGS += ' --fpu=VFPv5_sp'
+ CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+ CFLAGS += ' --silent'
+
+ AFLAGS = DEVICE
+ AFLAGS += ' -s+'
+ AFLAGS += ' -w+'
+ AFLAGS += ' -r'
+ AFLAGS += ' --cpu Cortex-M7'
+ AFLAGS += ' --fpu VFPv5_sp'
+ AFLAGS += ' -S'
+
+ if BUILD == 'debug':
+ CFLAGS += ' --debug'
+ CFLAGS += ' -On'
+ else:
+ CFLAGS += ' -Oh'
+
+ LFLAGS = ' --config "board/linker_scripts/link.icf"'
+ LFLAGS += ' --entry __iar_program_start'
+
+ CXXFLAGS = CFLAGS
+
+ EXEC_PATH = EXEC_PATH + '/arm/bin/'
+ POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
+
+def dist_handle(BSP_ROOT, dist_dir):
+ import sys
+ cwd_path = os.getcwd()
+ sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+ from sdk_dist import dist_do_building
+ dist_do_building(BSP_ROOT, dist_dir)
diff --git a/bsp/stm32/stm32h750-artpi-h750/template.ewp b/bsp/stm32/stm32h750-artpi-h750/template.ewp
new file mode 100644
index 0000000000000000000000000000000000000000..1ca2a5511bdcd12db3ac53d839624cffb92ea260
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/template.ewp
@@ -0,0 +1,2074 @@
+
+
+ 3
+
+ rtthread
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 31
+ 1
+ 1
+
+ ExePath
+ build\iar\Exe
+
+
+ ObjPath
+ build\iar\Obj
+
+
+ ListPath
+ build\iar\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ Automatic choice of formatter, without multibyte support.
+
+
+ Output description
+ Automatic choice of formatter, without multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 1
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 1
+
+
+ RTDescription
+ Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.32.1.18618
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32H743ZI ST STM32H743ZI
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
+
+
+ GBECoreSlave
+ 26
+ 41
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 41
+
+
+ GFPUDeviceSlave
+ STM32H743ZI ST STM32H743ZI
+
+
+ FPU2
+ 0
+ 7
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 41
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 35
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+ Pa050
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 00000000
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 1
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+ OICompilerExtraOption
+ 1
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 3
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ ../../../rtthread.bin
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 22
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ project.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 0
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$\board\linker_scripts\link.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ ###Unitialized###
+
+
+ OILinkExtraOption
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 31
+ 1
+ 0
+
+ ExePath
+ Release\Exe
+
+
+ ObjPath
+ Release\Obj
+
+
+ ListPath
+ Release\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+
+
+
+ Output description
+
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 0
+
+
+ GRuntimeLibSelect
+ 0
+ 1
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 1
+
+
+ RTDescription
+
+
+
+ OGProductVersion
+ 6.30.6.53380
+
+
+ OGLastSavedByProductVersion
+ 8.11.3.13977
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ Default None
+
+
+ GenLowLevelInterface
+ 0
+
+
+ GEndianModeBE
+ 0
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ RTConfigPath2
+
+
+
+ GBECoreSlave
+ 26
+ 1
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 0
+
+
+ GFPUDeviceSlave
+ Default None
+
+
+ FPU2
+ 0
+ 0
+
+
+ NrRegs
+ 0
+ 0
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 0
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 0
+
+
+ TrustZone
+ 0
+
+
+ TrustZoneModes
+ 0
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 35
+ 1
+ 0
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 0
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 0
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+ OICompilerExtraOption
+ 1
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 0
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 0
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+ OOCOutputFormat
+ 3
+ 0
+
+
+ OCOutputOverride
+ 0
+
+
+ OOCOutputFile
+
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 0
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 22
+ 1
+ 0
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ###Unitialized###
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 0
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 0
+
+
+ IlinkIcfFile
+ lnk0t.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 1
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+ IlinkTrustzoneImportLibraryOut
+ ###Unitialized###
+
+
+ OILinkExtraOption
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/template.eww b/bsp/stm32/stm32h750-artpi-h750/template.eww
new file mode 100644
index 0000000000000000000000000000000000000000..bd036bb4c98c1598f04b85f64b0dff37f6ec6028
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/template.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\template.ewp
+
+
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/template.uvoptx b/bsp/stm32/stm32h750-artpi-h750/template.uvoptx
new file mode 100644
index 0000000000000000000000000000000000000000..790ef328e8073c5267ae52b0d13c39d5a35dec94
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/template.uvoptx
@@ -0,0 +1,184 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+
+ 12000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\build\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 0
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32H7x_128k -FL020000 -FS08000000 -FP0($$Device:STM32H750XBHx$CMSIS\Flash\STM32H7x_128k.FLM)
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U066BFF393732484257162540 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k -FS08000000 -FL020000
+
+
+
+
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+ 1
+ 1
+ 0
+ 2
+ 10000000
+
+
+
+
+
diff --git a/bsp/stm32/stm32h750-artpi-h750/template.uvprojx b/bsp/stm32/stm32h750-artpi-h750/template.uvprojx
new file mode 100644
index 0000000000000000000000000000000000000000..d12a55c27cfcfc339f672beb23eb4a2b85789a2a
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi-h750/template.uvprojx
@@ -0,0 +1,390 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ rt-thread
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32H750XBHx
+ STMicroelectronics
+ Keil.STM32H7xx_DFP.2.5.0
+ http://www.keil.com/pack/
+ IRAM(0x20000000,0x00020000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00020000) XRAM(0x30000000,0x00048000) XRAM2(0x38000000,0x00010000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE
+
+
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k -FS08000000 -FL020000 -FP0($$Device:STM32H750XBHx$CMSIS\Flash\STM32H7x_128k.FLM))
+ 0
+ $$Device:STM32H750XBHx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h
+
+
+
+
+
+
+
+
+
+ $$Device:STM32H750XBHx$CMSIS\SVD\STM32H750x.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\build\
+ rt-thread
+ 1
+ 0
+ 0
+ 1
+ 0
+ .\build\
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 0
+ fromelf --bin !L --output rtthread.bin
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 1
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM7
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM7
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M7"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 1
+ 0
+ 3
+ 0
+ 1
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 4
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 1
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 1
+ 0x8000000
+ 0x20000
+
+
+ 1
+ 0x30000000
+ 0x48000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x20000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x30000000
+ 0x48000
+
+
+ 0
+ 0x38000000
+ 0x10000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x24000000
+ 0x80000
+
+
+
+
+
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+ .\board\linker_scripts\link.sct
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+