From e56221c7b17f210255304582fdb289d5228c1518 Mon Sep 17 00:00:00 2001 From: supperthomas <78900636@qq.com> Date: Mon, 3 Jan 2022 10:15:55 +0800 Subject: [PATCH] [bsp/stm32] add sdram for openmv --- bsp/stm32/stm32h743-openmv-h7plus/README.md | 3 +- .../applications/main.c | 1 - .../Core/Inc/stm32h7xx_hal_conf.h | 4 +- .../board/CubeMX_Config/Core/Src/main.c | 66 ++- .../Core/Src/stm32h7xx_hal_msp.c | 269 ++++++++++ .../board/CubeMX_Config/CubeMX_Config.ioc | 476 +++++++++++++++--- .../stm32h743-openmv-h7plus/board/Kconfig | 5 +- .../stm32h743-openmv-h7plus/board/SConscript | 1 + .../stm32h743-openmv-h7plus/board/board.c | 12 +- .../board/ports/sdram_port.h | 68 +++ 10 files changed, 826 insertions(+), 79 deletions(-) create mode 100644 bsp/stm32/stm32h743-openmv-h7plus/board/ports/sdram_port.h diff --git a/bsp/stm32/stm32h743-openmv-h7plus/README.md b/bsp/stm32/stm32h743-openmv-h7plus/README.md index f1955aaa7f..c361495eca 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/README.md +++ b/bsp/stm32/stm32h743-openmv-h7plus/README.md @@ -38,7 +38,8 @@ OPENMV4-H7-PLUS 是 OPENMV公司推出的一款针对 STM32H7系列设计的 Cor | **片上外设** | **支持情况** | **备注** | | :----------------- | :----------: | :------------------------------------- | | GPIO | 支持 | | -| UART | 支持 | UART1 （console） | +| UART | 支持 | UART1(PB14 TX)(PB15 RX) | +| SDRAM | 支持 | IS42S32800 BANK1 | ## 使用说明 diff --git a/bsp/stm32/stm32h743-openmv-h7plus/applications/main.c b/bsp/stm32/stm32h743-openmv-h7plus/applications/main.c index d670d073c2..4a8e13883b 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/applications/main.c +++ b/bsp/stm32/stm32h743-openmv-h7plus/applications/main.c @@ -12,7 +12,6 @@ #include #include -/* defined the LED2 pin: PB7 */ #define LED1_PIN GET_PIN(C, 0) int main(void) diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h index 2df387d30c..4e2bd05988 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h @@ -50,7 +50,7 @@ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_OTFDEC_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ +#define HAL_SDRAM_MODULE_ENABLED /* #define HAL_HASH_MODULE_ENABLED */ /* #define HAL_HRTIM_MODULE_ENABLED */ /* #define HAL_HSEM_MODULE_ENABLED */ @@ -168,7 +168,7 @@ #define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority */ #define USE_RTOS 0 #define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */ -#define USE_SPI_CRC 0U /*!< use CRC in SPI */ +#define USE_SPI_CRC 0U /*!< use CRC in SPI */ #define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ #define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/main.c b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/main.c index 6e63fd24d7..c6be842c7d 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/main.c +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/main.c @@ -42,6 +42,8 @@ UART_HandleTypeDef huart1; +SDRAM_HandleTypeDef hsdram1; + /* USER CODE BEGIN PV */ /* USER CODE END PV */ @@ -50,6 +52,7 @@ UART_HandleTypeDef huart1; void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_USART1_UART_Init(void); +static void MX_FMC_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ @@ -88,6 +91,7 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_USART1_UART_Init(); + MX_FMC_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -117,7 +121,7 @@ void SystemClock_Config(void) HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); /** Configure the main internal regulator output voltage */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} /** Initializes the RCC Oscillators according to the specified parameters @@ -127,12 +131,12 @@ void SystemClock_Config(void) RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 80; + RCC_OscInitStruct.PLL.PLLM = 3; + RCC_OscInitStruct.PLL.PLLN = 200; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 2; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) @@ -152,7 +156,7 @@ void SystemClock_Config(void) RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { Error_Handler(); } @@ -206,6 +210,53 @@ static void MX_USART1_UART_Init(void) } +/* FMC initialization function */ +static void MX_FMC_Init(void) +{ + + /* USER CODE BEGIN FMC_Init 0 */ + + /* USER CODE END FMC_Init 0 */ + + FMC_SDRAM_TimingTypeDef SdramTiming = {0}; + + /* USER CODE BEGIN FMC_Init 1 */ + + /* USER CODE END FMC_Init 1 */ + + /** Perform the SDRAM1 memory initialization sequence + */ + hsdram1.Instance = FMC_SDRAM_DEVICE; + /* hsdram1.Init */ + hsdram1.Init.SDBank = FMC_SDRAM_BANK1; + hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9; + hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12; + hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_32; + hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4; + hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2; + hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE; + hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2; + hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE; + hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0; + /* SdramTiming */ + SdramTiming.LoadToActiveDelay = 2; + SdramTiming.ExitSelfRefreshDelay = 7; + SdramTiming.SelfRefreshTime = 5; + SdramTiming.RowCycleDelay = 6; + SdramTiming.WriteRecoveryTime = 3; + SdramTiming.RPDelay = 2; + SdramTiming.RCDDelay = 2; + + if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK) + { + Error_Handler( ); + } + + /* USER CODE BEGIN FMC_Init 2 */ + + /* USER CODE END FMC_Init 2 */ +} + /** * @brief GPIO Initialization Function * @param None @@ -216,7 +267,12 @@ static void MX_GPIO_Init(void) GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOI_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c index f068ea8fd8..9464e5224f 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c @@ -21,7 +21,9 @@ /* Includes ------------------------------------------------------------------*/ #include "main.h" /* USER CODE BEGIN Includes */ +#ifdef __RTTHREAD__ #include "drv_common.h" +#endif /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -150,6 +152,273 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) } +static uint32_t FMC_Initialized = 0; + +static void HAL_FMC_MspInit(void){ + /* USER CODE BEGIN FMC_MspInit 0 */ + + /* USER CODE END FMC_MspInit 0 */ + GPIO_InitTypeDef GPIO_InitStruct ={0}; + if (FMC_Initialized) { + return; + } + FMC_Initialized = 1; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC; + PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_D1HCLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /* Peripheral clock enable */ + __HAL_RCC_FMC_CLK_ENABLE(); + + /** FMC GPIO Configuration + PE1 ------> FMC_NBL1 + PE0 ------> FMC_NBL0 + PG15 ------> FMC_SDNCAS + PD0 ------> FMC_D2 + PI7 ------> FMC_D29 + PI6 ------> FMC_D28 + PI5 ------> FMC_NBL3 + PD1 ------> FMC_D3 + PI3 ------> FMC_D27 + PI2 ------> FMC_D26 + PI9 ------> FMC_D30 + PI4 ------> FMC_NBL2 + PH15 ------> FMC_D23 + PI1 ------> FMC_D25 + PF0 ------> FMC_A0 + PI10 ------> FMC_D31 + PH13 ------> FMC_D21 + PH14 ------> FMC_D22 + PI0 ------> FMC_D24 + PF2 ------> FMC_A2 + PF1 ------> FMC_A1 + PG8 ------> FMC_SDCLK + PF3 ------> FMC_A3 + PF4 ------> FMC_A4 + PH5 ------> FMC_SDNWE + PF5 ------> FMC_A5 + PH12 ------> FMC_D20 + PG5 ------> FMC_BA1 + PG4 ------> FMC_BA0 + PH11 ------> FMC_D19 + PH10 ------> FMC_D18 + PD15 ------> FMC_D1 + PG1 ------> FMC_A11 + PH8 ------> FMC_D16 + PH9 ------> FMC_D17 + PD14 ------> FMC_D0 + PC4 ------> FMC_SDNE0 + PF13 ------> FMC_A7 + PG0 ------> FMC_A10 + PE13 ------> FMC_D10 + PD10 ------> FMC_D15 + PC5 ------> FMC_SDCKE0 + PF12 ------> FMC_A6 + PF15 ------> FMC_A9 + PE8 ------> FMC_D5 + PE9 ------> FMC_D6 + PE11 ------> FMC_D8 + PE14 ------> FMC_D11 + PD9 ------> FMC_D14 + PD8 ------> FMC_D13 + PF11 ------> FMC_SDNRAS + PF14 ------> FMC_A8 + PE7 ------> FMC_D4 + PE10 ------> FMC_D7 + PE12 ------> FMC_D9 + PE15 ------> FMC_D12 + */ + GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_0|GPIO_PIN_13|GPIO_PIN_8 + |GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_14|GPIO_PIN_7 + |GPIO_PIN_10|GPIO_PIN_12|GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_8|GPIO_PIN_5|GPIO_PIN_4 + |GPIO_PIN_1|GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_15|GPIO_PIN_14 + |GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6|GPIO_PIN_5|GPIO_PIN_3 + |GPIO_PIN_2|GPIO_PIN_9|GPIO_PIN_4|GPIO_PIN_1 + |GPIO_PIN_10|GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_5 + |GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_8 + |GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_3 + |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_13|GPIO_PIN_12 + |GPIO_PIN_15|GPIO_PIN_11|GPIO_PIN_14; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN FMC_MspInit 1 */ + + /* USER CODE END FMC_MspInit 1 */ +} + +void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){ + /* USER CODE BEGIN SDRAM_MspInit 0 */ + + /* USER CODE END SDRAM_MspInit 0 */ + HAL_FMC_MspInit(); + /* USER CODE BEGIN SDRAM_MspInit 1 */ + + /* USER CODE END SDRAM_MspInit 1 */ +} + +static uint32_t FMC_DeInitialized = 0; + +static void HAL_FMC_MspDeInit(void){ + /* USER CODE BEGIN FMC_MspDeInit 0 */ + + /* USER CODE END FMC_MspDeInit 0 */ + if (FMC_DeInitialized) { + return; + } + FMC_DeInitialized = 1; + /* Peripheral clock enable */ + __HAL_RCC_FMC_CLK_DISABLE(); + + /** FMC GPIO Configuration + PE1 ------> FMC_NBL1 + PE0 ------> FMC_NBL0 + PG15 ------> FMC_SDNCAS + PD0 ------> FMC_D2 + PI7 ------> FMC_D29 + PI6 ------> FMC_D28 + PI5 ------> FMC_NBL3 + PD1 ------> FMC_D3 + PI3 ------> FMC_D27 + PI2 ------> FMC_D26 + PI9 ------> FMC_D30 + PI4 ------> FMC_NBL2 + PH15 ------> FMC_D23 + PI1 ------> FMC_D25 + PF0 ------> FMC_A0 + PI10 ------> FMC_D31 + PH13 ------> FMC_D21 + PH14 ------> FMC_D22 + PI0 ------> FMC_D24 + PF2 ------> FMC_A2 + PF1 ------> FMC_A1 + PG8 ------> FMC_SDCLK + PF3 ------> FMC_A3 + PF4 ------> FMC_A4 + PH5 ------> FMC_SDNWE + PF5 ------> FMC_A5 + PH12 ------> FMC_D20 + PG5 ------> FMC_BA1 + PG4 ------> FMC_BA0 + PH11 ------> FMC_D19 + PH10 ------> FMC_D18 + PD15 ------> FMC_D1 + PG1 ------> FMC_A11 + PH8 ------> FMC_D16 + PH9 ------> FMC_D17 + PD14 ------> FMC_D0 + PC4 ------> FMC_SDNE0 + PF13 ------> FMC_A7 + PG0 ------> FMC_A10 + PE13 ------> FMC_D10 + PD10 ------> FMC_D15 + PC5 ------> FMC_SDCKE0 + PF12 ------> FMC_A6 + PF15 ------> FMC_A9 + PE8 ------> FMC_D5 + PE9 ------> FMC_D6 + PE11 ------> FMC_D8 + PE14 ------> FMC_D11 + PD9 ------> FMC_D14 + PD8 ------> FMC_D13 + PF11 ------> FMC_SDNRAS + PF14 ------> FMC_A8 + PE7 ------> FMC_D4 + PE10 ------> FMC_D7 + PE12 ------> FMC_D9 + PE15 ------> FMC_D12 + */ + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_1|GPIO_PIN_0|GPIO_PIN_13|GPIO_PIN_8 + |GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_14|GPIO_PIN_7 + |GPIO_PIN_10|GPIO_PIN_12|GPIO_PIN_15); + + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_15|GPIO_PIN_8|GPIO_PIN_5|GPIO_PIN_4 + |GPIO_PIN_1|GPIO_PIN_0); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_15|GPIO_PIN_14 + |GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_8); + + HAL_GPIO_DeInit(GPIOI, GPIO_PIN_7|GPIO_PIN_6|GPIO_PIN_5|GPIO_PIN_3 + |GPIO_PIN_2|GPIO_PIN_9|GPIO_PIN_4|GPIO_PIN_1 + |GPIO_PIN_10|GPIO_PIN_0); + + HAL_GPIO_DeInit(GPIOH, GPIO_PIN_15|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_5 + |GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_8 + |GPIO_PIN_9); + + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_3 + |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_13|GPIO_PIN_12 + |GPIO_PIN_15|GPIO_PIN_11|GPIO_PIN_14); + + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4|GPIO_PIN_5); + + /* USER CODE BEGIN FMC_MspDeInit 1 */ + + /* USER CODE END FMC_MspDeInit 1 */ +} + +void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){ + /* USER CODE BEGIN SDRAM_MspDeInit 0 */ + + /* USER CODE END SDRAM_MspDeInit 0 */ + HAL_FMC_MspDeInit(); + /* USER CODE BEGIN SDRAM_MspDeInit 1 */ + + /* USER CODE END SDRAM_MspDeInit 1 */ +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/CubeMX_Config.ioc index 95357d9b7a..b659077e7b 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/CubeMX_Config.ioc @@ -1,23 +1,93 @@ #MicroXplorer Configuration settings - do not modify +FMC.BankMapConfig=FMC_SWAPBMAP_DISABLE +FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_2 +FMC.ColumnBitsNumber1=FMC_SDRAM_COLUMN_BITS_NUM_9 +FMC.ExitSelfRefreshDelay1=7 +FMC.IPParameters=ColumnBitsNumber1,CASLatency1,SDClockPeriod1,LoadToActiveDelay1,RCDDelay1,ExitSelfRefreshDelay1,SelfRefreshTime1,RowCycleDelay1,RPDelay1,BankMapConfig,WriteRecoveryTime1,ReadBurst1 +FMC.LoadToActiveDelay1=2 +FMC.RCDDelay1=2 +FMC.RPDelay1=2 +FMC.ReadBurst1=FMC_SDRAM_RBURST_ENABLE +FMC.RowCycleDelay1=6 +FMC.SDClockPeriod1=FMC_SDRAM_CLOCK_PERIOD_2 +FMC.SelfRefreshTime1=5 +FMC.WriteRecoveryTime1=3 File.Version=6 -GPIO.groupedBy= +GPIO.groupedBy=Group By Peripherals KeepUserPlacement=false Mcu.Family=STM32H7 Mcu.IP0=CORTEX_M7 -Mcu.IP1=NVIC -Mcu.IP2=RCC -Mcu.IP3=SYS -Mcu.IP4=USART1 -Mcu.IPNb=5 +Mcu.IP1=FMC +Mcu.IP2=NVIC +Mcu.IP3=RCC +Mcu.IP4=SYS +Mcu.IP5=USART1 +Mcu.IPNb=6 Mcu.Name=STM32H743IIKx Mcu.Package=UFBGA176 -Mcu.Pin0=PH0-OSC_IN (PH0) -Mcu.Pin1=PH1-OSC_OUT (PH1) -Mcu.Pin2=PC0 -Mcu.Pin3=PB14 -Mcu.Pin4=PB15 -Mcu.Pin5=VP_SYS_VS_Systick -Mcu.PinsNb=6 +Mcu.Pin0=PE1 +Mcu.Pin1=PE0 +Mcu.Pin10=PI9 +Mcu.Pin11=PI4 +Mcu.Pin12=PH15 +Mcu.Pin13=PI1 +Mcu.Pin14=PF0 +Mcu.Pin15=PI10 +Mcu.Pin16=PH13 +Mcu.Pin17=PH14 +Mcu.Pin18=PI0 +Mcu.Pin19=PH0-OSC_IN (PH0) +Mcu.Pin2=PG15 +Mcu.Pin20=PH1-OSC_OUT (PH1) +Mcu.Pin21=PF2 +Mcu.Pin22=PF1 +Mcu.Pin23=PG8 +Mcu.Pin24=PF3 +Mcu.Pin25=PF4 +Mcu.Pin26=PH5 +Mcu.Pin27=PF5 +Mcu.Pin28=PH12 +Mcu.Pin29=PG5 +Mcu.Pin3=PD0 +Mcu.Pin30=PG4 +Mcu.Pin31=PH11 +Mcu.Pin32=PH10 +Mcu.Pin33=PD15 +Mcu.Pin34=PC0 +Mcu.Pin35=PG1 +Mcu.Pin36=PH8 +Mcu.Pin37=PH9 +Mcu.Pin38=PD14 +Mcu.Pin39=PC4 +Mcu.Pin4=PI7 +Mcu.Pin40=PF13 +Mcu.Pin41=PG0 +Mcu.Pin42=PE13 +Mcu.Pin43=PD10 +Mcu.Pin44=PC5 +Mcu.Pin45=PF12 +Mcu.Pin46=PF15 +Mcu.Pin47=PE8 +Mcu.Pin48=PE9 +Mcu.Pin49=PE11 +Mcu.Pin5=PI6 +Mcu.Pin50=PE14 +Mcu.Pin51=PD9 +Mcu.Pin52=PD8 +Mcu.Pin53=PF11 +Mcu.Pin54=PF14 +Mcu.Pin55=PE7 +Mcu.Pin56=PE10 +Mcu.Pin57=PE12 +Mcu.Pin58=PE15 +Mcu.Pin59=PB14 +Mcu.Pin6=PI5 +Mcu.Pin60=PB15 +Mcu.Pin61=VP_SYS_VS_Systick +Mcu.Pin7=PD1 +Mcu.Pin8=PI3 +Mcu.Pin9=PI2 +Mcu.PinsNb=62 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32H743IIKx @@ -44,10 +114,182 @@ PC0.GPIOParameters=GPIO_Label PC0.GPIO_Label=LED_RED PC0.Locked=true PC0.Signal=GPIO_Output +PC4.GPIOParameters=GPIO_PuPd +PC4.GPIO_PuPd=GPIO_PULLUP +PC4.Locked=true +PC4.Mode=SdramChipSelect1_1 +PC4.Signal=FMC_SDNE0 +PC5.GPIOParameters=GPIO_PuPd +PC5.GPIO_PuPd=GPIO_PULLUP +PC5.Locked=true +PC5.Mode=SdramChipSelect1_1 +PC5.Signal=FMC_SDCKE0 +PD0.GPIOParameters=GPIO_PuPd +PD0.GPIO_PuPd=GPIO_PULLUP +PD0.Signal=FMC_D2_DA2 +PD1.GPIOParameters=GPIO_PuPd +PD1.GPIO_PuPd=GPIO_PULLUP +PD1.Signal=FMC_D3_DA3 +PD10.GPIOParameters=GPIO_PuPd +PD10.GPIO_PuPd=GPIO_PULLUP +PD10.Signal=FMC_D15_DA15 +PD14.GPIOParameters=GPIO_PuPd +PD14.GPIO_PuPd=GPIO_PULLUP +PD14.Signal=FMC_D0_DA0 +PD15.GPIOParameters=GPIO_PuPd +PD15.GPIO_PuPd=GPIO_PULLUP +PD15.Signal=FMC_D1_DA1 +PD8.GPIOParameters=GPIO_PuPd +PD8.GPIO_PuPd=GPIO_PULLUP +PD8.Signal=FMC_D13_DA13 +PD9.GPIOParameters=GPIO_PuPd +PD9.GPIO_PuPd=GPIO_PULLUP +PD9.Signal=FMC_D14_DA14 +PE0.GPIOParameters=GPIO_PuPd +PE0.GPIO_PuPd=GPIO_PULLUP +PE0.Signal=FMC_NBL0 +PE1.GPIOParameters=GPIO_PuPd +PE1.GPIO_PuPd=GPIO_PULLUP +PE1.Signal=FMC_NBL1 +PE10.GPIOParameters=GPIO_PuPd +PE10.GPIO_PuPd=GPIO_PULLUP +PE10.Signal=FMC_D7_DA7 +PE11.GPIOParameters=GPIO_PuPd +PE11.GPIO_PuPd=GPIO_PULLUP +PE11.Signal=FMC_D8_DA8 +PE12.GPIOParameters=GPIO_PuPd +PE12.GPIO_PuPd=GPIO_PULLUP +PE12.Signal=FMC_D9_DA9 +PE13.GPIOParameters=GPIO_PuPd +PE13.GPIO_PuPd=GPIO_PULLUP +PE13.Signal=FMC_D10_DA10 +PE14.GPIOParameters=GPIO_PuPd +PE14.GPIO_PuPd=GPIO_PULLUP +PE14.Signal=FMC_D11_DA11 +PE15.GPIOParameters=GPIO_PuPd +PE15.GPIO_PuPd=GPIO_PULLUP +PE15.Signal=FMC_D12_DA12 +PE7.GPIOParameters=GPIO_PuPd +PE7.GPIO_PuPd=GPIO_PULLUP +PE7.Signal=FMC_D4_DA4 +PE8.GPIOParameters=GPIO_PuPd +PE8.GPIO_PuPd=GPIO_PULLUP +PE8.Signal=FMC_D5_DA5 +PE9.GPIOParameters=GPIO_PuPd +PE9.GPIO_PuPd=GPIO_PULLUP +PE9.Signal=FMC_D6_DA6 +PF0.GPIOParameters=GPIO_PuPd +PF0.GPIO_PuPd=GPIO_PULLUP +PF0.Signal=FMC_A0 +PF1.GPIOParameters=GPIO_PuPd +PF1.GPIO_PuPd=GPIO_PULLUP +PF1.Signal=FMC_A1 +PF11.GPIOParameters=GPIO_PuPd +PF11.GPIO_PuPd=GPIO_PULLUP +PF11.Signal=FMC_SDNRAS +PF12.GPIOParameters=GPIO_PuPd +PF12.GPIO_PuPd=GPIO_PULLUP +PF12.Signal=FMC_A6 +PF13.GPIOParameters=GPIO_PuPd +PF13.GPIO_PuPd=GPIO_PULLUP +PF13.Signal=FMC_A7 +PF14.GPIOParameters=GPIO_PuPd +PF14.GPIO_PuPd=GPIO_PULLUP +PF14.Signal=FMC_A8 +PF15.GPIOParameters=GPIO_PuPd +PF15.GPIO_PuPd=GPIO_PULLUP +PF15.Signal=FMC_A9 +PF2.GPIOParameters=GPIO_PuPd +PF2.GPIO_PuPd=GPIO_PULLUP +PF2.Signal=FMC_A2 +PF3.GPIOParameters=GPIO_PuPd +PF3.GPIO_PuPd=GPIO_PULLUP +PF3.Signal=FMC_A3 +PF4.GPIOParameters=GPIO_PuPd +PF4.GPIO_PuPd=GPIO_PULLUP +PF4.Signal=FMC_A4 +PF5.GPIOParameters=GPIO_PuPd +PF5.GPIO_PuPd=GPIO_PULLUP +PF5.Signal=FMC_A5 +PG0.GPIOParameters=GPIO_PuPd +PG0.GPIO_PuPd=GPIO_PULLUP +PG0.Signal=FMC_A10 +PG1.GPIOParameters=GPIO_PuPd +PG1.GPIO_PuPd=GPIO_PULLUP +PG1.Signal=FMC_A11 +PG15.GPIOParameters=GPIO_PuPd +PG15.GPIO_PuPd=GPIO_PULLUP +PG15.Signal=FMC_SDNCAS +PG4.GPIOParameters=GPIO_PuPd +PG4.GPIO_PuPd=GPIO_PULLUP +PG4.Signal=FMC_A14_BA0 +PG5.GPIOParameters=GPIO_PuPd +PG5.GPIO_PuPd=GPIO_PULLUP +PG5.Signal=FMC_A15_BA1 +PG8.GPIOParameters=GPIO_PuPd +PG8.GPIO_PuPd=GPIO_PULLUP +PG8.Signal=FMC_SDCLK PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PH10.GPIOParameters=GPIO_PuPd +PH10.GPIO_PuPd=GPIO_PULLUP +PH10.Signal=FMC_D18 +PH11.GPIOParameters=GPIO_PuPd +PH11.GPIO_PuPd=GPIO_PULLUP +PH11.Signal=FMC_D19 +PH12.GPIOParameters=GPIO_PuPd +PH12.GPIO_PuPd=GPIO_PULLUP +PH12.Signal=FMC_D20 +PH13.GPIOParameters=GPIO_PuPd +PH13.GPIO_PuPd=GPIO_PULLUP +PH13.Signal=FMC_D21 +PH14.GPIOParameters=GPIO_PuPd +PH14.GPIO_PuPd=GPIO_PULLUP +PH14.Signal=FMC_D22 +PH15.GPIOParameters=GPIO_PuPd +PH15.GPIO_PuPd=GPIO_PULLUP +PH15.Signal=FMC_D23 +PH5.GPIOParameters=GPIO_PuPd +PH5.GPIO_PuPd=GPIO_PULLUP +PH5.Signal=FMC_SDNWE +PH8.GPIOParameters=GPIO_PuPd +PH8.GPIO_PuPd=GPIO_PULLUP +PH8.Signal=FMC_D16 +PH9.GPIOParameters=GPIO_PuPd +PH9.GPIO_PuPd=GPIO_PULLUP +PH9.Signal=FMC_D17 +PI0.GPIOParameters=GPIO_PuPd +PI0.GPIO_PuPd=GPIO_PULLUP +PI0.Signal=FMC_D24 +PI1.GPIOParameters=GPIO_PuPd +PI1.GPIO_PuPd=GPIO_PULLUP +PI1.Signal=FMC_D25 +PI10.GPIOParameters=GPIO_PuPd +PI10.GPIO_PuPd=GPIO_PULLUP +PI10.Signal=FMC_D31 +PI2.GPIOParameters=GPIO_PuPd +PI2.GPIO_PuPd=GPIO_PULLUP +PI2.Signal=FMC_D26 +PI3.GPIOParameters=GPIO_PuPd +PI3.GPIO_PuPd=GPIO_PULLUP +PI3.Signal=FMC_D27 +PI4.GPIOParameters=GPIO_PuPd +PI4.GPIO_PuPd=GPIO_PULLUP +PI4.Signal=FMC_NBL2 +PI5.GPIOParameters=GPIO_PuPd +PI5.GPIO_PuPd=GPIO_PULLUP +PI5.Signal=FMC_NBL3 +PI6.GPIOParameters=GPIO_PuPd +PI6.GPIO_PuPd=GPIO_PULLUP +PI6.Signal=FMC_D28 +PI7.GPIOParameters=GPIO_PuPd +PI7.GPIO_PuPd=GPIO_PULLUP +PI7.Signal=FMC_D29 +PI9.GPIOParameters=GPIO_PuPd +PI9.GPIO_PuPd=GPIO_PULLUP +PI9.Signal=FMC_D30 PinOutPanel.CurrentBGAView=Top PinOutPanel.RotationAngle=0 ProjectManager.AskForMigrate=true @@ -64,7 +306,7 @@ ProjectManager.FreePins=false ProjectManager.HalAssertFull=false ProjectManager.HeapSize=0x200 ProjectManager.KeepUserCode=true -ProjectManager.LastFirmware=true +ProjectManager.LastFirmware=false ProjectManager.LibraryCopy=1 ProjectManager.MainLocation=Core/Src ProjectManager.NoMain=false @@ -77,86 +319,194 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=MDK-ARM V5.32 ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true RCC.ADCFreq_Value=24187500 -RCC.AHB12Freq_Value=240000000 -RCC.AHB4Freq_Value=240000000 -RCC.APB1Freq_Value=120000000 -RCC.APB2Freq_Value=120000000 -RCC.APB3Freq_Value=120000000 -RCC.APB4Freq_Value=120000000 -RCC.AXIClockFreq_Value=240000000 +RCC.AHB12Freq_Value=200000000 +RCC.AHB4Freq_Value=200000000 +RCC.APB1Freq_Value=100000000 +RCC.APB2Freq_Value=100000000 +RCC.APB3Freq_Value=100000000 +RCC.APB4Freq_Value=100000000 +RCC.AXIClockFreq_Value=200000000 RCC.CECFreq_Value=32000 RCC.CKPERFreq_Value=64000000 -RCC.CortexFreq_Value=480000000 -RCC.CpuClockFreq_Value=480000000 -RCC.D1CPREFreq_Value=480000000 +RCC.CortexFreq_Value=400000000 +RCC.CpuClockFreq_Value=400000000 +RCC.D1CPREFreq_Value=400000000 RCC.D1PPRE=RCC_APB3_DIV2 RCC.D2PPRE1=RCC_APB1_DIV2 RCC.D2PPRE2=RCC_APB2_DIV2 RCC.D3PPRE=RCC_APB4_DIV2 -RCC.DFSDMACLkFreq_Value=480000000 -RCC.DFSDMFreq_Value=120000000 -RCC.DIVM1=1 -RCC.DIVN1=80 -RCC.DIVP1Freq_Value=480000000 +RCC.DFSDMACLkFreq_Value=400000000 +RCC.DFSDMFreq_Value=100000000 +RCC.DIVM1=3 +RCC.DIVN1=200 +RCC.DIVP1Freq_Value=400000000 RCC.DIVP2Freq_Value=24187500 RCC.DIVP3Freq_Value=24187500 -RCC.DIVQ1Freq_Value=480000000 +RCC.DIVQ1Freq_Value=400000000 RCC.DIVQ2Freq_Value=24187500 RCC.DIVQ3Freq_Value=24187500 -RCC.DIVR1Freq_Value=480000000 +RCC.DIVR1Freq_Value=400000000 RCC.DIVR2Freq_Value=24187500 RCC.DIVR3Freq_Value=24187500 -RCC.FDCANFreq_Value=480000000 -RCC.FMCFreq_Value=240000000 +RCC.FDCANFreq_Value=400000000 +RCC.FMCFreq_Value=200000000 RCC.FamilyName=M -RCC.HCLK3ClockFreq_Value=240000000 -RCC.HCLKFreq_Value=240000000 +RCC.HCLK3ClockFreq_Value=200000000 +RCC.HCLKFreq_Value=200000000 RCC.HPRE=RCC_HCLK_DIV2 -RCC.HRTIMFreq_Value=240000000 +RCC.HRTIMFreq_Value=200000000 RCC.HSE_VALUE=12000000 -RCC.I2C123Freq_Value=120000000 -RCC.I2C4Freq_Value=120000000 +RCC.I2C123Freq_Value=100000000 +RCC.I2C4Freq_Value=100000000 RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value -RCC.LPTIM1Freq_Value=120000000 -RCC.LPTIM2Freq_Value=120000000 -RCC.LPTIM345Freq_Value=120000000 -RCC.LPUART1Freq_Value=120000000 +RCC.LPTIM1Freq_Value=100000000 +RCC.LPTIM2Freq_Value=100000000 +RCC.LPTIM345Freq_Value=100000000 +RCC.LPUART1Freq_Value=100000000 RCC.LTDCFreq_Value=24187500 RCC.MCO1PinFreq_Value=64000000 -RCC.MCO2PinFreq_Value=480000000 +RCC.MCO2PinFreq_Value=400000000 RCC.PLL2FRACN=0 RCC.PLL3FRACN=0 RCC.PLLFRACN=0 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE -RCC.QSPIFreq_Value=240000000 +RCC.QSPIFreq_Value=200000000 RCC.RNGFreq_Value=48000000 RCC.RTCFreq_Value=32000 -RCC.SAI1Freq_Value=480000000 -RCC.SAI23Freq_Value=480000000 -RCC.SAI4AFreq_Value=480000000 -RCC.SAI4BFreq_Value=480000000 -RCC.SDMMCFreq_Value=480000000 -RCC.SPDIFRXFreq_Value=480000000 -RCC.SPI123Freq_Value=480000000 -RCC.SPI45Freq_Value=120000000 -RCC.SPI6Freq_Value=120000000 -RCC.SWPMI1Freq_Value=120000000 -RCC.SYSCLKFreq_VALUE=480000000 +RCC.SAI1Freq_Value=400000000 +RCC.SAI23Freq_Value=400000000 +RCC.SAI4AFreq_Value=400000000 +RCC.SAI4BFreq_Value=400000000 +RCC.SDMMCFreq_Value=400000000 +RCC.SPDIFRXFreq_Value=400000000 +RCC.SPI123Freq_Value=400000000 +RCC.SPI45Freq_Value=100000000 +RCC.SPI6Freq_Value=100000000 +RCC.SWPMI1Freq_Value=100000000 +RCC.SYSCLKFreq_VALUE=400000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.Tim1OutputFreq_Value=240000000 -RCC.Tim2OutputFreq_Value=240000000 +RCC.Tim1OutputFreq_Value=200000000 +RCC.Tim2OutputFreq_Value=200000000 RCC.TraceFreq_Value=64000000 -RCC.USART16Freq_Value=120000000 -RCC.USART234578Freq_Value=120000000 -RCC.USBFreq_Value=480000000 -RCC.VCO1OutputFreq_Value=960000000 +RCC.USART16Freq_Value=100000000 +RCC.USART234578Freq_Value=100000000 +RCC.USBFreq_Value=400000000 +RCC.VCO1OutputFreq_Value=800000000 RCC.VCO2OutputFreq_Value=48375000 RCC.VCO3OutputFreq_Value=48375000 -RCC.VCOInput1Freq_Value=12000000 +RCC.VCOInput1Freq_Value=4000000 RCC.VCOInput2Freq_Value=375000 RCC.VCOInput3Freq_Value=375000 +SH.FMC_A0.0=FMC_A0,12b-sda1 +SH.FMC_A0.ConfNb=1 +SH.FMC_A1.0=FMC_A1,12b-sda1 +SH.FMC_A1.ConfNb=1 +SH.FMC_A10.0=FMC_A10,12b-sda1 +SH.FMC_A10.ConfNb=1 +SH.FMC_A11.0=FMC_A11,12b-sda1 +SH.FMC_A11.ConfNb=1 +SH.FMC_A14_BA0.0=FMC_BA0,FourSdramBanks1 +SH.FMC_A14_BA0.ConfNb=1 +SH.FMC_A15_BA1.0=FMC_BA1,FourSdramBanks1 +SH.FMC_A15_BA1.ConfNb=1 +SH.FMC_A2.0=FMC_A2,12b-sda1 +SH.FMC_A2.ConfNb=1 +SH.FMC_A3.0=FMC_A3,12b-sda1 +SH.FMC_A3.ConfNb=1 +SH.FMC_A4.0=FMC_A4,12b-sda1 +SH.FMC_A4.ConfNb=1 +SH.FMC_A5.0=FMC_A5,12b-sda1 +SH.FMC_A5.ConfNb=1 +SH.FMC_A6.0=FMC_A6,12b-sda1 +SH.FMC_A6.ConfNb=1 +SH.FMC_A7.0=FMC_A7,12b-sda1 +SH.FMC_A7.ConfNb=1 +SH.FMC_A8.0=FMC_A8,12b-sda1 +SH.FMC_A8.ConfNb=1 +SH.FMC_A9.0=FMC_A9,12b-sda1 +SH.FMC_A9.ConfNb=1 +SH.FMC_D0_DA0.0=FMC_D0,sd-32b-d1 +SH.FMC_D0_DA0.ConfNb=1 +SH.FMC_D10_DA10.0=FMC_D10,sd-32b-d1 +SH.FMC_D10_DA10.ConfNb=1 +SH.FMC_D11_DA11.0=FMC_D11,sd-32b-d1 +SH.FMC_D11_DA11.ConfNb=1 +SH.FMC_D12_DA12.0=FMC_D12,sd-32b-d1 +SH.FMC_D12_DA12.ConfNb=1 +SH.FMC_D13_DA13.0=FMC_D13,sd-32b-d1 +SH.FMC_D13_DA13.ConfNb=1 +SH.FMC_D14_DA14.0=FMC_D14,sd-32b-d1 +SH.FMC_D14_DA14.ConfNb=1 +SH.FMC_D15_DA15.0=FMC_D15,sd-32b-d1 +SH.FMC_D15_DA15.ConfNb=1 +SH.FMC_D16.0=FMC_D16,sd-32b-d1 +SH.FMC_D16.ConfNb=1 +SH.FMC_D17.0=FMC_D17,sd-32b-d1 +SH.FMC_D17.ConfNb=1 +SH.FMC_D18.0=FMC_D18,sd-32b-d1 +SH.FMC_D18.ConfNb=1 +SH.FMC_D19.0=FMC_D19,sd-32b-d1 +SH.FMC_D19.ConfNb=1 +SH.FMC_D1_DA1.0=FMC_D1,sd-32b-d1 +SH.FMC_D1_DA1.ConfNb=1 +SH.FMC_D20.0=FMC_D20,sd-32b-d1 +SH.FMC_D20.ConfNb=1 +SH.FMC_D21.0=FMC_D21,sd-32b-d1 +SH.FMC_D21.ConfNb=1 +SH.FMC_D22.0=FMC_D22,sd-32b-d1 +SH.FMC_D22.ConfNb=1 +SH.FMC_D23.0=FMC_D23,sd-32b-d1 +SH.FMC_D23.ConfNb=1 +SH.FMC_D24.0=FMC_D24,sd-32b-d1 +SH.FMC_D24.ConfNb=1 +SH.FMC_D25.0=FMC_D25,sd-32b-d1 +SH.FMC_D25.ConfNb=1 +SH.FMC_D26.0=FMC_D26,sd-32b-d1 +SH.FMC_D26.ConfNb=1 +SH.FMC_D27.0=FMC_D27,sd-32b-d1 +SH.FMC_D27.ConfNb=1 +SH.FMC_D28.0=FMC_D28,sd-32b-d1 +SH.FMC_D28.ConfNb=1 +SH.FMC_D29.0=FMC_D29,sd-32b-d1 +SH.FMC_D29.ConfNb=1 +SH.FMC_D2_DA2.0=FMC_D2,sd-32b-d1 +SH.FMC_D2_DA2.ConfNb=1 +SH.FMC_D30.0=FMC_D30,sd-32b-d1 +SH.FMC_D30.ConfNb=1 +SH.FMC_D31.0=FMC_D31,sd-32b-d1 +SH.FMC_D31.ConfNb=1 +SH.FMC_D3_DA3.0=FMC_D3,sd-32b-d1 +SH.FMC_D3_DA3.ConfNb=1 +SH.FMC_D4_DA4.0=FMC_D4,sd-32b-d1 +SH.FMC_D4_DA4.ConfNb=1 +SH.FMC_D5_DA5.0=FMC_D5,sd-32b-d1 +SH.FMC_D5_DA5.ConfNb=1 +SH.FMC_D6_DA6.0=FMC_D6,sd-32b-d1 +SH.FMC_D6_DA6.ConfNb=1 +SH.FMC_D7_DA7.0=FMC_D7,sd-32b-d1 +SH.FMC_D7_DA7.ConfNb=1 +SH.FMC_D8_DA8.0=FMC_D8,sd-32b-d1 +SH.FMC_D8_DA8.ConfNb=1 +SH.FMC_D9_DA9.0=FMC_D9,sd-32b-d1 +SH.FMC_D9_DA9.ConfNb=1 +SH.FMC_NBL0.0=FMC_NBL0,Sd4ByteEnable1 +SH.FMC_NBL0.ConfNb=1 +SH.FMC_NBL1.0=FMC_NBL1,Sd4ByteEnable1 +SH.FMC_NBL1.ConfNb=1 +SH.FMC_NBL2.0=FMC_NBL2,Sd4ByteEnable1 +SH.FMC_NBL2.ConfNb=1 +SH.FMC_NBL3.0=FMC_NBL3,Sd4ByteEnable1 +SH.FMC_NBL3.ConfNb=1 +SH.FMC_SDCLK.0=FMC_SDCLK,12b-sda1 +SH.FMC_SDCLK.ConfNb=1 +SH.FMC_SDNCAS.0=FMC_SDNCAS,12b-sda1 +SH.FMC_SDNCAS.ConfNb=1 +SH.FMC_SDNRAS.0=FMC_SDNRAS,12b-sda1 +SH.FMC_SDNRAS.ConfNb=1 +SH.FMC_SDNWE.0=FMC_SDNWE,12b-sda1 +SH.FMC_SDNWE.ConfNb=1 USART1.IPParameters=VirtualMode-Asynchronous USART1.VirtualMode-Asynchronous=VM_ASYNC VP_SYS_VS_Systick.Mode=SysTick diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/Kconfig b/bsp/stm32/stm32h743-openmv-h7plus/board/Kconfig index 8b58cf83c6..4e70d561bb 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/board/Kconfig +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/Kconfig @@ -45,7 +45,10 @@ menu "On-chip Peripheral Drivers" depends on BSP_USING_LPUART1 && RT_SERIAL_USING_DMA default n endif - + config BSP_USING_SDRAM + bool "Enable SDRAM" + default n + source "../libraries/HAL_Drivers/Kconfig" endmenu diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/SConscript b/bsp/stm32/stm32h743-openmv-h7plus/board/SConscript index 72895390e2..be2f2c74ad 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/board/SConscript +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/SConscript @@ -14,6 +14,7 @@ CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c path = [cwd] path += [cwd + '/CubeMX_Config/Core/Inc'] +path += [cwd + '/ports'] startup_path_prefix = SDK_LIB diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/board.c b/bsp/stm32/stm32h743-openmv-h7plus/board/board.c index 3d87624070..195c97cbc5 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/board/board.c +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/board.c @@ -14,7 +14,7 @@ void SystemClock_Config(void) { - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; /** Supply configuration update enable @@ -22,7 +22,7 @@ void SystemClock_Config(void) HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); /** Configure the main internal regulator output voltage */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} /** Initializes the RCC Oscillators according to the specified parameters @@ -32,12 +32,12 @@ void SystemClock_Config(void) RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 80; + RCC_OscInitStruct.PLL.PLLM = 3; + RCC_OscInitStruct.PLL.PLLN = 200; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 2; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) @@ -57,7 +57,7 @@ void SystemClock_Config(void) RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { Error_Handler(); } diff --git a/bsp/stm32/stm32h743-openmv-h7plus/board/ports/sdram_port.h b/bsp/stm32/stm32h743-openmv-h7plus/board/ports/sdram_port.h new file mode 100644 index 0000000000..ea4afbc2f5 --- /dev/null +++ b/bsp/stm32/stm32h743-openmv-h7plus/board/ports/sdram_port.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-14 supperthomas The first version for STM32H7xx + */ + +#ifndef __SDRAM_PORT_H__ +#define __SDRAM_PORT_H__ + +/* parameters for sdram peripheral */ +/* Bank1 or Bank2 */ +#define SDRAM_TARGET_BANK 1 +/* stm32h7 Bank1:0XC0000000 Bank2:0XD0000000 */ +#define SDRAM_BANK_ADDR ((uint32_t)0XC0000000) +/* data width: 8, 16, 32 */ +#define SDRAM_DATA_WIDTH 32 +/* column bit numbers: 8, 9, 10, 11 */ +#define SDRAM_COLUMN_BITS 9 +/* row bit numbers: 11, 12, 13 */ +#define SDRAM_ROW_BITS 12 +/* cas latency clock number: 1, 2, 3 */ +#define SDRAM_CAS_LATENCY 2 +/* read pipe delay: 0, 1, 2 */ +#define SDRAM_RPIPE_DELAY 0 +/* clock divid: 2, 3 */ +#define SDCLOCK_PERIOD 2 +/* refresh rate counter */ +#define SDRAM_REFRESH_RATE (64) // ms +#define SDRAM_FREQUENCY (100000) // 100 MHz +#define SDRAM_REFRESH_CYCLES 4096 +#define SDRAM_REFRESH_COUNT (SDRAM_REFRESH_RATE * SDRAM_FREQUENCY / SDRAM_REFRESH_CYCLES - 20) //((uint32_t)0x02A5) +#define SDRAM_SIZE (32 * 1024 * 1024) + +/* Timing configuration for W9825G6KH-6 */ +/* 100 MHz of HCKL3 clock frequency (200MHz/2) */ +/* TMRD: 2 Clock cycles */ +#define LOADTOACTIVEDELAY 2 +/* TXSR: 8x10ns */ +#define EXITSELFREFRESHDELAY 7 +/* TRAS: 5x10ns */ +#define SELFREFRESHTIME 5 +/* TRC: 7x10ns */ +#define ROWCYCLEDELAY 6 +/* TWR: 2 Clock cycles */ +#define WRITERECOVERYTIME 3 +/* TRP: 2x10ns */ +#define RPDELAY 2 +/* TRCD: 2x10ns */ +#define RCDDELAY 2 + +/* memory mode register */ +#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000) +#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001) +#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002) +#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004) +#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) +#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008) +#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020) +#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030) +#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000) +#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) +#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) + +#endif -- GitLab