未验证 提交 c3ffe186 编写于 作者: mysterywolf's avatar mysterywolf 提交者: GitHub

Merge pull request #27 from RT-Thread/master

pr
......@@ -127,3 +127,8 @@ void rt_hw_board_init(void)
rt_components_board_init();
#endif
}
void rt_hw_us_delay(rt_uint32_t us)
{
}
......@@ -12,7 +12,13 @@
#define BOARD_H__
#include <rtthread.h>
#include "ab32vgx.h"
#include "drv_gpio.h"
#include <ab32vgx.h>
#ifdef RT_USING_PIN
#include <drv_gpio.h>
#endif
#ifdef RT_USING_WDT
#include <drv_wdt.h>
#endif
#endif
......@@ -12,6 +12,8 @@
#ifdef RT_USING_WDT
#include <drv_wdt.h>
// #define DRV_DEBUG
#define LOG_TAG "drv.wdt"
#include <drv_log.h>
......@@ -49,35 +51,35 @@ static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
switch (*((rt_uint32_t *)arg))
{
case 0:
case AB32_WDT_TIMEOUT_1MS:
LOG_I("The watchdog timeout is set to 1ms");
tmp |= (0xa << 24) | (0x00 << 20);
break;
case 1:
case AB32_WDT_TIMEOUT_256MS:
LOG_I("The watchdog timeout is set to 256ms");
tmp |= (0xa << 24) | (0x01 << 20);
break;
case 2:
case AB32_WDT_TIMEOUT_512MS:
LOG_I("The watchdog timeout is set to 512ms");
tmp |= (0xa << 24) | (0x02 << 20);
break;
case 3:
case AB32_WDT_TIMEOUT_1024MS:
LOG_I("The watchdog timeout is set to 1024ms");
tmp |= (0xa << 24) | (0x03 << 20);
break;
case 4:
case AB32_WDT_TIMEOUT_2048MS:
LOG_I("The watchdog timeout is set to 2048ms");
tmp |= (0xa << 24) | (0x04 << 20);
break;
case 5:
case AB32_WDT_TIMEOUT_4096MS:
LOG_I("The watchdog timeout is set to 4096ms");
tmp |= (0xa << 24) | (0x05 << 20);
break;
case 6:
case AB32_WDT_TIMEOUT_8192MS:
LOG_I("The watchdog timeout is set to 8192ms");
tmp |= (0xa << 24) | (0x06 << 20);
break;
case 7:
case AB32_WDT_TIMEOUT_16384MS:
LOG_I("The watchdog timeout is set to 16384ms");
tmp |= (0xa << 24) | (0x07 << 20);
break;
......@@ -92,28 +94,28 @@ static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
switch ((WDTCON >> 20) & 0x7)
{
case 0:
case AB32_WDT_TIMEOUT_1MS:
LOG_D("The watchdog timeout is set to 1ms");
break;
case 1:
case AB32_WDT_TIMEOUT_256MS:
LOG_D("The watchdog timeout is set to 256ms");
break;
case 2:
case AB32_WDT_TIMEOUT_512MS:
LOG_D("The watchdog timeout is set to 512ms");
break;
case 3:
case AB32_WDT_TIMEOUT_1024MS:
LOG_D("The watchdog timeout is set to 1024ms");
break;
case 4:
case AB32_WDT_TIMEOUT_2048MS:
LOG_D("The watchdog timeout is set to 2048ms");
break;
case 5:
case AB32_WDT_TIMEOUT_4096MS:
LOG_D("The watchdog timeout is set to 4096ms");
break;
case 6:
case AB32_WDT_TIMEOUT_8192MS:
LOG_D("The watchdog timeout is set to 8192ms");
break;
case 7:
case AB32_WDT_TIMEOUT_16384MS:
LOG_D("The watchdog timeout is set to 16384ms");
break;
default:
......
/*
* Copyright (c) 2020-2021, Bluetrum Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-03-11 Meco Man first version
*/
#ifndef DRV_WDT_H__
#define DRV_WDT_H__
#define AB32_WDT_TIMEOUT_1MS 0
#define AB32_WDT_TIMEOUT_256MS 1
#define AB32_WDT_TIMEOUT_512MS 2
#define AB32_WDT_TIMEOUT_1024MS 3
#define AB32_WDT_TIMEOUT_2048MS 4
#define AB32_WDT_TIMEOUT_4096MS 5
#define AB32_WDT_TIMEOUT_8192MS 6
#define AB32_WDT_TIMEOUT_16384MS 7
#endif
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......@@ -15,7 +15,7 @@
#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) \
&& !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5)
#error "Please define at least one BSP_USING_UARTx"
/* this driver can be disabled at menuconfig RT-Thread Components Device Drivers */
/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
#endif
struct gd32_usart {
......
......@@ -66,3 +66,16 @@ void rt_hw_board_init(void)
#endif
}
void rt_hw_us_delay(rt_uint32_t us)
{
rt_uint32_t start, now, delta, reload, us_tick;
start = SysTick->VAL;
reload = SysTick->LOAD;
us_tick = SystemCoreClock / 1000000UL;
do
{
now = SysTick->VAL;
delta = start >= now ? start - now : reload + start - now;
}
while (delta < us_tick * us);
}
......@@ -62,6 +62,7 @@ if PLATFORM == 'gcc':
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
CXX = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
......
......@@ -9,6 +9,7 @@
* 2019-3-2 jinsheng add Macro judgment
* 2020-1-6 duminmin support single bank mode
* 2020-5-17 yufanyufan77 support support H7
* 2021-3-3 zhuyf233 fix some bugs
*/
#include "board.h"
......@@ -24,110 +25,6 @@
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
#define ADDR_FLASH_SECTOR_0 ((rt_uint32_t)0x08000000) /* Base address of Sector 0, 128 Kbytes */
#define ADDR_FLASH_SECTOR_1 ((rt_uint32_t)0x08020000) /* Base address of Sector 1, 128 Kbytes */
#define ADDR_FLASH_SECTOR_2 ((rt_uint32_t)0x08040000) /* Base address of Sector 2, 128 Kbytes */
#define ADDR_FLASH_SECTOR_3 ((rt_uint32_t)0x08060000) /* Base address of Sector 3, 128 Kbytes */
#define ADDR_FLASH_SECTOR_4 ((rt_uint32_t)0x08080000) /* Base address of Sector 4, 128 Kbytes */
#define ADDR_FLASH_SECTOR_5 ((rt_uint32_t)0x080A0000) /* Base address of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_6 ((rt_uint32_t)0x080C0000) /* Base address of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_7 ((rt_uint32_t)0x080E0000) /* Base address of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_8 ((rt_uint32_t)0x08100000) /* Base address of Sector 8, 128 Kbytes */
#define FLASH_SECTOR_0 0U /* Sector Number 0 */
#define FLASH_SECTOR_1 1U /* Sector Number 1 */
#define FLASH_SECTOR_2 2U /* Sector Number 2 */
#define FLASH_SECTOR_3 3U /* Sector Number 3 */
#define FLASH_SECTOR_4 4U /* Sector Number 4 */
#define FLASH_SECTOR_5 5U /* Sector Number 5 */
#define FLASH_SECTOR_6 6U /* Sector Number 6 */
#define FLASH_SECTOR_7 7U /* Sector Number 7 */
/**
* @brief Gets the sector of a given address
* @param addr flash address
* @param flash bank
* @param flash sector
* @retval The sector of a given address
*/
static void GetSector(rt_uint32_t Address,uint32_t* bank,uint32_t* sector)
{
#if defined (FLASH_OPTCR_nDBANK)
FLASH_OBProgramInitTypeDef OBInit;
uint32_t nbank = 0;
/* get duel bank ability:nDBANK(Bit29) */
HAL_FLASHEx_OBGetConfig(&OBInit);
nbank = ((OBInit.USERConfig & 0x20000000U) >> 29);
/* 1:single bank mode */
if (1 == nbank)
{
if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0))
{
sector = FLASH_SECTOR_0;
}
else if ((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1))
{
sector = FLASH_SECTOR_1;
}
else if ((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2))
{
sector = FLASH_SECTOR_2;
}
else if ((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3))
{
sector = FLASH_SECTOR_3;
}
else if ((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4))
{
sector = FLASH_SECTOR_4;
}
else if ((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5))
{
sector = FLASH_SECTOR_5;
}
else if ((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6))
{
sector = FLASH_SECTOR_6;
}
else if ((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7))
{
sector = FLASH_SECTOR_7;
}
else if ((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8))
{
sector = FLASH_SECTOR_8;
}
else if ((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9))
{
sector = FLASH_SECTOR_9;
}
else if ((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10))
{
sector = FLASH_SECTOR_10;
}
else
{
sector = FLASH_SECTOR_11;
}
}
else /* 0:dual bank mode */
{
LOG_E("rtthread doesn't support duel bank mode yet!");
RT_ASSERT(0);
}
#else /* no dual bank ability */
*sector = (Address&0xffffff)/FLASH_SIZE_GRANULARITY_128K;
if(*sector>7)
{
*bank = FLASH_BANK_1;
*sector = *sector/2;
}
else
{
*bank = FLASH_BANK_2;
}
#endif
}
/**
* Read data from flash.
......@@ -137,16 +34,16 @@ static void GetSector(rt_uint32_t Address,uint32_t* bank,uint32_t* sector)
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
* @retval The length of bytes that have been read
*/
int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
if ((addr + size - 1) > FLASH_END)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -1;
return -RT_ERROR;
}
for (i = 0; i < size; i++, buf++, addr++)
......@@ -166,47 +63,68 @@ int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
* @return The length of bytes that have been written
*/
int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t end_addr = addr + size;
rt_uint32_t bank = addr/ADDR_FLASH_SECTOR_8;;
rt_uint32_t end_addr = addr + size - 1, write_addr;
rt_uint32_t write_granularity = FLASH_NB_32BITWORD_IN_FLASHWORD * 4;
rt_uint32_t write_size = write_granularity;
rt_uint8_t write_buffer[32] = {0};
if ((end_addr) > STM32_FLASH_END_ADDRESS)
if ((end_addr) > FLASH_END)
{
LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -RT_EINVAL;
}
if(addr % 32 != 0)
{
LOG_E("write addr must be 32-byte alignment");
return -RT_EINVAL;
}
if (size < 1)
{
return -RT_EINVAL;
}
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR );
for (size_t i = 0; i < size/32; i++, addr+=32, buf+=32)
write_addr = (uint32_t)buf;
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR);
while (addr < end_addr)
{
/* write data to flash */
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, addr, (uint64_t)((uint32_t)buf)) == HAL_OK)
if(end_addr - addr + 1 < write_granularity)
{
if (*(rt_uint8_t *)addr != *buf)
write_size = end_addr - addr + 1;
for(size_t i = 0; i < write_size; i++)
{
write_buffer[i] = *((uint8_t *)(write_addr + i));
}
write_addr = (uint32_t)((rt_uint32_t *)write_buffer);
}
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, addr, write_addr) == HAL_OK)
{
for(rt_uint8_t i = 0; i < write_size; i++)
{
if (*(rt_uint8_t *)(addr + i) != *(rt_uint8_t *)(write_addr + i))
{
result = -RT_ERROR;
break;
goto __exit;
}
}
addr += write_granularity;
write_addr += write_granularity;
}
else
{
result = -RT_ERROR;
break;
goto __exit;
}
}
__exit:
HAL_FLASH_Lock();
if (result != RT_EOK)
......@@ -230,42 +148,74 @@ int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
int stm32_flash_erase(rt_uint32_t addr, size_t size)
{
rt_err_t result = RT_EOK;
rt_uint32_t FirstSector = 0, NbOfSectors = 0;
rt_uint32_t SECTORError = 0;
rt_uint32_t bank = 0;
if ((addr + size) > STM32_FLASH_END_ADDRESS)
if ((addr + size - 1) > FLASH_END)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
return -RT_EINVAL;
}
rt_uint32_t addr_bank1 = 0;
rt_uint32_t size_bank1 = 0;
rt_uint32_t addr_bank2 = 0;
rt_uint32_t size_bank2 = 0;
if((addr + size) < FLASH_BANK2_BASE)
{
addr_bank1 = addr;
size_bank1 = size;
size_bank2 = 0;
}
else if(addr >= FLASH_BANK2_BASE)
{
size_bank1 = 0;
addr_bank2 = addr;
size_bank2 = size;
}
else
{
addr_bank1 = addr;
size_bank1 = FLASH_BANK2_BASE - addr_bank1;
addr_bank2 = FLASH_BANK2_BASE;
size_bank2 = addr + size - FLASH_BANK2_BASE;
}
/*Variable used for Erase procedure*/
FLASH_EraseInitTypeDef EraseInitStruct;
/* Unlock the Flash to enable the flash control register access */
HAL_FLASH_Unlock();
/* Get the 1st sector to erase */
GetSector(addr,&bank,&FirstSector);
/* Get the number of sector to erase from 1st sector */
GetSector(addr + size,0,&NbOfSectors);
NbOfSectors = NbOfSectors - FirstSector + 1;
/* Fill EraseInit structure */
EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3;
EraseInitStruct.Sector = FirstSector;
EraseInitStruct.NbSectors = NbOfSectors;
EraseInitStruct.Banks = bank;
SCB_DisableDCache();
if(size_bank1)
{
EraseInitStruct.Sector = (addr_bank1 - FLASH_BANK1_BASE) / FLASH_SECTOR_SIZE;
EraseInitStruct.NbSectors = (addr_bank1 + size_bank1 -1 - FLASH_BANK1_BASE) / FLASH_SECTOR_SIZE - EraseInitStruct.Sector + 1;
EraseInitStruct.Banks = FLASH_BANK_1;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &SECTORError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
}
if(size_bank2)
{
EraseInitStruct.Sector = (addr_bank2 - FLASH_BANK2_BASE) / FLASH_SECTOR_SIZE;
EraseInitStruct.NbSectors = (addr_bank2 + size_bank2 -1 - FLASH_BANK2_BASE) / FLASH_SECTOR_SIZE - EraseInitStruct.Sector + 1;
EraseInitStruct.Banks = FLASH_BANK_2;
if (HAL_FLASHEx_Erase(&EraseInitStruct, &SECTORError) != HAL_OK)
{
result = -RT_ERROR;
goto __exit;
}
}
__exit:
SCB_EnableDCache();
HAL_FLASH_Lock();
if (result != RT_EOK)
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......
......@@ -1113,9 +1113,19 @@ static rt_err_t rt_serial_control(struct rt_device *dev,
struct winsize* p_winsize;
p_winsize = (struct winsize*)args;
rt_enter_critical();
rt_kprintf("\x1b[8;%d;%dt", p_winsize->ws_col, p_winsize->ws_row);
rt_exit_critical();
}
break;
case TIOCGWINSZ:
{
struct winsize* p_winsize;
p_winsize = (struct winsize*)args;
/* TODO: get windows size from console */
p_winsize->ws_col = 80;
p_winsize->ws_row = 24;
p_winsize->ws_xpixel = 0;/*unused*/
p_winsize->ws_ypixel = 0;/*unused*/
}
break;
#endif /*RT_USING_POSIX_TERMIOS*/
......
uIP is a very small implementation of the TCP/IP stack that is written
by Adam Dunkels <adam@sics.se>. More information can be obtained
at the uIP homepage at http://www.sics.se/~adam/uip/.
This is version $Name: uip-1-0 $.
The directory structure look as follows:
apps/ - Example applications
doc/ - Documentation
lib/ - Library code used by some applications
uip/ - uIP TCP/IP stack code
unix/ - uIP as a user space process under FreeBSD or Linux
This directory contains a few example applications. They are not all
heavily tested, however.
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