/* Copyright (c) 2020 PaddlePaddle Authors. All Rights Reserved. Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ #ifdef PADDLE_WITH_XPU #include #include #include #include "paddle/fluid/framework/op_registry.h" #include "paddle/fluid/framework/op_version_registry.h" #include "paddle/phi/core/ddim.h" namespace paddle { namespace operators { using Tensor = framework::Tensor; template class GatherOpXPUKernel : public framework::OpKernel { using XPUType = typename XPUTypeTrait::Type; public: void Compute(const framework::ExecutionContext &ctx) const override { PADDLE_ENFORCE_EQ( platform::is_xpu_place(ctx.GetPlace()), true, platform::errors::PreconditionNotMet("This kernel only runs on XPU.")); auto *x = ctx.Input("X"); auto *index = ctx.Input("Index"); auto *output = ctx.Output("Out"); int axis = ctx.Attr("axis"); if (ctx.HasInput("Axis")) { Tensor cpu_axis; const Tensor *axis_tensor = ctx.Input("Axis"); framework::TensorCopy(*axis_tensor, platform::CPUPlace(), &cpu_axis); const auto &axis_type = axis_tensor->dtype(); if (framework::TransToProtoVarType(axis_type) == framework::proto::VarType::INT32) { axis = static_cast(cpu_axis.data()[0]); } else if (framework::TransToProtoVarType(axis_type) == framework::proto::VarType::INT64) { axis = static_cast(cpu_axis.data()[0]); } } output->mutable_data(ctx.GetPlace()); if (x->numel() == 0) return; const auto index_dims = index->dims(); if (index_dims.size() == 2) { PADDLE_ENFORCE_EQ( index_dims[1], 1, platform::errors::InvalidArgument( "The last dim of index should be 1 when it is 2D, but we get %d", index_dims[1])); } else { PADDLE_ENFORCE_EQ( index_dims.size(), 1, platform::errors::InvalidArgument( "The index should be 1D, when it is not 2D, but we get %d", index_dims.size())); } std::vector xshape(x->dims().size()); for (int i = 0; i < x->dims().size(); ++i) { xshape[i] = x->dims()[i]; } auto &dev_ctx = ctx.template device_context(); int r = XPU_SUCCESS; if (framework::TransToProtoVarType(index->dtype()) == framework::proto::VarType::INT32) { r = xpu::gather( dev_ctx.x_context(), reinterpret_cast(x->data()), index->data(), reinterpret_cast(output->data()), xshape, index->dims()[0], axis); } else { r = xpu::gather( dev_ctx.x_context(), reinterpret_cast(x->data()), index->data(), reinterpret_cast(output->data()), xshape, index->dims()[0], axis); } PADDLE_ENFORCE_EQ(r, xpu::Error_t::SUCCESS, platform::errors::External( "XPU gather kernel return wrong value[%d %s]", r, XPUAPIErrorMsg[r])); } }; template class GatherGradOpXPUKernel : public framework::OpKernel { using XPUType = typename XPUTypeTrait::Type; public: void Compute(const framework::ExecutionContext &ctx) const override { PADDLE_ENFORCE_EQ( platform::is_xpu_place(ctx.GetPlace()), true, platform::errors::PreconditionNotMet("This kernel only runs on XPU.")); auto *index = ctx.Input("Index"); auto *dx = ctx.Output(framework::GradVarName("X")); auto *dout = ctx.Input(framework::GradVarName("Out")); auto &dev_ctx = ctx.template device_context(); int axis = ctx.Attr("axis"); if (ctx.HasInput("Axis")) { Tensor cpu_axis; const Tensor *axis_tensor = ctx.Input("Axis"); framework::TensorCopy(*axis_tensor, platform::CPUPlace(), &cpu_axis); const auto &axis_type = axis_tensor->dtype(); if (framework::TransToProtoVarType(axis_type) == framework::proto::VarType::INT32) { axis = static_cast(cpu_axis.data()[0]); } else if (framework::TransToProtoVarType(axis_type) == framework::proto::VarType::INT64) { axis = static_cast(cpu_axis.data()[0]); } } if (dout->numel() == 0) { return; } bool overwrite = ctx.Attr("overwrite"); const auto index_dims = index->dims(); if (index_dims.size() == 2) { PADDLE_ENFORCE_EQ( index_dims[1], 1, platform::errors::InvalidArgument( "The last dim of index should be 1 when it is 2D, but we get %d", index_dims[1])); } else { PADDLE_ENFORCE_EQ( index_dims.size(), 1, platform::errors::InvalidArgument( "The index should be 1D, when it is not 2D, but we get %d", index_dims.size())); } std::vector xshape(dx->dims().size()); for (int i = 0; i < dx->dims().size(); ++i) { xshape[i] = dx->dims()[i]; } dx->mutable_data(ctx.GetPlace()); int r = XPU_SUCCESS; if (framework::TransToProtoVarType(index->dtype()) == framework::proto::VarType::INT32) { r = xpu::gather_grad( dev_ctx.x_context(), reinterpret_cast(dout->data()), index->data(), reinterpret_cast(dx->data()), xshape, index->dims()[0], axis, overwrite); } else { xpu::ctx_guard RAII_GUARD(dev_ctx.x_context()); int *index_int_ptr_l3 = RAII_GUARD.alloc_l3_or_gm(index->numel()); r = xpu::cast_v2(dev_ctx.x_context(), index->data(), index_int_ptr_l3, index->numel()); PADDLE_ENFORCE_EQ( r, XPU_SUCCESS, platform::errors::External("XPU API(cast_v2) return wrong " "value[%d %s]", r, XPUAPIErrorMsg[r])); r = xpu::gather_grad( dev_ctx.x_context(), reinterpret_cast(dout->data()), index_int_ptr_l3, reinterpret_cast(dx->data()), xshape, index->dims()[0], axis, overwrite); } PADDLE_ENFORCE_EQ(r, xpu::Error_t::SUCCESS, platform::errors::External( "XPU gather grad kernel return wrong value[%d %s]", r, XPUAPIErrorMsg[r])); } }; } // namespace operators } // namespace paddle namespace ops = paddle::operators; REGISTER_OP_XPU_KERNEL(gather, ops::GatherOpXPUKernel, ops::GatherOpXPUKernel); REGISTER_OP_XPU_KERNEL(gather_grad, ops::GatherGradOpXPUKernel, ops::GatherGradOpXPUKernel); #endif