- 11 5月, 2018 1 次提交
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由 Siddharth Goyal 提交于
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- 10 5月, 2018 3 次提交
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由 Kexin Zhao 提交于
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由 Kexin Zhao 提交于
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由 Kexin Zhao 提交于
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- 28 4月, 2018 2 次提交
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由 Kexin Zhao 提交于
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由 Kexin Zhao 提交于
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- 12 2月, 2018 1 次提交
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由 qingqing01 提交于
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- 10 2月, 2018 2 次提交
- 31 1月, 2018 1 次提交
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由 Siddharth Goyal 提交于
* Add save_combine_op * Add load_combine_op and test * Add unit-test * Add a delete to free buffer memory * Add new variant of load/save * Fix unit-test * Add another unit test for compatibility with original save/load * Address review comments and simplify logic * Address review comments and simplify code - part 2 * Fix naming issues and CMake problems * Address review comments * Fix LoD information in tests * Address review comments: round 2
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- 26 12月, 2017 1 次提交
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由 Luo Tao 提交于
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- 24 12月, 2017 1 次提交
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由 dzhwinter 提交于
* "change operator interface" * "move devicepool to device_context" * "fix operator test" * "fix op_registry Run interface" * "net op passed. Need to fix nccl multi-Context" * "add nccl group function" * "add nccl group function" * "fix gpu count exceed 32 error" * "fix recurrent op, nccl op" * "change the other operators interface with Place" * "fix typo" * "fix pybind" * "fix device in python side" * "fix pybind failed" * "add init for test" * "fix CI"
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- 31 10月, 2017 1 次提交
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由 dangqingqing 提交于
Use posix_memalign to allocate aligned memory, since some SIMD instructions require the alignment of memory accesses.
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- 26 10月, 2017 1 次提交
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由 Yu Yang 提交于
* Init * Stash * Polish SaveLoadOp * Fix CI * Polish code * Save GPU Tensor * Stash * Fix CI
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