From c44b02f08c4babe00f995363967069c907e8fc03 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 23:08:46 +0800 Subject: [PATCH] support auto initial. --- bsp/stm32f10x/applications/application.c | 163 ++++++++++------------- bsp/stm32f10x/applications/startup.c | 82 +++++------- bsp/stm32f10x/drivers/board.c | 99 +++++++------- bsp/stm32f10x/rtconfig.h | 5 +- 4 files changed, 161 insertions(+), 188 deletions(-) diff --git a/bsp/stm32f10x/applications/application.c b/bsp/stm32f10x/applications/application.c index 041405129d..7031711460 100644 --- a/bsp/stm32f10x/applications/application.c +++ b/bsp/stm32f10x/applications/application.c @@ -1,4 +1,3 @@ - /* * File : application.c * This file is part of RT-Thread RTOS @@ -11,6 +10,7 @@ * Change Logs: * Date Author Notes * 2009-01-05 Bernard the first version + * 2013-07-12 aozima update for auto initial. */ /** @@ -21,21 +21,17 @@ #include #include +#ifdef RT_USING_COMPONENTS_INIT +#include +#endif /* RT_USING_COMPONENTS_INIT */ + #ifdef RT_USING_DFS -/* dfs init */ -#include /* dfs filesystem:ELM filesystem init */ #include /* dfs Filesystem APIs */ #include #endif -#ifdef RT_USING_LWIP -#include -#include -#include -#endif - #ifdef RT_USING_RTGUI #include #include @@ -84,127 +80,102 @@ rt_bool_t cali_setup(void) void cali_store(struct calibration_data *data) { rt_kprintf("cali finished (%d, %d), (%d, %d)\n", - data->min_x, - data->max_x, - data->min_y, - data->max_y); + data->min_x, + data->max_x, + data->min_y, + data->max_y); } -#endif +#endif /* RT_USING_RTGUI */ void rt_init_thread_entry(void* parameter) { -/* Filesystem Initialization */ -#ifdef RT_USING_DFS - { - /* init the device filesystem */ - dfs_init(); - -#ifdef RT_USING_DFS_ELMFAT - /* init the elm chan FatFs filesystam*/ - elm_init(); - - /* mount sd card fat partition 1 as root directory */ - if (dfs_mount("sd0", "/", "elm", 0, 0) == 0) - { - rt_kprintf("File System initialized!\n"); - } - else - rt_kprintf("File System initialzation failed!\n"); -#endif - } +#ifdef RT_USING_COMPONENTS_INIT + /* initialization RT-Thread Components */ + rt_components_init(); #endif -/* LwIP Initialization */ -#ifdef RT_USING_LWIP - { - extern void lwip_sys_init(void); - - /* register ethernetif device */ - eth_system_device_init(); +#ifdef RT_USING_FINSH + finsh_set_device(RT_CONSOLE_DEVICE_NAME); +#endif /* RT_USING_FINSH */ -#ifdef STM32F10X_CL - rt_hw_stm32_eth_init(); -#else - /* STM32F103 */ - #if STM32_ETH_IF == 0 - rt_hw_enc28j60_init(); - #elif STM32_ETH_IF == 1 - rt_hw_dm9000_init(); - #endif -#endif - - /* re-init device driver */ - rt_device_init_all(); - - /* init lwip system */ - lwip_sys_init(); - rt_kprintf("TCP/IP initialized!\n"); - } -#endif + /* Filesystem Initialization */ +#if defined(RT_USING_DFS) && defined(RT_USING_DFS_ELMFAT) + /* mount sd card fat partition 1 as root directory */ + if (dfs_mount("sd0", "/", "elm", 0, 0) == 0) + { + rt_kprintf("File System initialized!\n"); + } + else + rt_kprintf("File System initialzation failed!\n"); +#endif /* RT_USING_DFS */ #ifdef RT_USING_RTGUI - { - extern void rtgui_system_server_init(void); - extern void rt_hw_lcd_init(); - extern void rtgui_touch_hw_init(void); + { + extern void rtgui_system_server_init(void); + extern void rt_hw_lcd_init(); + extern void rtgui_touch_hw_init(void); - rt_device_t lcd; + rt_device_t lcd; - /* init lcd */ - rt_hw_lcd_init(); + /* init lcd */ + rt_hw_lcd_init(); - /* init touch panel */ - rtgui_touch_hw_init(); + /* init touch panel */ + rtgui_touch_hw_init(); - /* re-init device driver */ - rt_device_init_all(); + /* re-init device driver */ + rt_device_init_all(); - /* find lcd device */ - lcd = rt_device_find("lcd"); + /* find lcd device */ + lcd = rt_device_find("lcd"); - /* set lcd device as rtgui graphic driver */ - rtgui_graphic_set_device(lcd); + /* set lcd device as rtgui graphic driver */ + rtgui_graphic_set_device(lcd); - /* init rtgui system server */ - rtgui_system_server_init(); + /* init rtgui system server */ + rtgui_system_server_init(); calibration_set_restore(cali_setup); calibration_set_after(cali_store); calibration_init(); - } + } #endif /* #ifdef RT_USING_RTGUI */ } -int rt_application_init() +int rt_application_init(void) { - rt_thread_t init_thread; + rt_thread_t init_thread; - rt_err_t result; + rt_err_t result; /* init led thread */ - result = rt_thread_init(&led_thread, - "led", - led_thread_entry, RT_NULL, - (rt_uint8_t*)&led_stack[0], sizeof(led_stack), 20, 5); - if (result == RT_EOK) - { + result = rt_thread_init(&led_thread, + "led", + led_thread_entry, + RT_NULL, + (rt_uint8_t*)&led_stack[0], + sizeof(led_stack), + 20, + 5); + if (result == RT_EOK) + { rt_thread_startup(&led_thread); - } + } #if (RT_THREAD_PRIORITY_MAX == 32) - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 8, 20); + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, + 2048, 8, 20); #else - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 80, 20); + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, + 2048, 80, 20); #endif - if (init_thread != RT_NULL) - rt_thread_startup(init_thread); + if (init_thread != RT_NULL) + rt_thread_startup(init_thread); - return 0; + return 0; } /*@}*/ diff --git a/bsp/stm32f10x/applications/startup.c b/bsp/stm32f10x/applications/startup.c index 57afa388d0..d8deeedb86 100644 --- a/bsp/stm32f10x/applications/startup.c +++ b/bsp/stm32f10x/applications/startup.c @@ -24,10 +24,6 @@ /*@{*/ extern int rt_application_init(void); -#ifdef RT_USING_FINSH -extern void finsh_system_init(void); -extern void finsh_set_device(const char* device); -#endif #ifdef __CC_ARM extern int Image$$RW_IRAM1$$ZI$$Limit; @@ -48,11 +44,11 @@ extern int __bss_end; *******************************************************************************/ void assert_failed(u8* file, u32 line) { - rt_kprintf("\n\r Wrong parameter value detected on\r\n"); - rt_kprintf(" file %s\r\n", file); - rt_kprintf(" line %d\r\n", line); + rt_kprintf("\n\r Wrong parameter value detected on\r\n"); + rt_kprintf(" file %s\r\n", file); + rt_kprintf(" line %d\r\n", line); - while (1) ; + while (1) ; } /** @@ -60,67 +56,61 @@ void assert_failed(u8* file, u32 line) */ void rtthread_startup(void) { - /* init board */ - rt_hw_board_init(); + /* init board */ + rt_hw_board_init(); - /* show version */ - rt_show_version(); + /* show version */ + rt_show_version(); - /* init kernel object */ - rt_system_object_init(); + /* init kernel object */ + rt_system_object_init(); - /* init timer system */ - rt_system_timer_init(); + /* init timer system */ + rt_system_timer_init(); #ifdef RT_USING_HEAP #if STM32_EXT_SRAM - rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); + rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); +#else +#ifdef __CC_ARM + rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END); +#elif __ICCARM__ + rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END); #else - #ifdef __CC_ARM - rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END); - #elif __ICCARM__ - rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END); - #else - /* init memory system */ - rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); - #endif + /* init memory system */ + rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); +#endif #endif /* STM32_EXT_SRAM */ #endif /* RT_USING_HEAP */ - /* init scheduler system */ - rt_system_scheduler_init(); + /* init scheduler system */ + rt_system_scheduler_init(); /* init timer thread */ rt_system_timer_thread_init(); - /* init application */ - rt_application_init(); - -#ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device(RT_CONSOLE_DEVICE_NAME); -#endif + /* init application */ + rt_application_init(); - /* init idle thread */ - rt_thread_idle_init(); + /* init idle thread */ + rt_thread_idle_init(); - /* start scheduler */ - rt_system_scheduler_start(); + /* start scheduler */ + rt_system_scheduler_start(); - /* never reach here */ - return ; + /* never reach here */ + return ; } int main(void) { - /* disable interrupt first */ - rt_hw_interrupt_disable(); + /* disable interrupt first */ + rt_hw_interrupt_disable(); - /* startup RT-Thread RTOS */ - rtthread_startup(); + /* startup RT-Thread RTOS */ + rtthread_startup(); - return 0; + return 0; } /*@}*/ diff --git a/bsp/stm32f10x/drivers/board.c b/bsp/stm32f10x/drivers/board.c index dd2b7b19df..a78428e711 100644 --- a/bsp/stm32f10x/drivers/board.c +++ b/bsp/stm32f10x/drivers/board.c @@ -10,6 +10,7 @@ * Change Logs: * Date Author Notes * 2009-01-05 Bernard first implementation + * 2013-07-12 aozima update for auto initial. */ #include @@ -19,6 +20,10 @@ #include "stm32f10x_fsmc.h" #include "board.h" +#ifdef RT_USING_COMPONENTS_INIT +#include +#endif /* RT_USING_COMPONENTS_INIT */ + /** * @addtogroup STM32 */ @@ -35,19 +40,19 @@ void NVIC_Configuration(void) { #ifdef VECT_TAB_RAM - /* Set the Vector Table base location at 0x20000000 */ - NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); + /* Set the Vector Table base location at 0x20000000 */ + NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); #else /* VECT_TAB_FLASH */ - /* Set the Vector Table base location at 0x08000000 */ - NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); + /* Set the Vector Table base location at 0x08000000 */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); #endif } #if STM32_EXT_SRAM void EXT_SRAM_Configuration(void) { - FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; - FSMC_NORSRAMTimingInitTypeDef p; + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; /* FSMC GPIO configure */ { @@ -117,35 +122,35 @@ void EXT_SRAM_Configuration(void) } /* FSMC GPIO configure */ - /*-- FSMC Configuration ------------------------------------------------------*/ - p.FSMC_AddressSetupTime = 0; - p.FSMC_AddressHoldTime = 0; - p.FSMC_DataSetupTime = 2; - p.FSMC_BusTurnAroundDuration = 0; - p.FSMC_CLKDivision = 0; - p.FSMC_DataLatency = 0; - p.FSMC_AccessMode = FSMC_AccessMode_A; - - FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; - FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; - FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; - FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; - FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; - FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; - - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - - /* Enable FSMC Bank1_SRAM Bank */ - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); + /*-- FSMC Configuration ------------------------------------------------------*/ + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 2; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + /* Enable FSMC Bank1_SRAM Bank */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); } #endif @@ -155,13 +160,13 @@ void EXT_SRAM_Configuration(void) */ void SysTick_Handler(void) { - /* enter interrupt */ - rt_interrupt_enter(); + /* enter interrupt */ + rt_interrupt_enter(); - rt_tick_increase(); + rt_tick_increase(); - /* leave interrupt */ - rt_interrupt_leave(); + /* leave interrupt */ + rt_interrupt_leave(); } /** @@ -169,18 +174,22 @@ void SysTick_Handler(void) */ void rt_hw_board_init(void) { - /* NVIC Configuration */ - NVIC_Configuration(); + /* NVIC Configuration */ + NVIC_Configuration(); /* Configure the SysTick */ SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND ); #if STM32_EXT_SRAM - EXT_SRAM_Configuration(); + EXT_SRAM_Configuration(); #endif - rt_hw_usart_init(); - rt_console_set_device(RT_CONSOLE_DEVICE_NAME); + rt_hw_usart_init(); + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif } /*@}*/ diff --git a/bsp/stm32f10x/rtconfig.h b/bsp/stm32f10x/rtconfig.h index 049b3b5d63..2fe7a0ca41 100644 --- a/bsp/stm32f10x/rtconfig.h +++ b/bsp/stm32f10x/rtconfig.h @@ -56,6 +56,9 @@ /* Using Small MM */ #define RT_USING_SMALL_MEM +// +#define RT_USING_COMPONENTS_INIT + /* SECTION: Device System */ /* Using Device System */ #define RT_USING_DEVICE @@ -78,12 +81,12 @@ /* #define RT_USING_DFS */ #define RT_USING_DFS_ELMFAT -#define RT_DFS_ELM_WORD_ACCESS /* Reentrancy (thread safe) of the FatFs module. */ #define RT_DFS_ELM_REENTRANT /* Number of volumes (logical drives) to be used. */ #define RT_DFS_ELM_DRIVES 2 /* #define RT_DFS_ELM_USE_LFN 1 */ +/* #define RT_DFS_ELM_CODE_PAGE 936 */ #define RT_DFS_ELM_MAX_LFN 255 /* Maximum sector size to be handled. */ #define RT_DFS_ELM_MAX_SECTOR_SIZE 512 -- GitLab