From 2f55ad6e8925ece3c7534d105f26974fc7f8c7c2 Mon Sep 17 00:00:00 2001 From: "bernard.xiong" Date: Thu, 22 Oct 2009 09:44:08 +0000 Subject: [PATCH] move more options to rtconfig.py git-svn-id: https://rt-thread.googlecode.com/svn/trunk@120 bbd45198-f89e-11dd-88c7-29a3b14d5316 --- bsp/stm3210/SConstruct | 87 ++++++++++------------------------------ bsp/stm3210/rtconfig.py | 89 ++++++++++++++++++++++++++++++++++++----- libcpu/SConscript | 6 +-- 3 files changed, 104 insertions(+), 78 deletions(-) diff --git a/bsp/stm3210/SConstruct b/bsp/stm3210/SConstruct index 13d944b520..c310df9280 100644 --- a/bsp/stm3210/SConstruct +++ b/bsp/stm3210/SConstruct @@ -2,67 +2,20 @@ import os import rtconfig RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') - -if rtconfig.CC == 'armcc': - device = '--device DARMSTM' - device_type = 'STM32F10X_HD' - - # assemble flag for ARCC(Keil) - aflags = '--dwarf2 ' + device - cc_path = 'C:/Keil' - cc_exec_path = cc_path + '/arm/bin40/' - cc_cpath = cc_path + '/ARM/RV31/INC' - # compiler flag for ARMCC(Keil) - cc_cflags = '-g -O0 --apcs=interwork ' + device + ' -DUSE_STDPERIPH_DRIVER -DSTM32F10X_HD' - cc_lflags = ' --keep __fsym_* --keep __vsym_* --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct --libpath ' + cc_path + '/ARM/RV31/LIB' - cc_target = 'rtthread-stm32.axf' -elif rtconfig.CC == 'gcc': - device = '-mcpu=cortex-m3' - device_type = 'STM32F10X_HD' - - aflags = device + ' -c -gdwarf-2 -mthumb -x assembler-with-cpp' - cc_path = '' - cc_cpath = '' - cc_exec_path = 'd:/codesourcery/bin' - cc_cflags = device + ' -mthumb -gdwarf-2 -DUSE_STDPERIPH_DRIVER -DSTM32F10X_HD -D__thumb__ -Wall -nostdinc -fno-builtin' - cc_lflags = cc_cflags + ' -MMD -MP -MF -static -nostdlib -Wl,--gc-sections,-Map=main.elf.map,-cref,-u,Reset_Handler -T stm32_rom.ld --output rtthread-stm32.elf' - cc_target = 'rtthread-stm32.elf' -elif rtconfig.CC == 'iar': - device = '' - device_type = 'STM32F10X_HD' - - aflags = '' - cc_path = '' - cc_cpath = '' - cc_exec_path = '' - cc_cflags = device + '' - cc_lflags = '' - cc_target = 'rtthread-stm32.elf' - -aflags = aflags -cflags = cc_cflags +device_type = 'STM32F10X_HD' +target = 'rtthread-stm32' # search path for C compiler -cpath = [RTT_ROOT + '/bsp/stm3210'] - -# link flag -lflags = device + cc_lflags - -if rtconfig.CC == 'armcc': - env = Environment(tools = ['mingw'], - AS='armasm', ASFLAGS = aflags, - CC='armcc', CCFLAGS = cflags, CPPPATH = cpath, - AR='armar', ARFLAGS = '-rc', - LINK='armlink', LINKFLAGS=lflags) - env.PrependENVPath('PATH', cc_exec_path) +bsp_path = RTT_ROOT + '/bsp/stm3210' -if rtconfig.CC == 'gcc': - env = Environment(tools = ['mingw'], - AS='arm-none-eabi-gcc', ASFLAGS = aflags, - CC='arm-none-eabi-gcc', CCFLAGS = cflags, CPPPATH = cpath, - AR='arm-none-eabi-ar', ARFLAGS = '-rc', - LINK='arm-none-eabi-gcc', LINKFLAGS=lflags) - env.PrependENVPath('PATH', cc_exec_path) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env.AppendUnique(CPPPATH = bsp_path) +env.AppendUnique(CCFLAGS = ' -DUSE_STDPERIPH_DRIVER -DSTM32F10X_HD') Export('env') Export('RTT_ROOT') @@ -84,21 +37,23 @@ if rtconfig.RT_USING_DFS: if rtconfig.RT_USING_LWIP: objs = objs + SConscript(RTT_ROOT + '/net/lwip/SConscript', variant_dir='build/net/lwip', duplicate=0) -source_bsp = ['application.c', 'startup.c', 'board.c', 'stm32f10x_it.c'] -source_drv = ['rtc.c', 'usart.c'] +src_bsp = ['application.c', 'startup.c', 'board.c', 'stm32f10x_it.c'] +src_drv = ['rtc.c', 'usart.c'] if rtconfig.RT_USING_DFS: if device_type == 'STM32F10X_HD': - source_drv = source_drv + ['sdcard.c'] + src_drv += ['sdcard.c'] else: - source_drv = source_drv + ['msd.c'] + src_drv += ['msd.c'] if rtconfig.RT_USING_LWIP: if device_type == 'STM32F10X_CL': - source_drv = source_drv + ['stm32_eth.c'] + src_drv += ['stm32_eth.c'] else: - source_drv = source_drv + ['enc28j60.c'] + src_drv += ['enc28j60.c'] -objs = objs + env.Object(source_bsp + source_drv) +objs = objs + env.Object(src_bsp + src_drv) -env.Program(cc_target, objs) +TARGET = target + '.' + rtconfig.TARGET_EXT +env.Program(TARGET, objs) +env.AddPostAction(TARGET, rtconfig.POST_ACTION) diff --git a/bsp/stm3210/rtconfig.py b/bsp/stm3210/rtconfig.py index 8b7413c820..c95b914475 100644 --- a/bsp/stm3210/rtconfig.py +++ b/bsp/stm3210/rtconfig.py @@ -1,12 +1,83 @@ +# component options +RT_USING_FINSH = True +RT_USING_DFS = True +RT_USING_DFS_YAFFS2 = False +RT_USING_DFS_EFSL = True +RT_USING_LWIP = True + +# toolchains options ARCH='arm' CPU='stm32' -CC='armcc' -TextBase='0x08000000' +PLATFORM = 'gcc' +EXEC_PATH = 'd:/SourceryGCC/bin' +#PLATFORM = 'armcc' +#EXEC_PATH = 'C:/Keil' +BUILD = 'debug' -# component configuration -RT_USING_FINSH = True -RT_USING_DFS = False -RT_USING_DFS_YAFFS2 = False -RT_USING_DFS_EFSL = False -RT_USING_LWIP = False -RT_USING_MINILIBC = False +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m3 -mthumb' + CFLAGS = DEVICE + ' -DRT_USING_MINILIBC' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=main.elf.map,-cref,-u,Reset_Handler -T stm32_rom.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + RT_USING_MINILIBC = True + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --device DARMSTM' + CFLAGS = DEVICE + ' --apcs=interwork' + AFLAGS = DEVICE + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct' + + CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC' + LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB' + + EXEC_PATH += '/arm/bin40/' + + if BUILD == 'debug': + CFLAGS += ' --dwarf2' + else: + CFLAGS += ' -O2' + + RT_USING_MINILIBC = False + if RT_USING_FINSH: + LFLAGS += ' --keep __fsym_* --keep __vsym_*' + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + + CFLAGS = '' + AFLAGS = '' + LFLAGS = '' diff --git a/libcpu/SConscript b/libcpu/SConscript index a9b1eca794..298af2941b 100644 --- a/libcpu/SConscript +++ b/libcpu/SConscript @@ -6,13 +6,13 @@ comm = rtconfig.ARCH + '/common' path = rtconfig.ARCH + '/' + rtconfig.CPU # The set of source files associated with this SConscript file. -if rtconfig.CC == 'armcc': +if rtconfig.PLATFORM == 'armcc': src_local = Glob(path + '/*.c') + Glob(path + '/*_rvds.s') + Glob(comm + '/*.c') -if rtconfig.CC == 'gcc': +if rtconfig.PLATFORM == 'gcc': src_local = Glob(path + '/*.c') + Glob(path + '/*_gcc.s') + Glob(comm + '/*.c') -if rtconfig.CC == 'iar': +if rtconfig.PLATFORM == 'iar': src_local = Glob(path + '/*.c') + Glob(path + '/*_iar.s') + Glob(comm + '/*.c') env.Append(CPPPATH = [RTT_ROOT + '/libcpu/' + rtconfig.ARCH + '/' + rtconfig.CPU]) -- GitLab