-//!
-//! The \e ulMode parameter defines the operating mode of the SSI module. The
-//! SSI module can operate as a master or slave; if a slave, the SSI can be
-//! configured to disable output on its serial output line. The \e ulMode
-//! parameter can be one of the following values: \b SSI_MODE_MASTER,
-//! \b SSI_MODE_SLAVE, or \b SSI_MODE_SLAVE_OD.
-//!
-//! The \e ulBitRate parameter defines the bit rate for the SSI. This bit rate
-//! must satisfy the following clock ratio criteria:
-//!
-//! - FSSI >= 2 * bit rate (master mode)
-//! - FSSI >= 12 * bit rate (slave modes)
-//!
-//! where FSSI is the frequency of the clock supplied to the SSI module.
-//!
-//! The \e ulDataWidth parameter defines the width of the data transfers, and
-//! can be a value between 4 and 16, inclusive.
-//!
-//! The peripheral clock will be the same as the processor clock. This will be
-//! the value returned by SysCtlClockGet(), or it can be explicitly hard coded
-//! if it is constant and known (to save the code/execution overhead of a call
-//! to SysCtlClockGet()).
-//!
-//! This function replaces the original SSIConfig() API and performs the same
-//! actions. A macro is provided in ssi.h to map the original API to
-//! this API.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIConfigSetExpClk(unsigned long ulBase, unsigned long ulSSIClk,
- unsigned long ulProtocol, unsigned long ulMode,
- unsigned long ulBitRate, unsigned long ulDataWidth)
-{
- unsigned long ulMaxBitRate;
- unsigned long ulRegVal;
- unsigned long ulPreDiv;
- unsigned long ulSCR;
- unsigned long ulSPH_SPO;
-
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
- ASSERT((ulProtocol == SSI_FRF_MOTO_MODE_0) ||
- (ulProtocol == SSI_FRF_MOTO_MODE_1) ||
- (ulProtocol == SSI_FRF_MOTO_MODE_2) ||
- (ulProtocol == SSI_FRF_MOTO_MODE_3) ||
- (ulProtocol == SSI_FRF_TI) ||
- (ulProtocol == SSI_FRF_NMW));
- ASSERT((ulMode == SSI_MODE_MASTER) ||
- (ulMode == SSI_MODE_SLAVE) ||
- (ulMode == SSI_MODE_SLAVE_OD));
- ASSERT(((ulMode == SSI_MODE_MASTER) && (ulBitRate <= (ulSSIClk / 2))) ||
- ((ulMode != SSI_MODE_MASTER) && (ulBitRate <= (ulSSIClk / 12))));
- ASSERT((ulSSIClk / ulBitRate) <= (254 * 256));
- ASSERT((ulDataWidth >= 4) && (ulDataWidth <= 16));
-
- //
- // Set the mode.
- //
- ulRegVal = (ulMode == SSI_MODE_SLAVE_OD) ? SSI_CR1_SOD : 0;
- ulRegVal |= (ulMode == SSI_MODE_MASTER) ? 0 : SSI_CR1_MS;
- HWREG(ulBase + SSI_O_CR1) = ulRegVal;
-
- //
- // Set the clock predivider.
- //
- ulMaxBitRate = ulSSIClk / ulBitRate;
- ulPreDiv = 0;
- do
- {
- ulPreDiv += 2;
- ulSCR = (ulMaxBitRate / ulPreDiv) - 1;
- }
- while(ulSCR > 255);
- HWREG(ulBase + SSI_O_CPSR) = ulPreDiv;
-
- //
- // Set protocol and clock rate.
- //
- ulSPH_SPO = ulProtocol << 6;
- ulProtocol &= SSI_CR0_FRF_M;
- ulRegVal = (ulSCR << 8) | ulSPH_SPO | ulProtocol | (ulDataWidth - 1);
- HWREG(ulBase + SSI_O_CR0) = ulRegVal;
-}
-
-//*****************************************************************************
-//
-//! Enables the synchronous serial interface.
-//!
-//! \param ulBase specifies the SSI module base address.
-//!
-//! This will enable operation of the synchronous serial interface. It must be
-//! configured before it is enabled.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Read-modify-write the enable bit.
- //
- HWREG(ulBase + SSI_O_CR1) |= SSI_CR1_SSE;
-}
-
-//*****************************************************************************
-//
-//! Disables the synchronous serial interface.
-//!
-//! \param ulBase specifies the SSI module base address.
-//!
-//! This will disable operation of the synchronous serial interface.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Read-modify-write the enable bit.
- //
- HWREG(ulBase + SSI_O_CR1) &= ~(SSI_CR1_SSE);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the synchronous serial interface.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! synchronous serial interface interrupt occurs.
-//!
-//! This sets the handler to be called when an SSI interrupt
-//! occurs. This will enable the global interrupt in the interrupt controller;
-//! specific SSI interrupts must be enabled via SSIIntEnable(). If necessary,
-//! it is the interrupt handler's responsibility to clear the interrupt source
-//! via SSIIntClear().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
-{
- unsigned long ulInt;
-
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Determine the interrupt number based on the SSI port.
- //
- ulInt = (ulBase == SSI0_BASE) ? INT_SSI0 : INT_SSI1;
-
- //
- // Register the interrupt handler, returning an error if an error occurs.
- //
- IntRegister(ulInt, pfnHandler);
-
- //
- // Enable the synchronous serial interface interrupt.
- //
- IntEnable(ulInt);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the synchronous serial interface.
-//!
-//! \param ulBase specifies the SSI module base address.
-//!
-//! This function will clear the handler to be called when a SSI
-//! interrupt occurs. This will also mask off the interrupt in the interrupt
-//! controller so that the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIIntUnregister(unsigned long ulBase)
-{
- unsigned long ulInt;
-
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Determine the interrupt number based on the SSI port.
- //
- ulInt = (ulBase == SSI0_BASE) ? INT_SSI0 : INT_SSI1;
-
- //
- // Disable the interrupt.
- //
- IntDisable(ulInt);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(ulInt);
-}
-
-//*****************************************************************************
-//
-//! Enables individual SSI interrupt sources.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
-//!
-//! Enables the indicated SSI interrupt sources. Only the sources that are
-//! enabled can be reflected to the processor interrupt; disabled sources have
-//! no effect on the processor. The \e ulIntFlags parameter can be any of the
-//! \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, or \b SSI_RXOR values.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Enable the specified interrupts.
- //
- HWREG(ulBase + SSI_O_IM) |= ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables individual SSI interrupt sources.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be disabled.
-//!
-//! Disables the indicated SSI interrupt sources. The \e ulIntFlags parameter
-//! can be any of the \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, or \b SSI_RXOR
-//! values.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Disable the specified interrupts.
- //
- HWREG(ulBase + SSI_O_IM) &= ~(ulIntFlags);
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param bMasked is \b false if the raw interrupt status is required and
-//! \b true if the masked interrupt status is required.
-//!
-//! This returns the interrupt status for the SSI module. Either the raw
-//! interrupt status or the status of interrupts that are allowed to reflect to
-//! the processor can be returned.
-//!
-//! \return The current interrupt status, enumerated as a bit field of
-//! \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, and \b SSI_RXOR.
-//
-//*****************************************************************************
-unsigned long
-SSIIntStatus(unsigned long ulBase, tBoolean bMasked)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Return either the interrupt status or the raw interrupt status as
- // requested.
- //
- if(bMasked)
- {
- return(HWREG(ulBase + SSI_O_MIS));
- }
- else
- {
- return(HWREG(ulBase + SSI_O_RIS));
- }
-}
-
-//*****************************************************************************
-//
-//! Clears SSI interrupt sources.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified SSI interrupt sources are cleared, so that
-//! they no longer assert. This must be done in the interrupt handler to
-//! keep it from being called again immediately upon exit.
-//! The \e ulIntFlags parameter can consist of either or both the \b SSI_RXTO
-//! and \b SSI_RXOR values.
-//!
-//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
-//! several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared. Failure to do so may result in the interrupt handler
-//! being immediately reentered (since NVIC still sees the interrupt source
-//! asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Clear the requested interrupt sources.
- //
- HWREG(ulBase + SSI_O_ICR) = ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Puts a data element into the SSI transmit FIFO.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param ulData data to be transmitted over the SSI interface.
-//!
-//! This function will place the supplied data into the transmit FIFO of
-//! the specified SSI module.
-//!
-//! \note The upper 32 - N bits of the \e ulData will be discarded by the
-//! hardware, where N is the data width as configured by SSIConfigSetExpClk().
-//! For example, if the interface is configured for 8-bit data width, the upper
-//! 24 bits of \e ulData will be discarded.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIDataPut(unsigned long ulBase, unsigned long ulData)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
- ASSERT((ulData & (0xfffffffe << (HWREG(ulBase + SSI_O_CR0) &
- SSI_CR0_DSS_M))) == 0);
-
- //
- // Wait until there is space.
- //
- while(!(HWREG(ulBase + SSI_O_SR) & SSI_SR_TNF))
- {
- }
-
- //
- // Write the data to the SSI.
- //
- HWREG(ulBase + SSI_O_DR) = ulData;
-}
-
-//*****************************************************************************
-//
-//! Puts a data element into the SSI transmit FIFO.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param ulData data to be transmitted over the SSI interface.
-//!
-//! This function will place the supplied data into the transmit FIFO of
-//! the specified SSI module. If there is no space in the FIFO, then this
-//! function will return a zero.
-//!
-//! This function replaces the original SSIDataNonBlockingPut() API and
-//! performs the same actions. A macro is provided in ssi.h to map
-//! the original API to this API.
-//!
-//! \note The upper 32 - N bits of the \e ulData will be discarded by the
-//! hardware, where N is the data width as configured by SSIConfigSetExpClk().
-//! For example, if the interface is configured for 8-bit data width, the upper
-//! 24 bits of \e ulData will be discarded.
-//!
-//! \return Returns the number of elements written to the SSI transmit FIFO.
-//
-//*****************************************************************************
-long
-SSIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
- ASSERT((ulData & (0xfffffffe << (HWREG(ulBase + SSI_O_CR0) &
- SSI_CR0_DSS_M))) == 0);
-
- //
- // Check for space to write.
- //
- if(HWREG(ulBase + SSI_O_SR) & SSI_SR_TNF)
- {
- HWREG(ulBase + SSI_O_DR) = ulData;
- return(1);
- }
- else
- {
- return(0);
- }
-}
-
-//*****************************************************************************
-//
-//! Gets a data element from the SSI receive FIFO.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param pulData pointer to a storage location for data that was received
-//! over the SSI interface.
-//!
-//! This function will get received data from the receive FIFO of the specified
-//! SSI module, and place that data into the location specified by the
-//! \e pulData parameter.
-//!
-//! \note Only the lower N bits of the value written to \e pulData will contain
-//! valid data, where N is the data width as configured by
-//! SSIConfigSetExpClk(). For example, if the interface is configured for
-//! 8-bit data width, only the lower 8 bits of the value written to \e pulData
-//! will contain valid data.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIDataGet(unsigned long ulBase, unsigned long *pulData)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Wait until there is data to be read.
- //
- while(!(HWREG(ulBase + SSI_O_SR) & SSI_SR_RNE))
- {
- }
-
- //
- // Read data from SSI.
- //
- *pulData = HWREG(ulBase + SSI_O_DR);
-}
-
-//*****************************************************************************
-//
-//! Gets a data element from the SSI receive FIFO.
-//!
-//! \param ulBase specifies the SSI module base address.
-//! \param pulData pointer to a storage location for data that was received
-//! over the SSI interface.
-//!
-//! This function will get received data from the receive FIFO of
-//! the specified SSI module, and place that data into the location specified
-//! by the \e ulData parameter. If there is no data in the FIFO, then this
-//! function will return a zero.
-//!
-//! This function replaces the original SSIDataNonBlockingGet() API and
-//! performs the same actions. A macro is provided in ssi.h to map
-//! the original API to this API.
-//!
-//! \note Only the lower N bits of the value written to \e pulData will contain
-//! valid data, where N is the data width as configured by
-//! SSIConfigSetExpClk(). For example, if the interface is configured for
-//! 8-bit data width, only the lower 8 bits of the value written to \e pulData
-//! will contain valid data.
-//!
-//! \return Returns the number of elements read from the SSI receive FIFO.
-//
-//*****************************************************************************
-long
-SSIDataGetNonBlocking(unsigned long ulBase, unsigned long *pulData)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Check for data to read.
- //
- if(HWREG(ulBase + SSI_O_SR) & SSI_SR_RNE)
- {
- *pulData = HWREG(ulBase + SSI_O_DR);
- return(1);
- }
- else
- {
- return(0);
- }
-}
-
-//*****************************************************************************
-//
-//! Enable SSI DMA operation.
-//!
-//! \param ulBase is the base address of the SSI port.
-//! \param ulDMAFlags is a bit mask of the DMA features to enable.
-//!
-//! The specified SSI DMA features are enabled. The SSI can be
-//! configured to use DMA for transmit and/or receive data transfers.
-//! The \e ulDMAFlags parameter is the logical OR of any of the following
-//! values:
-//!
-//! - SSI_DMA_RX - enable DMA for receive
-//! - SSI_DMA_TX - enable DMA for transmit
-//!
-//! \note The uDMA controller must also be set up before DMA can be used
-//! with the SSI.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Set the requested bits in the UART DMA control register.
- //
- HWREG(ulBase + SSI_O_DMACTL) |= ulDMAFlags;
-}
-
-//*****************************************************************************
-//
-//! Disable SSI DMA operation.
-//!
-//! \param ulBase is the base address of the SSI port.
-//! \param ulDMAFlags is a bit mask of the DMA features to disable.
-//!
-//! This function is used to disable SSI DMA features that were enabled
-//! by SSIDMAEnable(). The specified SSI DMA features are disabled. The
-//! \e ulDMAFlags parameter is the logical OR of any of the following values:
-//!
-//! - SSI_DMA_RX - disable DMA for receive
-//! - SSI_DMA_TX - disable DMA for transmit
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
-
- //
- // Clear the requested bits in the UART DMA control register.
- //
- HWREG(ulBase + SSI_O_DMACTL) &= ~ulDMAFlags;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/ssi.h b/bsp/lm3s/driverlib/ssi.h
deleted file mode 100644
index 4f7101b598e326c88293d9a3c5a9b8815ff47c78..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/ssi.h
+++ /dev/null
@@ -1,127 +0,0 @@
-//*****************************************************************************
-//
-// ssi.h - Prototypes for the Synchronous Serial Interface Driver.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __SSI_H__
-#define __SSI_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Values that can be passed to SSIIntEnable, SSIIntDisable, and SSIIntClear
-// as the ulIntFlags parameter, and returned by SSIIntStatus.
-//
-//*****************************************************************************
-#define SSI_TXFF 0x00000008 // TX FIFO half empty or less
-#define SSI_RXFF 0x00000004 // RX FIFO half full or less
-#define SSI_RXTO 0x00000002 // RX timeout
-#define SSI_RXOR 0x00000001 // RX overrun
-
-//*****************************************************************************
-//
-// Values that can be passed to SSIConfigSetExpClk.
-//
-//*****************************************************************************
-#define SSI_FRF_MOTO_MODE_0 0x00000000 // Moto fmt, polarity 0, phase 0
-#define SSI_FRF_MOTO_MODE_1 0x00000002 // Moto fmt, polarity 0, phase 1
-#define SSI_FRF_MOTO_MODE_2 0x00000001 // Moto fmt, polarity 1, phase 0
-#define SSI_FRF_MOTO_MODE_3 0x00000003 // Moto fmt, polarity 1, phase 1
-#define SSI_FRF_TI 0x00000010 // TI frame format
-#define SSI_FRF_NMW 0x00000020 // National MicroWire frame format
-
-#define SSI_MODE_MASTER 0x00000000 // SSI master
-#define SSI_MODE_SLAVE 0x00000001 // SSI slave
-#define SSI_MODE_SLAVE_OD 0x00000002 // SSI slave with output disabled
-
-//*****************************************************************************
-//
-// Values that can be passed to SSIDMAEnable() and SSIDMADisable().
-//
-//*****************************************************************************
-#define SSI_DMA_TX 0x00000002 // Enable DMA for transmit
-#define SSI_DMA_RX 0x00000001 // Enable DMA for receive
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern void SSIConfigSetExpClk(unsigned long ulBase, unsigned long ulSSIClk,
- unsigned long ulProtocol, unsigned long ulMode,
- unsigned long ulBitRate,
- unsigned long ulDataWidth);
-extern void SSIDataGet(unsigned long ulBase, unsigned long *pulData);
-extern long SSIDataGetNonBlocking(unsigned long ulBase,
- unsigned long *pulData);
-extern void SSIDataPut(unsigned long ulBase, unsigned long ulData);
-extern long SSIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData);
-extern void SSIDisable(unsigned long ulBase);
-extern void SSIEnable(unsigned long ulBase);
-extern void SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags);
-extern void SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void SSIIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
-extern unsigned long SSIIntStatus(unsigned long ulBase, tBoolean bMasked);
-extern void SSIIntUnregister(unsigned long ulBase);
-extern void SSIDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags);
-extern void SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags);
-
-//*****************************************************************************
-//
-// Several SSI APIs have been renamed, with the original function name being
-// deprecated. These defines provide backward compatibility.
-//
-//*****************************************************************************
-#ifndef DEPRECATED
-#include "driverlib/sysctl.h"
-#define SSIConfig(a, b, c, d, e) \
- SSIConfigSetExpClk(a, SysCtlClockGet(), b, c, d, e)
-#define SSIDataNonBlockingGet(a, b) \
- SSIDataGetNonBlocking(a, b)
-#define SSIDataNonBlockingPut(a, b) \
- SSIDataPutNonBlocking(a, b)
-#endif
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __SSI_H__
diff --git a/bsp/lm3s/driverlib/sysctl.c b/bsp/lm3s/driverlib/sysctl.c
deleted file mode 100644
index 0bc6ae7d51a7c1ad783bfa568e19c659a6232682..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/sysctl.c
+++ /dev/null
@@ -1,2319 +0,0 @@
-//*****************************************************************************
-//
-// sysctl.c - Driver for the system controller.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup sysctl_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_sysctl.h"
-#include "inc/hw_types.h"
-#include "driverlib/cpu.h"
-#include "driverlib/debug.h"
-#include "driverlib/interrupt.h"
-#include "driverlib/sysctl.h"
-
-//*****************************************************************************
-//
-// This macro extracts the array index out of the peripheral number.
-//
-//*****************************************************************************
-#define SYSCTL_PERIPH_INDEX(a) (((a) >> 28) & 0xf)
-
-//*****************************************************************************
-//
-// This macro constructs the peripheral bit mask from the peripheral number.
-//
-//*****************************************************************************
-#define SYSCTL_PERIPH_MASK(a) (((a) & 0xffff) << (((a) & 0x001f0000) >> 16))
-
-//*****************************************************************************
-//
-// An array that maps the "peripheral set" number (which is stored in the upper
-// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL DC? register that
-// contains the peripheral present bit for that peripheral.
-//
-//*****************************************************************************
-static const unsigned long g_pulDCRegs[] =
-{
- SYSCTL_DC1,
- SYSCTL_DC2,
- SYSCTL_DC4,
- SYSCTL_DC1
-};
-
-//*****************************************************************************
-//
-// An array that maps the "peripheral set" number (which is stored in the upper
-// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_SRCR? register that
-// controls the software reset for that peripheral.
-//
-//*****************************************************************************
-static const unsigned long g_pulSRCRRegs[] =
-{
- SYSCTL_SRCR0,
- SYSCTL_SRCR1,
- SYSCTL_SRCR2
-};
-
-//*****************************************************************************
-//
-// An array that maps the "peripheral set" number (which is stored in the upper
-// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_RCGC? register that
-// controls the run-mode enable for that peripheral.
-//
-//*****************************************************************************
-static const unsigned long g_pulRCGCRegs[] =
-{
- SYSCTL_RCGC0,
- SYSCTL_RCGC1,
- SYSCTL_RCGC2
-};
-
-//*****************************************************************************
-//
-// An array that maps the "peripheral set" number (which is stored in the upper
-// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_SCGC? register that
-// controls the sleep-mode enable for that peripheral.
-//
-//*****************************************************************************
-static const unsigned long g_pulSCGCRegs[] =
-{
- SYSCTL_SCGC0,
- SYSCTL_SCGC1,
- SYSCTL_SCGC2
-};
-
-//*****************************************************************************
-//
-// An array that maps the "peripheral set" number (which is stored in the upper
-// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_DCGC? register that
-// controls the deep-sleep-mode enable for that peripheral.
-//
-//*****************************************************************************
-static const unsigned long g_pulDCGCRegs[] =
-{
- SYSCTL_DCGC0,
- SYSCTL_DCGC1,
- SYSCTL_DCGC2
-};
-
-//*****************************************************************************
-//
-// An array that maps the crystal number in RCC to a frequency.
-//
-//*****************************************************************************
-static const unsigned long g_pulXtals[] =
-{
- 1000000,
- 1843200,
- 2000000,
- 2457600,
- 3579545,
- 3686400,
- 4000000,
- 4096000,
- 4915200,
- 5000000,
- 5120000,
- 6000000,
- 6144000,
- 7372800,
- 8000000,
- 8192000,
- 10000000,
- 12000000,
- 12288000,
- 13560000,
- 14318180,
- 16000000,
- 16384000
-};
-
-//*****************************************************************************
-//
-//! \internal
-//! Checks a peripheral identifier.
-//!
-//! \param ulPeripheral is the peripheral identifier.
-//!
-//! This function determines if a peripheral identifier is valid.
-//!
-//! \return Returns \b true if the peripheral identifier is valid and \b false
-//! otherwise.
-//
-//*****************************************************************************
-#ifdef DEBUG
-static tBoolean
-SysCtlPeripheralValid(unsigned long ulPeripheral)
-{
- return((ulPeripheral == SYSCTL_PERIPH_ADC0) ||
- (ulPeripheral == SYSCTL_PERIPH_ADC1) ||
- (ulPeripheral == SYSCTL_PERIPH_CAN0) ||
- (ulPeripheral == SYSCTL_PERIPH_CAN1) ||
- (ulPeripheral == SYSCTL_PERIPH_CAN2) ||
- (ulPeripheral == SYSCTL_PERIPH_COMP0) ||
- (ulPeripheral == SYSCTL_PERIPH_COMP1) ||
- (ulPeripheral == SYSCTL_PERIPH_COMP2) ||
- (ulPeripheral == SYSCTL_PERIPH_EPI0) ||
- (ulPeripheral == SYSCTL_PERIPH_ETH) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOA) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOB) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOC) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOD) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOE) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOF) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOG) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOH) ||
- (ulPeripheral == SYSCTL_PERIPH_GPIOJ) ||
- (ulPeripheral == SYSCTL_PERIPH_HIBERNATE) ||
- (ulPeripheral == SYSCTL_PERIPH_I2C0) ||
- (ulPeripheral == SYSCTL_PERIPH_I2C1) ||
- (ulPeripheral == SYSCTL_PERIPH_I2S0) ||
- (ulPeripheral == SYSCTL_PERIPH_IEEE1588) ||
- (ulPeripheral == SYSCTL_PERIPH_MPU) ||
- (ulPeripheral == SYSCTL_PERIPH_PLL) ||
- (ulPeripheral == SYSCTL_PERIPH_PWM) ||
- (ulPeripheral == SYSCTL_PERIPH_QEI0) ||
- (ulPeripheral == SYSCTL_PERIPH_QEI1) ||
- (ulPeripheral == SYSCTL_PERIPH_SSI0) ||
- (ulPeripheral == SYSCTL_PERIPH_SSI1) ||
- (ulPeripheral == SYSCTL_PERIPH_TEMP) ||
- (ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
- (ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
- (ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
- (ulPeripheral == SYSCTL_PERIPH_TIMER3) ||
- (ulPeripheral == SYSCTL_PERIPH_UART0) ||
- (ulPeripheral == SYSCTL_PERIPH_UART1) ||
- (ulPeripheral == SYSCTL_PERIPH_UART2) ||
- (ulPeripheral == SYSCTL_PERIPH_UDMA) ||
- (ulPeripheral == SYSCTL_PERIPH_USB0) ||
- (ulPeripheral == SYSCTL_PERIPH_WDOG0) ||
- (ulPeripheral == SYSCTL_PERIPH_WDOG1));
-}
-#endif
-
-//*****************************************************************************
-//
-//! Gets the size of the SRAM.
-//!
-//! This function determines the size of the SRAM on the Stellaris device.
-//!
-//! \return The total number of bytes of SRAM.
-//
-//*****************************************************************************
-unsigned long
-SysCtlSRAMSizeGet(void)
-{
- //
- // Compute the size of the SRAM.
- //
- return(((HWREG(SYSCTL_DC0) & SYSCTL_DC0_SRAMSZ_M) >> 8) + 0x100);
-}
-
-//*****************************************************************************
-//
-//! Gets the size of the flash.
-//!
-//! This function determines the size of the flash on the Stellaris device.
-//!
-//! \return The total number of bytes of flash.
-//
-//*****************************************************************************
-unsigned long
-SysCtlFlashSizeGet(void)
-{
- //
- // Compute the size of the flash.
- //
- return(((HWREG(SYSCTL_DC0) & SYSCTL_DC0_FLASHSZ_M) << 11) + 0x800);
-}
-
-//*****************************************************************************
-//
-//! Determines if a pin is present.
-//!
-//! \param ulPin is the pin in question.
-//!
-//! Determines if a particular pin is present in the device. The PWM, analog
-//! comparators, ADC, and timers have a varying number of pins across members
-//! of the Stellaris family; this will determine which are present on this
-//! device.
-//!
-//! The \e ulPin argument must be only one of the following values:
-//! \b SYSCTL_PIN_PWM0, \b SYSCTL_PIN_PWM1, \b SYSCTL_PIN_PWM2,
-//! \b SYSCTL_PIN_PWM3, \b SYSCTL_PIN_PWM4, \b SYSCTL_PIN_PWM5,
-//! \b SYSCTL_PIN_C0MINUS, \b SYSCTL_PIN_C0PLUS, \b SYSCTL_PIN_C0O,
-//! \b SYSCTL_PIN_C1MINUS, \b SYSCTL_PIN_C1PLUS, \b SYSCTL_PIN_C1O,
-//! \b SYSCTL_PIN_C2MINUS, \b SYSCTL_PIN_C2PLUS, \b SYSCTL_PIN_C2O,
-//! \b SYSCTL_PIN_ADC0, \b SYSCTL_PIN_ADC1, \b SYSCTL_PIN_ADC2,
-//! \b SYSCTL_PIN_ADC3, \b SYSCTL_PIN_ADC4, \b SYSCTL_PIN_ADC5,
-//! \b SYSCTL_PIN_ADC6, \b SYSCTL_PIN_ADC7, \b SYSCTL_PIN_CCP0,
-//! \b SYSCTL_PIN_CCP1, \b SYSCTL_PIN_CCP2, \b SYSCTL_PIN_CCP3,
-//! \b SYSCTL_PIN_CCP4, \b SYSCTL_PIN_CCP5, \b SYSCTL_PIN_CCP6,
-//! \b SYSCTL_PIN_CCP7, \b SYSCTL_PIN_32KHZ, or \b SYSCTL_PIN_MC_FAULT0.
-//!
-//! \return Returns \b true if the specified pin is present and \b false if it
-//! is not.
-//
-//*****************************************************************************
-tBoolean
-SysCtlPinPresent(unsigned long ulPin)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulPin == SYSCTL_PIN_PWM0) ||
- (ulPin == SYSCTL_PIN_PWM1) ||
- (ulPin == SYSCTL_PIN_PWM2) ||
- (ulPin == SYSCTL_PIN_PWM3) ||
- (ulPin == SYSCTL_PIN_PWM4) ||
- (ulPin == SYSCTL_PIN_PWM5) ||
- (ulPin == SYSCTL_PIN_C0MINUS) ||
- (ulPin == SYSCTL_PIN_C0PLUS) ||
- (ulPin == SYSCTL_PIN_C0O) ||
- (ulPin == SYSCTL_PIN_C1MINUS) ||
- (ulPin == SYSCTL_PIN_C1PLUS) ||
- (ulPin == SYSCTL_PIN_C1O) ||
- (ulPin == SYSCTL_PIN_C2MINUS) ||
- (ulPin == SYSCTL_PIN_C2PLUS) ||
- (ulPin == SYSCTL_PIN_C2O) ||
- (ulPin == SYSCTL_PIN_MC_FAULT0) ||
- (ulPin == SYSCTL_PIN_ADC0) ||
- (ulPin == SYSCTL_PIN_ADC1) ||
- (ulPin == SYSCTL_PIN_ADC2) ||
- (ulPin == SYSCTL_PIN_ADC3) ||
- (ulPin == SYSCTL_PIN_ADC4) ||
- (ulPin == SYSCTL_PIN_ADC5) ||
- (ulPin == SYSCTL_PIN_ADC6) ||
- (ulPin == SYSCTL_PIN_ADC7) ||
- (ulPin == SYSCTL_PIN_CCP0) ||
- (ulPin == SYSCTL_PIN_CCP1) ||
- (ulPin == SYSCTL_PIN_CCP2) ||
- (ulPin == SYSCTL_PIN_CCP3) ||
- (ulPin == SYSCTL_PIN_CCP4) ||
- (ulPin == SYSCTL_PIN_CCP5) ||
- (ulPin == SYSCTL_PIN_32KHZ));
-
- //
- // Determine if this pin is present.
- //
- if(HWREG(SYSCTL_DC3) & ulPin)
- {
- return(true);
- }
- else
- {
- return(false);
- }
-}
-
-//*****************************************************************************
-//
-//! Determines if a peripheral is present.
-//!
-//! \param ulPeripheral is the peripheral in question.
-//!
-//! Determines if a particular peripheral is present in the device. Each
-//! member of the Stellaris family has a different peripheral set; this will
-//! determine which are present on this device.
-//!
-//! The \e ulPeripheral parameter must be only one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_IEEE1588, \b SYSCTL_PERIPH_MPU,
-//! \b SYSCTL_PERIPH_PLL, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TEMP, \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1,
-//! \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0,
-//! \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA,
-//! \b SYSCTL_PERIPH_USB0, or \b SYSCTL_PERIPH_WDOG.
-//!
-//! \return Returns \b true if the specified peripheral is present and \b false
-//! if it is not.
-//
-//*****************************************************************************
-tBoolean
-SysCtlPeripheralPresent(unsigned long ulPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Read the correct DC register and determine if this peripheral exists.
- //
- if(HWREG(g_pulDCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &
- SYSCTL_PERIPH_MASK(ulPeripheral))
- {
- return(true);
- }
- else
- {
- return(false);
- }
-}
-
-//*****************************************************************************
-//
-//! Performs a software reset of a peripheral.
-//!
-//! \param ulPeripheral is the peripheral to reset.
-//!
-//! This function performs a software reset of the specified peripheral. An
-//! individual peripheral reset signal is asserted for a brief period and then
-//! deasserted, leaving the peripheral in a operating state but in its reset
-//! condition.
-//!
-//! The \e ulPeripheral parameter must be only one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,
-//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1,
-//! \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA, \b SYSCTL_PERIPH_USB0, or
-//! \b SYSCTL_PERIPH_WDOG.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralReset(unsigned long ulPeripheral)
-{
- volatile unsigned long ulDelay;
-
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Put the peripheral into the reset state.
- //
- HWREG(g_pulSRCRRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) |=
- SYSCTL_PERIPH_MASK(ulPeripheral);
-
- //
- // Delay for a little bit.
- //
- for(ulDelay = 0; ulDelay < 16; ulDelay++)
- {
- }
-
- //
- // Take the peripheral out of the reset state.
- //
- HWREG(g_pulSRCRRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &=
- ~SYSCTL_PERIPH_MASK(ulPeripheral);
-}
-
-//*****************************************************************************
-//
-//! Enables a peripheral.
-//!
-//! \param ulPeripheral is the peripheral to enable.
-//!
-//! Peripherals are enabled with this function. At power-up, all peripherals
-//! are disabled; they must be enabled in order to operate or respond to
-//! register reads/writes.
-//!
-//! The \e ulPeripheral parameter must be only one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,
-//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1,
-//! \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA, \b SYSCTL_PERIPH_USB0, or
-//! \b SYSCTL_PERIPH_WDOG.
-//!
-//! \note It takes five clock cycles after the write to enable a peripheral
-//! before the the peripheral is actually enabled. During this time, attempts
-//! to access the peripheral will result in a bus fault. Care should be taken
-//! to ensure that the peripheral is not accessed during this brief time
-//! period.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralEnable(unsigned long ulPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Enable this peripheral.
- //
- HWREG(g_pulRCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) |=
- SYSCTL_PERIPH_MASK(ulPeripheral);
-}
-
-//*****************************************************************************
-//
-//! Disables a peripheral.
-//!
-//! \param ulPeripheral is the peripheral to disable.
-//!
-//! Peripherals are disabled with this function. Once disabled, they will not
-//! operate or respond to register reads/writes.
-//!
-//! The \e ulPeripheral parameter must be only one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,
-//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1,
-//! \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA, \b SYSCTL_PERIPH_USB0, or
-//! \b SYSCTL_PERIPH_WDOG.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralDisable(unsigned long ulPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Disable this peripheral.
- //
- HWREG(g_pulRCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &=
- ~SYSCTL_PERIPH_MASK(ulPeripheral);
-}
-
-//*****************************************************************************
-//
-//! Enables a peripheral in sleep mode.
-//!
-//! \param ulPeripheral is the peripheral to enable in sleep mode.
-//!
-//! This function allows a peripheral to continue operating when the processor
-//! goes into sleep mode. Since the clocking configuration of the device does
-//! not change, any peripheral can safely continue operating while the
-//! processor is in sleep mode, and can therefore wake the processor from sleep
-//! mode.
-//!
-//! Sleep mode clocking of peripherals must be enabled via
-//! SysCtlPeripheralClockGating(); if disabled, the peripheral sleep mode
-//! configuration is maintained but has no effect when sleep mode is entered.
-//!
-//! The \e ulPeripheral parameter must be only one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,
-//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1,
-//! \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA, \b SYSCTL_PERIPH_USB0, or
-//! \b SYSCTL_PERIPH_WDOG.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralSleepEnable(unsigned long ulPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Enable this peripheral in sleep mode.
- //
- HWREG(g_pulSCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) |=
- SYSCTL_PERIPH_MASK(ulPeripheral);
-}
-
-//*****************************************************************************
-//
-//! Disables a peripheral in sleep mode.
-//!
-//! \param ulPeripheral is the peripheral to disable in sleep mode.
-//!
-//! This function causes a peripheral to stop operating when the processor goes
-//! into sleep mode. Disabling peripherals while in sleep mode helps to lower
-//! the current draw of the device. If enabled (via SysCtlPeripheralEnable()),
-//! the peripheral will automatically resume operation when the processor
-//! leaves sleep mode, maintaining its entire state from before sleep mode was
-//! entered.
-//!
-//! Sleep mode clocking of peripherals must be enabled via
-//! SysCtlPeripheralClockGating(); if disabled, the peripheral sleep mode
-//! configuration is maintained but has no effect when sleep mode is entered.
-//!
-//! The \e ulPeripheral parameter must be only one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,
-//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1,
-//! \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA, \b SYSCTL_PERIPH_USB0, or
-//! \b SYSCTL_PERIPH_WDOG.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralSleepDisable(unsigned long ulPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Disable this peripheral in sleep mode.
- //
- HWREG(g_pulSCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &=
- ~SYSCTL_PERIPH_MASK(ulPeripheral);
-}
-
-//*****************************************************************************
-//
-//! Enables a peripheral in deep-sleep mode.
-//!
-//! \param ulPeripheral is the peripheral to enable in deep-sleep mode.
-//!
-//! This function allows a peripheral to continue operating when the processor
-//! goes into deep-sleep mode. Since the clocking configuration of the device
-//! may change, not all peripherals can safely continue operating while the
-//! processor is in sleep mode. Those that must run at a particular frequency
-//! (such as a UART) will not work as expected if the clock changes. It is the
-//! responsibility of the caller to make sensible choices.
-//!
-//! Deep-sleep mode clocking of peripherals must be enabled via
-//! SysCtlPeripheralClockGating(); if disabled, the peripheral deep-sleep mode
-//! configuration is maintained but has no effect when deep-sleep mode is
-//! entered.
-//!
-//! The \e ulPeripheral parameter must be one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,
-//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1,
-//! \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA, \b SYSCTL_PERIPH_USB0, or
-//! \b SYSCTL_PERIPH_WDOG.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Enable this peripheral in deep-sleep mode.
- //
- HWREG(g_pulDCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) |=
- SYSCTL_PERIPH_MASK(ulPeripheral);
-}
-
-//*****************************************************************************
-//
-//! Disables a peripheral in deep-sleep mode.
-//!
-//! \param ulPeripheral is the peripheral to disable in deep-sleep mode.
-//!
-//! This function causes a peripheral to stop operating when the processor goes
-//! into deep-sleep mode. Disabling peripherals while in deep-sleep mode helps
-//! to lower the current draw of the device, and can keep peripherals that
-//! require a particular clock frequency from operating when the clock changes
-//! as a result of entering deep-sleep mode. If enabled (via
-//! SysCtlPeripheralEnable()), the peripheral will automatically resume
-//! operation when the processor leaves deep-sleep mode, maintaining its entire
-//! state from before deep-sleep mode was entered.
-//!
-//! Deep-sleep mode clocking of peripherals must be enabled via
-//! SysCtlPeripheralClockGating(); if disabled, the peripheral deep-sleep mode
-//! configuration is maintained but has no effect when deep-sleep mode is
-//! entered.
-//!
-//! The \e ulPeripheral parameter must be one of the following values:
-//! \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
-//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0, \b SYSCTL_PERIPH_COMP1,
-//! \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_ETH, \b SYSCTL_PERIPH_GPIOA,
-//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
-//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
-//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0,
-//! \b SYSCTL_PERIPH_I2C1, \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_QEI0,
-//! \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0, \b SYSCTL_PERIPH_SSI1,
-//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,
-//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1,
-//! \b SYSCTL_PERIPH_UART2, \b SYSCTL_PERIPH_UDMA, \b SYSCTL_PERIPH_USB0, or
-//! \b SYSCTL_PERIPH_WDOG.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT(SysCtlPeripheralValid(ulPeripheral));
-
- //
- // Disable this peripheral in deep-sleep mode.
- //
- HWREG(g_pulDCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &=
- ~SYSCTL_PERIPH_MASK(ulPeripheral);
-}
-
-//*****************************************************************************
-//
-//! Controls peripheral clock gating in sleep and deep-sleep mode.
-//!
-//! \param bEnable is a boolean that is \b true if the sleep and deep-sleep
-//! peripheral configuration should be used and \b false if not.
-//!
-//! This function controls how peripherals are clocked when the processor goes
-//! into sleep or deep-sleep mode. By default, the peripherals are clocked the
-//! same as in run mode; if peripheral clock gating is enabled they are clocked
-//! according to the configuration set by SysCtlPeripheralSleepEnable(),
-//! SysCtlPeripheralSleepDisable(), SysCtlPeripheralDeepSleepEnable(), and
-//! SysCtlPeripheralDeepSleepDisable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPeripheralClockGating(tBoolean bEnable)
-{
- //
- // Enable peripheral clock gating as requested.
- //
- if(bEnable)
- {
- HWREG(SYSCTL_RCC) |= SYSCTL_RCC_ACG;
- }
- else
- {
- HWREG(SYSCTL_RCC) &= ~(SYSCTL_RCC_ACG);
- }
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the system control interrupt.
-//!
-//! \param pfnHandler is a pointer to the function to be called when the system
-//! control interrupt occurs.
-//!
-//! This sets the handler to be called when a system control interrupt occurs.
-//! This will enable the global interrupt in the interrupt controller; specific
-//! system control interrupts must be enabled via SysCtlIntEnable(). It is the
-//! interrupt handler's responsibility to clear the interrupt source via
-//! SysCtlIntClear().
-//!
-//! System control can generate interrupts when the PLL achieves lock, if the
-//! internal LDO current limit is exceeded, if the internal oscillator fails,
-//! if the main oscillator fails, if the internal LDO output voltage droops too
-//! much, if the external voltage droops too much, or if the PLL fails.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlIntRegister(void (*pfnHandler)(void))
-{
- //
- // Register the interrupt handler, returning an error if an error occurs.
- //
- IntRegister(INT_SYSCTL, pfnHandler);
-
- //
- // Enable the system control interrupt.
- //
- IntEnable(INT_SYSCTL);
-}
-
-//*****************************************************************************
-//
-//! Unregisters the interrupt handler for the system control interrupt.
-//!
-//! This function will clear the handler to be called when a system control
-//! interrupt occurs. This will also mask off the interrupt in the interrupt
-//! controller so that the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlIntUnregister(void)
-{
- //
- // Disable the interrupt.
- //
- IntDisable(INT_SYSCTL);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(INT_SYSCTL);
-}
-
-//*****************************************************************************
-//
-//! Enables individual system control interrupt sources.
-//!
-//! \param ulInts is a bit mask of the interrupt sources to be enabled. Must
-//! be a logical OR of \b SYSCTL_INT_PLL_LOCK, \b SYSCTL_INT_CUR_LIMIT,
-//! \b SYSCTL_INT_IOSC_FAIL, \b SYSCTL_INT_MOSC_FAIL, \b SYSCTL_INT_POR,
-//! \b SYSCTL_INT_BOR, and/or \b SYSCTL_INT_PLL_FAIL.
-//!
-//! Enables the indicated system control interrupt sources. Only the sources
-//! that are enabled can be reflected to the processor interrupt; disabled
-//! sources have no effect on the processor.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlIntEnable(unsigned long ulInts)
-{
- //
- // Enable the specified interrupts.
- //
- HWREG(SYSCTL_IMC) |= ulInts;
-}
-
-//*****************************************************************************
-//
-//! Disables individual system control interrupt sources.
-//!
-//! \param ulInts is a bit mask of the interrupt sources to be disabled. Must
-//! be a logical OR of \b SYSCTL_INT_PLL_LOCK, \b SYSCTL_INT_CUR_LIMIT,
-//! \b SYSCTL_INT_IOSC_FAIL, \b SYSCTL_INT_MOSC_FAIL, \b SYSCTL_INT_POR,
-//! \b SYSCTL_INT_BOR, and/or \b SYSCTL_INT_PLL_FAIL.
-//!
-//! Disables the indicated system control interrupt sources. Only the sources
-//! that are enabled can be reflected to the processor interrupt; disabled
-//! sources have no effect on the processor.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlIntDisable(unsigned long ulInts)
-{
- //
- // Disable the specified interrupts.
- //
- HWREG(SYSCTL_IMC) &= ~(ulInts);
-}
-
-//*****************************************************************************
-//
-//! Clears system control interrupt sources.
-//!
-//! \param ulInts is a bit mask of the interrupt sources to be cleared. Must
-//! be a logical OR of \b SYSCTL_INT_PLL_LOCK, \b SYSCTL_INT_CUR_LIMIT,
-//! \b SYSCTL_INT_IOSC_FAIL, \b SYSCTL_INT_MOSC_FAIL, \b SYSCTL_INT_POR,
-//! \b SYSCTL_INT_BOR, and/or \b SYSCTL_INT_PLL_FAIL.
-//!
-//! The specified system control interrupt sources are cleared, so that they no
-//! longer assert. This must be done in the interrupt handler to keep it from
-//! being called again immediately upon exit.
-//!
-//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
-//! several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared. Failure to do so may result in the interrupt handler
-//! being immediately reentered (since NVIC still sees the interrupt source
-//! asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlIntClear(unsigned long ulInts)
-{
- //
- // Clear the requested interrupt sources.
- //
- HWREG(SYSCTL_MISC) = ulInts;
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param bMasked is false if the raw interrupt status is required and true if
-//! the masked interrupt status is required.
-//!
-//! This returns the interrupt status for the system controller. Either the
-//! raw interrupt status or the status of interrupts that are allowed to
-//! reflect to the processor can be returned.
-//!
-//! \return The current interrupt status, enumerated as a bit field of
-//! \b SYSCTL_INT_PLL_LOCK, \b SYSCTL_INT_CUR_LIMIT, \b SYSCTL_INT_IOSC_FAIL,
-//! \b SYSCTL_INT_MOSC_FAIL, \b SYSCTL_INT_POR, \b SYSCTL_INT_BOR, and
-//! \b SYSCTL_INT_PLL_FAIL.
-//
-//*****************************************************************************
-unsigned long
-SysCtlIntStatus(tBoolean bMasked)
-{
- //
- // Return either the interrupt status or the raw interrupt status as
- // requested.
- //
- if(bMasked)
- {
- return(HWREG(SYSCTL_MISC));
- }
- else
- {
- return(HWREG(SYSCTL_RIS));
- }
-}
-
-//*****************************************************************************
-//
-//! Sets the output voltage of the LDO.
-//!
-//! \param ulVoltage is the required output voltage from the LDO. Must be one
-//! of \b SYSCTL_LDO_2_25V, \b SYSCTL_LDO_2_30V, \b SYSCTL_LDO_2_35V,
-//! \b SYSCTL_LDO_2_40V, \b SYSCTL_LDO_2_45V, \b SYSCTL_LDO_2_50V,
-//! \b SYSCTL_LDO_2_55V, \b SYSCTL_LDO_2_60V, \b SYSCTL_LDO_2_65V,
-//! \b SYSCTL_LDO_2_70V, or \b SYSCTL_LDO_2_75V.
-//!
-//! This function sets the output voltage of the LDO. The default voltage is
-//! 2.5 V; it can be adjusted +/- 10%.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlLDOSet(unsigned long ulVoltage)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulVoltage == SYSCTL_LDO_2_25V) ||
- (ulVoltage == SYSCTL_LDO_2_30V) ||
- (ulVoltage == SYSCTL_LDO_2_35V) ||
- (ulVoltage == SYSCTL_LDO_2_40V) ||
- (ulVoltage == SYSCTL_LDO_2_45V) ||
- (ulVoltage == SYSCTL_LDO_2_50V) ||
- (ulVoltage == SYSCTL_LDO_2_55V) ||
- (ulVoltage == SYSCTL_LDO_2_60V) ||
- (ulVoltage == SYSCTL_LDO_2_65V) ||
- (ulVoltage == SYSCTL_LDO_2_70V) ||
- (ulVoltage == SYSCTL_LDO_2_75V));
-
- //
- // Set the LDO voltage to the requested value.
- //
- HWREG(SYSCTL_LDOPCTL) = ulVoltage;
-}
-
-//*****************************************************************************
-//
-//! Gets the output voltage of the LDO.
-//!
-//! This function determines the output voltage of the LDO, as specified by the
-//! control register.
-//!
-//! \return Returns the current voltage of the LDO; will be one of
-//! \b SYSCTL_LDO_2_25V, \b SYSCTL_LDO_2_30V, \b SYSCTL_LDO_2_35V,
-//! \b SYSCTL_LDO_2_40V, \b SYSCTL_LDO_2_45V, \b SYSCTL_LDO_2_50V,
-//! \b SYSCTL_LDO_2_55V, \b SYSCTL_LDO_2_60V, \b SYSCTL_LDO_2_65V,
-//! \b SYSCTL_LDO_2_70V, or \b SYSCTL_LDO_2_75V.
-//
-//*****************************************************************************
-unsigned long
-SysCtlLDOGet(void)
-{
- //
- // Return the LDO voltage setting.
- //
- return(HWREG(SYSCTL_LDOPCTL));
-}
-
-//*****************************************************************************
-//
-//! Configures the LDO failure control.
-//!
-//! \param ulConfig is the required LDO failure control setting; can be either
-//! \b SYSCTL_LDOCFG_ARST or \b SYSCTL_LDOCFG_NORST.
-//!
-//! This function allows the LDO to be configured to cause a processor reset
-//! when the output voltage becomes unregulated.
-//!
-//! The LDO failure control is only available on Sandstorm-class devices.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlLDOConfigSet(unsigned long ulConfig)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulConfig == SYSCTL_LDOCFG_ARST) ||
- (ulConfig == SYSCTL_LDOCFG_NORST));
-
- //
- // Set the reset control as requested.
- //
- HWREG(SYSCTL_LDOARST) = ulConfig;
-}
-
-//*****************************************************************************
-//
-//! Resets the device.
-//!
-//! This function will perform a software reset of the entire device. The
-//! processor and all peripherals will be reset and all device registers will
-//! return to their default values (with the exception of the reset cause
-//! register, which will maintain its current value but have the software reset
-//! bit set as well).
-//!
-//! \return This function does not return.
-//
-//*****************************************************************************
-void
-SysCtlReset(void)
-{
- //
- // Perform a software reset request. This will cause the device to reset,
- // no further code will be executed.
- //
- HWREG(NVIC_APINT) = NVIC_APINT_VECTKEY | NVIC_APINT_SYSRESETREQ;
-
- //
- // The device should have reset, so this should never be reached. Just in
- // case, loop forever.
- //
- while(1)
- {
- }
-}
-
-//*****************************************************************************
-//
-//! Puts the processor into sleep mode.
-//!
-//! This function places the processor into sleep mode; it will not return
-//! until the processor returns to run mode. The peripherals that are enabled
-//! via SysCtlPeripheralSleepEnable() continue to operate and can wake up the
-//! processor (if automatic clock gating is enabled with
-//! SysCtlPeripheralClockGating(), otherwise all peripherals continue to
-//! operate).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlSleep(void)
-{
- //
- // Wait for an interrupt.
- //
- CPUwfi();
-}
-
-//*****************************************************************************
-//
-//! Puts the processor into deep-sleep mode.
-//!
-//! This function places the processor into deep-sleep mode; it will not return
-//! until the processor returns to run mode. The peripherals that are enabled
-//! via SysCtlPeripheralDeepSleepEnable() continue to operate and can wake up
-//! the processor (if automatic clock gating is enabled with
-//! SysCtlPeripheralClockGating(), otherwise all peripherals continue to
-//! operate).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlDeepSleep(void)
-{
- //
- // Enable deep-sleep.
- //
- HWREG(NVIC_SYS_CTRL) |= NVIC_SYS_CTRL_SLEEPDEEP;
-
- //
- // Wait for an interrupt.
- //
- CPUwfi();
-
- //
- // Disable deep-sleep so that a future sleep will work correctly.
- //
- HWREG(NVIC_SYS_CTRL) &= ~(NVIC_SYS_CTRL_SLEEPDEEP);
-}
-
-//*****************************************************************************
-//
-//! Gets the reason for a reset.
-//!
-//! This function will return the reason(s) for a reset. Since the reset
-//! reasons are sticky until either cleared by software or an external reset,
-//! multiple reset reasons may be returned if multiple resets have occurred.
-//! The reset reason will be a logical OR of \b SYSCTL_CAUSE_LDO,
-//! \b SYSCTL_CAUSE_SW, \b SYSCTL_CAUSE_WDOG, \b SYSCTL_CAUSE_BOR,
-//! \b SYSCTL_CAUSE_POR, and/or \b SYSCTL_CAUSE_EXT.
-//!
-//! \return Returns the reason(s) for a reset.
-//
-//*****************************************************************************
-unsigned long
-SysCtlResetCauseGet(void)
-{
- //
- // Return the reset reasons.
- //
- return(HWREG(SYSCTL_RESC));
-}
-
-//*****************************************************************************
-//
-//! Clears reset reasons.
-//!
-//! \param ulCauses are the reset causes to be cleared; must be a logical OR of
-//! \b SYSCTL_CAUSE_LDO, \b SYSCTL_CAUSE_SW, \b SYSCTL_CAUSE_WDOG,
-//! \b SYSCTL_CAUSE_BOR, \b SYSCTL_CAUSE_POR, and/or \b SYSCTL_CAUSE_EXT.
-//!
-//! This function clears the specified sticky reset reasons. Once cleared,
-//! another reset for the same reason can be detected, and a reset for a
-//! different reason can be distinguished (instead of having two reset causes
-//! set). If the reset reason is used by an application, all reset causes
-//! should be cleared after they are retrieved with SysCtlResetCauseGet().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlResetCauseClear(unsigned long ulCauses)
-{
- //
- // Clear the given reset reasons.
- //
- HWREG(SYSCTL_RESC) &= ~(ulCauses);
-}
-
-//*****************************************************************************
-//
-//! Configures the brown-out control.
-//!
-//! \param ulConfig is the desired configuration of the brown-out control.
-//! Must be the logical OR of \b SYSCTL_BOR_RESET and/or
-//! \b SYSCTL_BOR_RESAMPLE.
-//! \param ulDelay is the number of internal oscillator cycles to wait before
-//! resampling an asserted brown-out signal. This value only has meaning when
-//! \b SYSCTL_BOR_RESAMPLE is set and must be less than 8192.
-//!
-//! This function configures how the brown-out control operates. It can detect
-//! a brown-out by looking at only the brown-out output, or it can wait for it
-//! to be active for two consecutive samples separated by a configurable time.
-//! When it detects a brown-out condition, it can either reset the device or
-//! generate a processor interrupt.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlBrownOutConfigSet(unsigned long ulConfig, unsigned long ulDelay)
-{
- //
- // Check the arguments.
- //
- ASSERT(!(ulConfig & ~(SYSCTL_BOR_RESET | SYSCTL_BOR_RESAMPLE)));
- ASSERT(ulDelay < 8192);
-
- //
- // Configure the brown-out reset control.
- //
- HWREG(SYSCTL_PBORCTL) = (ulDelay << SYSCTL_PBORCTL_BORTIM_S) | ulConfig;
-}
-
-//*****************************************************************************
-//
-//! Provides a small delay.
-//!
-//! \param ulCount is the number of delay loop iterations to perform.
-//!
-//! This function provides a means of generating a constant length delay. It
-//! is written in assembly to keep the delay consistent across tool chains,
-//! avoiding the need to tune the delay based on the tool chain in use.
-//!
-//! The loop takes 3 cycles/loop.
-//!
-//! \return None.
-//
-//*****************************************************************************
-#if defined(ewarm) || defined(DOXYGEN)
-void
-SysCtlDelay(unsigned long ulCount)
-{
- __asm(" subs r0, #1\n"
- " bne.n SysCtlDelay\n"
- " bx lr");
-}
-#endif
-#if defined(codered) || defined(gcc) || defined(sourcerygxx)
-void __attribute__((naked))
-SysCtlDelay(unsigned long ulCount)
-{
- __asm(" subs r0, #1\n"
- " bne SysCtlDelay\n"
- " bx lr");
-}
-#endif
-#if defined(rvmdk) || defined(__ARMCC_VERSION)
-__asm void
-SysCtlDelay(unsigned long ulCount)
-{
- subs r0, #1;
- bne SysCtlDelay;
- bx lr;
-}
-#endif
-
-//*****************************************************************************
-//
-//! Sets the clocking of the device.
-//!
-//! \param ulConfig is the required configuration of the device clocking.
-//!
-//! This function configures the clocking of the device. The input crystal
-//! frequency, oscillator to be used, use of the PLL, and the system clock
-//! divider are all configured with this function.
-//!
-//! The \e ulConfig parameter is the logical OR of several different values,
-//! many of which are grouped into sets where only one can be chosen.
-//!
-//! The system clock divider is chosen with one of the following values:
-//! \b SYSCTL_SYSDIV_1, \b SYSCTL_SYSDIV_2, \b SYSCTL_SYSDIV_3, ...
-//! \b SYSCTL_SYSDIV_64. Only \b SYSCTL_SYSDIV_1 through \b SYSCTL_SYSDIV_16
-//! are valid on Sandstorm-class devices.
-//!
-//! The use of the PLL is chosen with either \b SYSCTL_USE_PLL or
-//! \b SYSCTL_USE_OSC.
-//!
-//! The external crystal frequency is chosen with one of the following values:
-//! \b SYSCTL_XTAL_1MHZ, \b SYSCTL_XTAL_1_84MHZ, \b SYSCTL_XTAL_2MHZ,
-//! \b SYSCTL_XTAL_2_45MHZ, \b SYSCTL_XTAL_3_57MHZ, \b SYSCTL_XTAL_3_68MHZ,
-//! \b SYSCTL_XTAL_4MHZ, \b SYSCTL_XTAL_4_09MHZ, \b SYSCTL_XTAL_4_91MHZ,
-//! \b SYSCTL_XTAL_5MHZ, \b SYSCTL_XTAL_5_12MHZ, \b SYSCTL_XTAL_6MHZ,
-//! \b SYSCTL_XTAL_6_14MHZ, \b SYSCTL_XTAL_7_37MHZ, \b SYSCTL_XTAL_8MHZ,
-//! \b SYSCTL_XTAL_8_19MHZ, \b SYSCTL_XTAL_10MHZ, \b SYSCTL_XTAL_12MHZ,
-//! \b SYSCTL_XTAL_12_2MHZ, \b SYSCTL_XTAL_13_5MHZ, \b SYSCTL_XTAL_14_3MHZ,
-//! \b SYSCTL_XTAL_16MHZ, or \b SYSCTL_XTAL_16_3MHZ. Values below
-//! \b SYSCTL_XTAL_3_57MHZ are not valid when the PLL is in operation. On
-//! Sandstorm- and Fury-class devices, values above \b SYSCTL_XTAL_8_19MHZ are
-//! not valid.
-//!
-//! The oscillator source is chosen with one of the following values:
-//! \b SYSCTL_OSC_MAIN, \b SYSCTL_OSC_INT, \b SYSCTL_OSC_INT4,
-//! \b SYSCTL_OSC_INT30, or \b SYSCTL_OSC_EXT32. On Sandstorm-class devices,
-//! \b SYSCTL_OSC_INT30 and \b SYSCTL_OSC_EXT32 are not valid.
-//! \b SYSCTL_OSC_EXT32 is only available on devices with the hibernate module,
-//! and then only when the hibernate module has been enabled.
-//!
-//! The internal and main oscillators are disabled with the
-//! \b SYSCTL_INT_OSC_DIS and \b SYSCTL_MAIN_OSC_DIS flags, respectively.
-//! The external oscillator must be enabled in order to use an external clock
-//! source. Note that attempts to disable the oscillator used to clock the
-//! device will be prevented by the hardware.
-//!
-//! To clock the system from an external source (such as an external crystal
-//! oscillator), use \b SYSCTL_USE_OSC \b | \b SYSCTL_OSC_MAIN. To clock the
-//! system from the main oscillator, use \b SYSCTL_USE_OSC \b |
-//! \b SYSCTL_OSC_MAIN. To clock the system from the PLL, use
-//! \b SYSCTL_USE_PLL \b | \b SYSCTL_OSC_MAIN, and select the appropriate
-//! crystal with one of the \b SYSCTL_XTAL_xxx values.
-//!
-//! \note If selecting the PLL as the system clock source (that is, via
-//! \b SYSCTL_USE_PLL), this function will poll the PLL lock interrupt to
-//! determine when the PLL has locked. If an interrupt handler for the
-//! system control interrupt is in place, and it responds to and clears the
-//! PLL lock interrupt, this function will delay until its timeout has occurred
-//! instead of completing as soon as PLL lock is achieved.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlClockSet(unsigned long ulConfig)
-{
- unsigned long ulDelay, ulRCC, ulRCC2;
-
- //
- // See if this is a Sandstorm-class device and clocking features from newer
- // devices were requested.
- //
- if(CLASS_IS_SANDSTORM && (ulConfig & SYSCTL_RCC2_USERCC2))
- {
- //
- // Return without changing the clocking since the requested
- // configuration can not be achieved.
- //
- return;
- }
-
- //
- // Get the current value of the RCC and RCC2 registers. If using a
- // Sandstorm-class device, the RCC2 register will read back as zero and the
- // writes to it from within this function will be ignored.
- //
- ulRCC = HWREG(SYSCTL_RCC);
- ulRCC2 = HWREG(SYSCTL_RCC2);
-
- //
- // Bypass the PLL and system clock dividers for now.
- //
- ulRCC |= SYSCTL_RCC_BYPASS;
- ulRCC &= ~(SYSCTL_RCC_USESYSDIV);
- ulRCC2 |= SYSCTL_RCC2_BYPASS2;
-
- //
- // Write the new RCC value.
- //
- HWREG(SYSCTL_RCC) = ulRCC;
- HWREG(SYSCTL_RCC2) = ulRCC2;
-
- //
- // See if either oscillator needs to be enabled.
- //
- if(((ulRCC & SYSCTL_RCC_IOSCDIS) && !(ulConfig & SYSCTL_RCC_IOSCDIS)) ||
- ((ulRCC & SYSCTL_RCC_MOSCDIS) && !(ulConfig & SYSCTL_RCC_MOSCDIS)))
- {
- //
- // Make sure that the required oscillators are enabled. For now, the
- // previously enabled oscillators must be enabled along with the newly
- // requested oscillators.
- //
- ulRCC &= (~(SYSCTL_RCC_IOSCDIS | SYSCTL_RCC_MOSCDIS) |
- (ulConfig & (SYSCTL_RCC_IOSCDIS | SYSCTL_RCC_MOSCDIS)));
-
- //
- // Write the new RCC value.
- //
- HWREG(SYSCTL_RCC) = ulRCC;
-
- //
- // Wait for a bit, giving the oscillator time to stabilize. The number
- // of iterations is adjusted based on the current clock source; a
- // smaller number of iterations is required for slower clock rates.
- //
- if(((ulRCC2 & SYSCTL_RCC2_USERCC2) &&
- (((ulRCC2 & SYSCTL_RCC2_OSCSRC2_M) == SYSCTL_RCC2_OSCSRC2_30) ||
- ((ulRCC2 & SYSCTL_RCC2_OSCSRC2_M) == SYSCTL_RCC2_OSCSRC2_32))) ||
- (!(ulRCC2 & SYSCTL_RCC2_USERCC2) &&
- ((ulRCC & SYSCTL_RCC_OSCSRC_M) == SYSCTL_RCC_OSCSRC_30)))
- {
- //
- // Delay for 4096 iterations.
- //
- SysCtlDelay(4096);
- }
- else
- {
- //
- // Delay for 524,288 iterations.
- //
- SysCtlDelay(524288);
- }
- }
-
- //
- // Set the new crystal value, oscillator source, and PLL configuration.
- // Since the OSCSRC2 field in RCC2 overlaps the XTAL field in RCC, the
- // OSCSRC field has a special encoding within ulConfig to avoid the
- // overlap.
- //
- ulRCC &= ~(SYSCTL_RCC_XTAL_M | SYSCTL_RCC_OSCSRC_M |
- SYSCTL_RCC_PWRDN | SYSCTL_RCC_OEN);
- ulRCC |= ulConfig & (SYSCTL_RCC_XTAL_M | SYSCTL_RCC_OSCSRC_M |
- SYSCTL_RCC_PWRDN | SYSCTL_RCC_OEN);
- ulRCC2 &= ~(SYSCTL_RCC2_USERCC2 | SYSCTL_RCC2_OSCSRC2_M |
- SYSCTL_RCC2_PWRDN2);
- ulRCC2 |= ulConfig & (SYSCTL_RCC2_USERCC2 | SYSCTL_RCC_OSCSRC_M |
- SYSCTL_RCC2_PWRDN2);
- ulRCC2 |= (ulConfig & 0x00000008) << 3;
-
- //
- // Clear the PLL lock interrupt.
- //
- HWREG(SYSCTL_MISC) = SYSCTL_INT_PLL_LOCK;
-
- //
- // Write the new RCC value.
- //
- if(ulRCC2 & SYSCTL_RCC2_USERCC2)
- {
- HWREG(SYSCTL_RCC2) = ulRCC2;
- HWREG(SYSCTL_RCC) = ulRCC;
- }
- else
- {
- HWREG(SYSCTL_RCC) = ulRCC;
- HWREG(SYSCTL_RCC2) = ulRCC2;
- }
-
- //
- // Wait for a bit so that new crystal value and oscillator source can take
- // effect.
- //
- SysCtlDelay(16);
-
- //
- // Set the requested system divider and disable the appropriate
- // oscillators. This will not get written immediately.
- //
- ulRCC &= ~(SYSCTL_RCC_SYSDIV_M | SYSCTL_RCC_USESYSDIV |
- SYSCTL_RCC_IOSCDIS | SYSCTL_RCC_MOSCDIS);
- ulRCC |= ulConfig & (SYSCTL_RCC_SYSDIV_M | SYSCTL_RCC_USESYSDIV |
- SYSCTL_RCC_IOSCDIS | SYSCTL_RCC_MOSCDIS);
- ulRCC2 &= ~(SYSCTL_RCC2_SYSDIV2_M);
- ulRCC2 |= ulConfig & SYSCTL_RCC2_SYSDIV2_M;
- if(ulConfig & SYSCTL_RCC2_USEFRACT)
- {
- ulRCC |= SYSCTL_RCC_USESYSDIV;
- ulRCC2 &= ~(SYSCTL_RCC_USESYSDIV);
- ulRCC2 |= ulConfig & (SYSCTL_RCC2_USEFRACT | SYSCTL_RCC2_FRACT);
- }
- else
- {
- ulRCC2 &= ~(SYSCTL_RCC2_USEFRACT);
- }
-
- //
- // See if the PLL output is being used to clock the system.
- //
- if(!(ulConfig & SYSCTL_RCC_BYPASS))
- {
- //
- // Wait until the PLL has locked.
- //
- for(ulDelay = 32768; ulDelay > 0; ulDelay--)
- {
- if(HWREG(SYSCTL_RIS) & SYSCTL_INT_PLL_LOCK)
- {
- break;
- }
- }
-
- //
- // Enable use of the PLL.
- //
- ulRCC &= ~(SYSCTL_RCC_BYPASS);
- ulRCC2 &= ~(SYSCTL_RCC2_BYPASS2);
- }
-
- //
- // Write the final RCC value.
- //
- HWREG(SYSCTL_RCC) = ulRCC;
- HWREG(SYSCTL_RCC2) = ulRCC2;
-
- //
- // Delay for a little bit so that the system divider takes effect.
- //
- SysCtlDelay(16);
-}
-
-//*****************************************************************************
-//
-//! Gets the processor clock rate.
-//!
-//! This function determines the clock rate of the processor clock. This is
-//! also the clock rate of all the peripheral modules (with the exception of
-//! PWM, which has its own clock divider).
-//!
-//! \note This will not return accurate results if SysCtlClockSet() has not
-//! been called to configure the clocking of the device, or if the device is
-//! directly clocked from a crystal (or a clock source) that is not one of the
-//! supported crystal frequencies. In the later case, this function should be
-//! modified to directly return the correct system clock rate.
-//!
-//! \return The processor clock rate.
-//
-//*****************************************************************************
-unsigned long
-SysCtlClockGet(void)
-{
- unsigned long ulRCC, ulRCC2, ulPLL, ulClk;
-
- //
- // Read RCC and RCC2. For Sandstorm-class devices (which do not have
- // RCC2), the RCC2 read will return 0, which indicates that RCC2 is
- // disabled (since the SYSCTL_RCC2_USERCC2 bit is clear).
- //
- ulRCC = HWREG(SYSCTL_RCC);
- ulRCC2 = HWREG(SYSCTL_RCC2);
-
- //
- // Get the base clock rate.
- //
- switch((ulRCC2 & SYSCTL_RCC2_USERCC2) ?
- (ulRCC2 & SYSCTL_RCC2_OSCSRC2_M) :
- (ulRCC & SYSCTL_RCC_OSCSRC_M))
- {
- //
- // The main oscillator is the clock source. Determine its rate from
- // the crystal setting field.
- //
- case SYSCTL_RCC_OSCSRC_MAIN:
- {
- ulClk = g_pulXtals[(ulRCC & SYSCTL_RCC_XTAL_M) >>
- SYSCTL_RCC_XTAL_S];
- break;
- }
-
- //
- // The internal oscillator is the source clock.
- //
- case SYSCTL_RCC_OSCSRC_INT:
- {
- //
- // See if this is a Sandstorm-class or Fury-class device.
- //
- if(CLASS_IS_SANDSTORM)
- {
- //
- // The internal oscillator on a Sandstorm-class device is
- // 15 MHz +/- 50%.
- //
- ulClk = 15000000;
- }
- else if((CLASS_IS_FURY && REVISION_IS_A2) ||
- (CLASS_IS_DUSTDEVIL && REVISION_IS_A0))
- {
- //
- // The internal oscillator on a rev A2 Fury-class device and a
- // rev A0 Dustdevil-class device is 12 MHz +/- 30%.
- //
- ulClk = 12000000;
- }
- else
- {
- //
- // The internal oscillator on all other devices is 16 MHz.
- //
- ulClk = 16000000;
- }
- break;
- }
-
- //
- // The internal oscillator divided by four is the source clock.
- //
- case SYSCTL_RCC_OSCSRC_INT4:
- {
- //
- // See if this is a Sandstorm-class or Fury-class device.
- //
- if(CLASS_IS_SANDSTORM)
- {
- //
- // The internal oscillator on a Sandstorm-class device is
- // 15 MHz +/- 50%.
- //
- ulClk = 15000000 / 4;
- }
- else if((CLASS_IS_FURY && REVISION_IS_A2) ||
- (CLASS_IS_DUSTDEVIL && REVISION_IS_A0))
- {
- //
- // The internal oscillator on a rev A2 Fury-class device and a
- // rev A0 Dustdevil-class device is 12 MHz +/- 30%.
- //
- ulClk = 12000000 / 4;
- }
- else
- {
- //
- // The internal oscillator on a Tempest-class device is 16 MHz.
- //
- ulClk = 16000000 / 4;
- }
- break;
- }
-
- //
- // The internal 30 KHz oscillator is the source clock.
- //
- case SYSCTL_RCC_OSCSRC_30:
- {
- //
- // The internal 30 KHz oscillator has an accuracy of +/- 30%.
- //
- ulClk = 30000;
- break;
- }
-
- //
- // The 4.19 MHz clock from the hibernate module is the clock source.
- //
- case SYSCTL_RCC2_OSCSRC2_419:
- {
- ulClk = 4194304;
- break;
- }
-
- //
- // The 32 KHz clock from the hibernate module is the source clock.
- //
- case SYSCTL_RCC2_OSCSRC2_32:
- {
- ulClk = 32768;
- break;
- }
-
- //
- // An unknown setting, so return a zero clock (that is, an unknown
- // clock rate).
- //
- default:
- {
- return(0);
- }
- }
-
- //
- // See if the PLL is being used.
- //
- if(((ulRCC2 & SYSCTL_RCC2_USERCC2) && !(ulRCC2 & SYSCTL_RCC2_BYPASS2)) ||
- (!(ulRCC2 & SYSCTL_RCC2_USERCC2) && !(ulRCC & SYSCTL_RCC_BYPASS)))
- {
- //
- // Get the PLL configuration.
- //
- ulPLL = HWREG(SYSCTL_PLLCFG);
-
- //
- // See if this is a Sandstorm-class or Fury-class device.
- //
- if(CLASS_IS_SANDSTORM)
- {
- //
- // Compute the PLL output frequency based on its input frequency.
- // The formula for a Sandstorm-class devices is
- // "(xtal * (f + 2)) / (r + 2)".
- //
- ulClk = ((ulClk * (((ulPLL & SYSCTL_PLLCFG_F_M) >>
- SYSCTL_PLLCFG_F_S) + 2)) /
- (((ulPLL & SYSCTL_PLLCFG_R_M) >>
- SYSCTL_PLLCFG_R_S) + 2));
- }
- else
- {
- //
- // Compute the PLL output frequency based on its input frequency.
- // The formula for a Fury-class device is
- // "(xtal * f) / ((r + 1) * 2)".
- //
- ulClk = ((ulClk * ((ulPLL & SYSCTL_PLLCFG_F_M) >>
- SYSCTL_PLLCFG_F_S)) /
- ((((ulPLL & SYSCTL_PLLCFG_R_M) >>
- SYSCTL_PLLCFG_R_S) + 1) * 2));
- }
-
- //
- // See if the optional output divide by 2 is being used.
- //
- if(ulPLL & SYSCTL_PLLCFG_OD_2)
- {
- ulClk /= 2;
- }
-
- //
- // See if the optional output divide by 4 is being used.
- //
- if(ulPLL & SYSCTL_PLLCFG_OD_4)
- {
- ulClk /= 4;
- }
- }
-
- //
- // See if the system divider is being used.
- //
- if(ulRCC & SYSCTL_RCC_USESYSDIV)
- {
- //
- // Adjust the clock rate by the system clock divider.
- //
- if(ulRCC2 & SYSCTL_RCC2_USERCC2)
- {
- if((ulRCC2 & SYSCTL_RCC2_USEFRACT) &&
- (((ulRCC2 & SYSCTL_RCC2_USERCC2) &&
- !(ulRCC2 & SYSCTL_RCC2_BYPASS2)) ||
- (!(ulRCC2 & SYSCTL_RCC2_USERCC2) &&
- !(ulRCC & SYSCTL_RCC_BYPASS))))
-
- {
- ulClk = ((ulClk * 2) / (((ulRCC2 & (SYSCTL_RCC2_SYSDIV2_M |
- SYSCTL_RCC2_FRACT)) >>
- (SYSCTL_RCC2_SYSDIV2_S - 1)) + 1));
- }
- else
- {
- ulClk /= (((ulRCC2 & SYSCTL_RCC2_SYSDIV2_M) >>
- SYSCTL_RCC2_SYSDIV2_S) + 1);
- }
- }
- else
- {
- ulClk /= (((ulRCC & SYSCTL_RCC_SYSDIV_M) >> SYSCTL_RCC_SYSDIV_S) +
- 1);
- }
- }
-
- //
- // Return the computed clock rate.
- //
- return(ulClk);
-}
-
-//*****************************************************************************
-//
-//! Sets the PWM clock configuration.
-//!
-//! \param ulConfig is the configuration for the PWM clock; it must be one of
-//! \b SYSCTL_PWMDIV_1, \b SYSCTL_PWMDIV_2, \b SYSCTL_PWMDIV_4,
-//! \b SYSCTL_PWMDIV_8, \b SYSCTL_PWMDIV_16, \b SYSCTL_PWMDIV_32, or
-//! \b SYSCTL_PWMDIV_64.
-//!
-//! This function sets the rate of the clock provided to the PWM module as a
-//! ratio of the processor clock. This clock is used by the PWM module to
-//! generate PWM signals; its rate forms the basis for all PWM signals.
-//!
-//! \note The clocking of the PWM is dependent upon the system clock rate as
-//! configured by SysCtlClockSet().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPWMClockSet(unsigned long ulConfig)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulConfig == SYSCTL_PWMDIV_1) ||
- (ulConfig == SYSCTL_PWMDIV_2) ||
- (ulConfig == SYSCTL_PWMDIV_4) ||
- (ulConfig == SYSCTL_PWMDIV_8) ||
- (ulConfig == SYSCTL_PWMDIV_16) ||
- (ulConfig == SYSCTL_PWMDIV_32) ||
- (ulConfig == SYSCTL_PWMDIV_64));
-
- //
- // Check that there is a PWM block on this part.
- //
- ASSERT(HWREG(SYSCTL_DC1) & SYSCTL_DC1_PWM);
-
- //
- // Set the PWM clock configuration into the run-mode clock configuration
- // register.
- //
- HWREG(SYSCTL_RCC) = ((HWREG(SYSCTL_RCC) &
- ~(SYSCTL_RCC_USEPWMDIV | SYSCTL_RCC_PWMDIV_M)) |
- ulConfig);
-}
-
-//*****************************************************************************
-//
-//! Gets the current PWM clock configuration.
-//!
-//! This function returns the current PWM clock configuration.
-//!
-//! \return Returns the current PWM clock configuration; will be one of
-//! \b SYSCTL_PWMDIV_1, \b SYSCTL_PWMDIV_2, \b SYSCTL_PWMDIV_4,
-//! \b SYSCTL_PWMDIV_8, \b SYSCTL_PWMDIV_16, \b SYSCTL_PWMDIV_32, or
-//! \b SYSCTL_PWMDIV_64.
-//
-//*****************************************************************************
-unsigned long
-SysCtlPWMClockGet(void)
-{
- //
- // Check that there is a PWM block on this part.
- //
- ASSERT(HWREG(SYSCTL_DC1) & SYSCTL_DC1_PWM);
-
- //
- // Return the current PWM clock configuration. Make sure that
- // SYSCTL_PWMDIV_1 is returned in all cases where the divider is disabled.
- //
- if(!(HWREG(SYSCTL_RCC) & SYSCTL_RCC_USEPWMDIV))
- {
- //
- // The divider is not active so reflect this in the value we return.
- //
- return(SYSCTL_PWMDIV_1);
- }
- else
- {
- //
- // The divider is active so directly return the masked register value.
- //
- return(HWREG(SYSCTL_RCC) &
- (SYSCTL_RCC_USEPWMDIV | SYSCTL_RCC_PWMDIV_M));
- }
-}
-
-//*****************************************************************************
-//
-//! Sets the sample rate of the ADC.
-//!
-//! \param ulSpeed is the desired sample rate of the ADC; must be one of
-//! \b SYSCTL_ADCSPEED_1MSPS, \b SYSCTL_ADCSPEED_500KSPS,
-//! \b SYSCTL_ADCSPEED_250KSPS, or \b SYSCTL_ADCSPEED_125KSPS.
-//!
-//! This function sets the rate at which the ADC samples are captured by the
-//! ADC block. The sampling speed may be limited by the hardware, so the
-//! sample rate may end up being slower than requested. SysCtlADCSpeedGet()
-//! will return the actual speed in use.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlADCSpeedSet(unsigned long ulSpeed)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulSpeed == SYSCTL_ADCSPEED_1MSPS) ||
- (ulSpeed == SYSCTL_ADCSPEED_500KSPS) ||
- (ulSpeed == SYSCTL_ADCSPEED_250KSPS) ||
- (ulSpeed == SYSCTL_ADCSPEED_125KSPS));
-
- //
- // Check that there is an ADC block on this part.
- //
- ASSERT(HWREG(SYSCTL_DC1) & SYSCTL_DC1_ADC0);
-
- //
- // Set the ADC speed in run, sleep, and deep-sleep mode.
- //
- HWREG(SYSCTL_RCGC0) = ((HWREG(SYSCTL_RCGC0) & ~(SYSCTL_RCGC0_ADCSPD_M)) |
- ulSpeed);
- HWREG(SYSCTL_SCGC0) = ((HWREG(SYSCTL_SCGC0) & ~(SYSCTL_SCGC0_ADCSPD_M)) |
- ulSpeed);
- HWREG(SYSCTL_DCGC0) = ((HWREG(SYSCTL_DCGC0) & ~(SYSCTL_DCGC0_ADCSPD_M)) |
- ulSpeed);
-}
-
-//*****************************************************************************
-//
-//! Gets the sample rate of the ADC.
-//!
-//! This function gets the current sample rate of the ADC.
-//!
-//! \return Returns the current ADC sample rate; will be one of
-//! \b SYSCTL_ADCSPEED_1MSPS, \b SYSCTL_ADCSPEED_500KSPS,
-//! \b SYSCTL_ADCSPEED_250KSPS, or \b SYSCTL_ADCSPEED_125KSPS.
-//
-//*****************************************************************************
-unsigned long
-SysCtlADCSpeedGet(void)
-{
- //
- // Check that there is an ADC block on this part.
- //
- ASSERT(HWREG(SYSCTL_DC1) & SYSCTL_DC1_ADC0);
-
- //
- // Return the current ADC speed.
- //
- return(HWREG(SYSCTL_RCGC0) & SYSCTL_RCGC0_ADCSPD_M);
-}
-
-//*****************************************************************************
-//
-//! Configures the internal oscillator verification timer.
-//!
-//! \param bEnable is a boolean that is \b true if the internal oscillator
-//! verification timer should be enabled.
-//!
-//! This function allows the internal oscillator verification timer to be
-//! enabled or disabled. When enabled, an interrupt will be generated if the
-//! internal oscillator ceases to operate.
-//!
-//! The internal oscillator verification timer is only available on
-//! Sandstorm-class devices.
-//!
-//! \note Both oscillators (main and internal) must be enabled for this
-//! verification timer to operate as the main oscillator will verify the
-//! internal oscillator.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlIOSCVerificationSet(tBoolean bEnable)
-{
- //
- // Enable or disable the internal oscillator verification timer as
- // requested.
- //
- if(bEnable)
- {
- HWREG(SYSCTL_RCC) |= SYSCTL_RCC_IOSCVER;
- }
- else
- {
- HWREG(SYSCTL_RCC) &= ~(SYSCTL_RCC_IOSCVER);
- }
-}
-
-//*****************************************************************************
-//
-//! Configures the main oscillator verification timer.
-//!
-//! \param bEnable is a boolean that is \b true if the main oscillator
-//! verification timer should be enabled.
-//!
-//! This function allows the main oscillator verification timer to be enabled
-//! or disabled. When enabled, an interrupt will be generated if the main
-//! oscillator ceases to operate.
-//!
-//! The main oscillator verification timer is only available on
-//! Sandstorm-class devices.
-//!
-//! \note Both oscillators (main and internal) must be enabled for this
-//! verification timer to operate as the internal oscillator will verify the
-//! main oscillator.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlMOSCVerificationSet(tBoolean bEnable)
-{
- //
- // Enable or disable the main oscillator verification timer as requested.
- //
- if(bEnable)
- {
- HWREG(SYSCTL_RCC) |= SYSCTL_RCC_MOSCVER;
- }
- else
- {
- HWREG(SYSCTL_RCC) &= ~(SYSCTL_RCC_MOSCVER);
- }
-}
-
-//*****************************************************************************
-//
-//! Configures the PLL verification timer.
-//!
-//! \param bEnable is a boolean that is \b true if the PLL verification timer
-//! should be enabled.
-//!
-//! This function allows the PLL verification timer to be enabled or disabled.
-//! When enabled, an interrupt will be generated if the PLL ceases to operate.
-//!
-//! The PLL verification timer is only available on Sandstorm-class devices.
-//!
-//! \note The main oscillator must be enabled for this verification timer to
-//! operate as it is used to check the PLL. Also, the verification timer
-//! should be disabled while the PLL is being reconfigured via
-//! SysCtlClockSet().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlPLLVerificationSet(tBoolean bEnable)
-{
- //
- // Enable or disable the PLL verification timer as requested.
- //
- if(bEnable)
- {
- HWREG(SYSCTL_RCC) |= SYSCTL_RCC_PLLVER;
- }
- else
- {
- HWREG(SYSCTL_RCC) &= ~(SYSCTL_RCC_PLLVER);
- }
-}
-
-//*****************************************************************************
-//
-//! Clears the clock verification status.
-//!
-//! This function clears the status of the clock verification timers, allowing
-//! them to assert another failure if detected.
-//!
-//! The clock verification timers are only available on Sandstorm-class
-//! devices.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlClkVerificationClear(void)
-{
- //
- // Clear the clock verification.
- //
- HWREG(SYSCTL_CLKVCLR) = SYSCTL_CLKVCLR_VERCLR;
-
- //
- // The bit does not self-reset, so clear it.
- //
- HWREG(SYSCTL_CLKVCLR) = 0;
-}
-
-//*****************************************************************************
-//
-//! Enables a GPIO peripheral for access from the AHB.
-//!
-//! \param ulGPIOPeripheral is the GPIO peripheral to enable.
-//!
-//! This function is used to enable the specified GPIO peripheral to be
-//! accessed from the Advanced Host Bus (AHB) instead of the legacy Advanced
-//! Peripheral Bus (APB). When a GPIO peripheral is enabled for AHB access,
-//! the \b _AHB_BASE form of the base address should be used for GPIO
-//! functions. For example, instead of using \b GPIO_PORTA_BASE as the base
-//! address for GPIO functions, use \b GPIO_PORTA_AHB_BASE instead.
-//!
-//! The \e ulGPIOPeripheral argument must be only one of the following values:
-//! \b SYSCTL_PERIPH_GPIOA, \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC,
-//! \b SYSCTL_PERIPH_GPIOD, \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF,
-//! \b SYSCTL_PERIPH_GPIOG, or \b SYSCTL_PERIPH_GPIOH.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlGPIOAHBEnable(unsigned long ulGPIOPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulGPIOPeripheral == SYSCTL_PERIPH_GPIOA) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOB) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOC) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOD) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOE) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOF) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOG) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOH) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOJ));
-
- //
- // Enable this GPIO for AHB access.
- //
- HWREG(SYSCTL_GPIOHSCTL) |= ulGPIOPeripheral & 0xFFFF;
-}
-
-//*****************************************************************************
-//
-//! Disables a GPIO peripheral for access from the AHB.
-//!
-//! \param ulGPIOPeripheral is the GPIO peripheral to disable.
-//!
-//! This function disables the specified GPIO peripheral for access from the
-//! Advanced Host Bus (AHB). Once disabled, the GPIO peripheral is accessed
-//! from the legacy Advanced Peripheral Bus (AHB).
-//!
-//! The \b ulGPIOPeripheral argument must be only one of the following values:
-//! \b SYSCTL_PERIPH_GPIOA, \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC,
-//! \b SYSCTL_PERIPH_GPIOD, \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF,
-//! \b SYSCTL_PERIPH_GPIOG, or \b SYSCTL_PERIPH_GPIOH.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlGPIOAHBDisable(unsigned long ulGPIOPeripheral)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulGPIOPeripheral == SYSCTL_PERIPH_GPIOA) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOB) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOC) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOD) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOE) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOF) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOG) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOH) ||
- (ulGPIOPeripheral == SYSCTL_PERIPH_GPIOJ));
-
- //
- // Disable this GPIO for AHB access.
- //
- HWREG(SYSCTL_GPIOHSCTL) &= ~(ulGPIOPeripheral & 0xFFFF);
-}
-
-//*****************************************************************************
-//
-//! Powers up the USB PLL.
-//!
-//! This function will enable the USB controller's PLL which is used by it's
-//! physical layer. This call is necessary before connecting to any external
-//! devices.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlUSBPLLEnable(void)
-{
- //
- // Turn on the USB PLL.
- //
- HWREG(SYSCTL_RCC2) &= ~SYSCTL_RCC2_USBPWRDN;
-}
-
-//*****************************************************************************
-//
-//! Powers down the USB PLL.
-//!
-//! This function will disable the USB controller's PLL which is used by it's
-//! physical layer. The USB registers are still accessible, but the physical
-//! layer will no longer function.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysCtlUSBPLLDisable(void)
-{
- //
- // Turn of USB PLL.
- //
- HWREG(SYSCTL_RCC2) |= SYSCTL_RCC2_USBPWRDN;
-}
-
-//*****************************************************************************
-//
-//! Sets the MCLK frequency provided to the I2S module.
-//!
-//! \param ulInputClock is the input clock to the MCLK divider. If this is
-//! zero, the value is computed from the current PLL configuration.
-//! \param ulMClk is the desired MCLK frequency. If this is zero, MCLK output
-//! is disabled.
-//!
-//! This function sets the dividers to provide MCLK to the I2S module. A MCLK
-//! divider will be chosen that produces the MCLK frequency that is the closest
-//! possible to the requested frequency, which may be above or below the
-//! requested frequency.
-//!
-//! The actual MCLK frequency will be returned. It is the responsibility of
-//! the application to determine if the selected MCLK is acceptable; in general
-//! the human ear can not discern the frequency difference if it is within 0.3%
-//! of the desired frequency (though there is a very small percentage of the
-//! population that can discern lower frequency deviations).
-//!
-//! \return Returns the actual MCLK frequency.
-//
-//*****************************************************************************
-unsigned long
-SysCtlI2SMClkSet(unsigned long ulInputClock, unsigned long ulMClk)
-{
- unsigned long ulDivInt, ulDivFrac, ulPLL;
-
- //
- // See if the I2S MCLK should be disabled.
- //
- if(ulMClk == 0)
- {
- //
- // Disable the I2S MCLK and return.
- //
- HWREG(SYSCTL_I2SMCLKCFG) = 0;
- return(0);
- }
-
- //
- // See if the input clock was specified.
- //
- if(ulInputClock == 0)
- {
- //
- // The input clock was not specified, so compute the output frequency
- // of the PLL. Get the current PLL configuration.
- //
- ulPLL = HWREG(SYSCTL_PLLCFG);
-
- //
- // Get the frequency of the crystal in use.
- //
- ulInputClock = g_pulXtals[(HWREG(SYSCTL_RCC) & SYSCTL_RCC_XTAL_M) >>
- SYSCTL_RCC_XTAL_S];
-
- //
- // Calculate the PLL output frequency.
- //
- ulInputClock = ((ulInputClock * ((ulPLL & SYSCTL_PLLCFG_F_M) >>
- SYSCTL_PLLCFG_F_S)) /
- ((((ulPLL & SYSCTL_PLLCFG_R_M) >>
- SYSCTL_PLLCFG_R_S) + 1)));
-
- //
- // See if the optional output divide by 2 is being used.
- //
- if(ulPLL & SYSCTL_PLLCFG_OD_2)
- {
- ulInputClock /= 2;
- }
-
- //
- // See if the optional output divide by 4 is being used.
- //
- if(ulPLL & SYSCTL_PLLCFG_OD_4)
- {
- ulInputClock /= 4;
- }
- }
-
- //
- // Verify that the requested MCLK frequency is attainable.
- //
- ASSERT(ulMClk < ulInputClock);
-
- //
- // Add a rounding factor to the input clock, so that the MCLK frequency
- // that is closest to the desire value is selected.
- //
- ulInputClock += (ulMClk / 32) - 1;
-
- //
- // Compute the integer portion of the MCLK divider.
- //
- ulDivInt = ulInputClock / ulMClk;
-
- //
- // If the divisor is too large, then simply use the maximum divisor.
- //
- if(CLASS_IS_TEMPEST && REVISION_IS_B1 && (ulDivInt > 255))
- {
- ulDivInt = 255;
- ulDivFrac = 15;
- }
- else if(ulDivInt > 1023)
- {
- ulDivInt = 1023;
- ulDivFrac = 15;
- }
- else
- {
- //
- // Compute the fractional portion of the MCLK divider.
- //
- ulDivFrac = ((ulInputClock - (ulDivInt * ulMClk)) * 16) / ulMClk;
- }
-
- //
- // Set the divisor for the Tx and Rx MCLK generators and enable the clocks.
- //
- HWREG(SYSCTL_I2SMCLKCFG) = (SYSCTL_I2SMCLKCFG_RXEN |
- (ulDivInt << SYSCTL_I2SMCLKCFG_RXI_S) |
- (ulDivFrac << SYSCTL_I2SMCLKCFG_RXF_S) |
- SYSCTL_I2SMCLKCFG_TXEN |
- (ulDivInt << SYSCTL_I2SMCLKCFG_TXI_S) |
- (ulDivFrac << SYSCTL_I2SMCLKCFG_TXF_S));
-
- //
- // Return the actual MCLK frequency.
- //
- ulInputClock -= (ulMClk / 32) - 1;
- ulDivInt = (ulDivInt * 16) + ulDivFrac;
- ulMClk = (ulInputClock / ulDivInt) * 16;
- ulMClk += ((ulInputClock - ((ulMClk / 16) * ulDivInt)) * 16) / ulDivInt;
- return(ulMClk);
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/sysctl.h b/bsp/lm3s/driverlib/sysctl.h
deleted file mode 100644
index 3cef7f76212ca8df75026812b41dcc5a7fd68405..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/sysctl.h
+++ /dev/null
@@ -1,469 +0,0 @@
-//*****************************************************************************
-//
-// sysctl.h - Prototypes for the system control driver.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __SYSCTL_H__
-#define __SYSCTL_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the
-// SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),
-// SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the
-// ulPeripheral parameter. The peripherals in the fourth group (upper nibble
-// is 3) can only be used with the SysCtlPeripheralPresent() API.
-//
-//*****************************************************************************
-#ifndef DEPRECATED
-#define SYSCTL_PERIPH_WDOG 0x00000008 // Watchdog
-#endif
-#define SYSCTL_PERIPH_WDOG0 0x00000008 // Watchdog 0
-#define SYSCTL_PERIPH_HIBERNATE 0x00000040 // Hibernation module
-#ifndef DEPRECATED
-#define SYSCTL_PERIPH_ADC 0x00100001 // ADC
-#endif
-#define SYSCTL_PERIPH_ADC0 0x00100001 // ADC0
-#define SYSCTL_PERIPH_ADC1 0x00100002 // ADC1
-#define SYSCTL_PERIPH_PWM 0x00100010 // PWM
-#define SYSCTL_PERIPH_CAN0 0x00100100 // CAN 0
-#define SYSCTL_PERIPH_CAN1 0x00100200 // CAN 1
-#define SYSCTL_PERIPH_CAN2 0x00100400 // CAN 2
-#define SYSCTL_PERIPH_WDOG1 0x00101000 // Watchdog 1
-#define SYSCTL_PERIPH_UART0 0x10000001 // UART 0
-#define SYSCTL_PERIPH_UART1 0x10000002 // UART 1
-#define SYSCTL_PERIPH_UART2 0x10000004 // UART 2
-#ifndef DEPRECATED
-#define SYSCTL_PERIPH_SSI 0x10000010 // SSI
-#endif
-#define SYSCTL_PERIPH_SSI0 0x10000010 // SSI 0
-#define SYSCTL_PERIPH_SSI1 0x10000020 // SSI 1
-#ifndef DEPRECATED
-#define SYSCTL_PERIPH_QEI 0x10000100 // QEI
-#endif
-#define SYSCTL_PERIPH_QEI0 0x10000100 // QEI 0
-#define SYSCTL_PERIPH_QEI1 0x10000200 // QEI 1
-#ifndef DEPRECATED
-#define SYSCTL_PERIPH_I2C 0x10001000 // I2C
-#endif
-#define SYSCTL_PERIPH_I2C0 0x10001000 // I2C 0
-#define SYSCTL_PERIPH_I2C1 0x10004000 // I2C 1
-#define SYSCTL_PERIPH_TIMER0 0x10100001 // Timer 0
-#define SYSCTL_PERIPH_TIMER1 0x10100002 // Timer 1
-#define SYSCTL_PERIPH_TIMER2 0x10100004 // Timer 2
-#define SYSCTL_PERIPH_TIMER3 0x10100008 // Timer 3
-#define SYSCTL_PERIPH_COMP0 0x10100100 // Analog comparator 0
-#define SYSCTL_PERIPH_COMP1 0x10100200 // Analog comparator 1
-#define SYSCTL_PERIPH_COMP2 0x10100400 // Analog comparator 2
-#define SYSCTL_PERIPH_I2S0 0x10101000 // I2S0
-#define SYSCTL_PERIPH_EPI0 0x10104000 // EPI0
-#define SYSCTL_PERIPH_GPIOA 0x20000001 // GPIO A
-#define SYSCTL_PERIPH_GPIOB 0x20000002 // GPIO B
-#define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
-#define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
-#define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
-#define SYSCTL_PERIPH_GPIOF 0x20000020 // GPIO F
-#define SYSCTL_PERIPH_GPIOG 0x20000040 // GPIO G
-#define SYSCTL_PERIPH_GPIOH 0x20000080 // GPIO H
-#define SYSCTL_PERIPH_GPIOJ 0x20000100 // GPIO J
-#define SYSCTL_PERIPH_UDMA 0x20002000 // uDMA
-#define SYSCTL_PERIPH_USB0 0x20100001 // USB0
-#define SYSCTL_PERIPH_ETH 0x20105000 // ETH
-#define SYSCTL_PERIPH_IEEE1588 0x20100100 // IEEE1588
-#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
-#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
-#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlPinPresent() API
-// as the ulPin parameter.
-//
-//*****************************************************************************
-#define SYSCTL_PIN_PWM0 0x00000001 // PWM0 pin
-#define SYSCTL_PIN_PWM1 0x00000002 // PWM1 pin
-#define SYSCTL_PIN_PWM2 0x00000004 // PWM2 pin
-#define SYSCTL_PIN_PWM3 0x00000008 // PWM3 pin
-#define SYSCTL_PIN_PWM4 0x00000010 // PWM4 pin
-#define SYSCTL_PIN_PWM5 0x00000020 // PWM5 pin
-#define SYSCTL_PIN_PWM6 0x00000040 // PWM6 pin
-#define SYSCTL_PIN_PWM7 0x00000080 // PWM7 pin
-#define SYSCTL_PIN_C0MINUS 0x00000040 // C0- pin
-#define SYSCTL_PIN_C0PLUS 0x00000080 // C0+ pin
-#define SYSCTL_PIN_C0O 0x00000100 // C0o pin
-#define SYSCTL_PIN_C1MINUS 0x00000200 // C1- pin
-#define SYSCTL_PIN_C1PLUS 0x00000400 // C1+ pin
-#define SYSCTL_PIN_C1O 0x00000800 // C1o pin
-#define SYSCTL_PIN_C2MINUS 0x00001000 // C2- pin
-#define SYSCTL_PIN_C2PLUS 0x00002000 // C2+ pin
-#define SYSCTL_PIN_C2O 0x00004000 // C2o pin
-#define SYSCTL_PIN_MC_FAULT0 0x00008000 // MC0 Fault pin
-#define SYSCTL_PIN_ADC0 0x00010000 // ADC0 pin
-#define SYSCTL_PIN_ADC1 0x00020000 // ADC1 pin
-#define SYSCTL_PIN_ADC2 0x00040000 // ADC2 pin
-#define SYSCTL_PIN_ADC3 0x00080000 // ADC3 pin
-#define SYSCTL_PIN_ADC4 0x00100000 // ADC4 pin
-#define SYSCTL_PIN_ADC5 0x00200000 // ADC5 pin
-#define SYSCTL_PIN_ADC6 0x00400000 // ADC6 pin
-#define SYSCTL_PIN_ADC7 0x00800000 // ADC7 pin
-#define SYSCTL_PIN_CCP0 0x01000000 // CCP0 pin
-#define SYSCTL_PIN_CCP1 0x02000000 // CCP1 pin
-#define SYSCTL_PIN_CCP2 0x04000000 // CCP2 pin
-#define SYSCTL_PIN_CCP3 0x08000000 // CCP3 pin
-#define SYSCTL_PIN_CCP4 0x10000000 // CCP4 pin
-#define SYSCTL_PIN_CCP5 0x20000000 // CCP5 pin
-#define SYSCTL_PIN_32KHZ 0x80000000 // 32kHz pin
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlLDOSet() API as
-// the ulVoltage value, or returned by the SysCtlLDOGet() API.
-//
-//*****************************************************************************
-#define SYSCTL_LDO_2_25V 0x00000005 // LDO output of 2.25V
-#define SYSCTL_LDO_2_30V 0x00000004 // LDO output of 2.30V
-#define SYSCTL_LDO_2_35V 0x00000003 // LDO output of 2.35V
-#define SYSCTL_LDO_2_40V 0x00000002 // LDO output of 2.40V
-#define SYSCTL_LDO_2_45V 0x00000001 // LDO output of 2.45V
-#define SYSCTL_LDO_2_50V 0x00000000 // LDO output of 2.50V
-#define SYSCTL_LDO_2_55V 0x0000001f // LDO output of 2.55V
-#define SYSCTL_LDO_2_60V 0x0000001e // LDO output of 2.60V
-#define SYSCTL_LDO_2_65V 0x0000001d // LDO output of 2.65V
-#define SYSCTL_LDO_2_70V 0x0000001c // LDO output of 2.70V
-#define SYSCTL_LDO_2_75V 0x0000001b // LDO output of 2.75V
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlLDOConfigSet() API.
-//
-//*****************************************************************************
-#define SYSCTL_LDOCFG_ARST 0x00000001 // Allow LDO failure to reset
-#define SYSCTL_LDOCFG_NORST 0x00000000 // Do not reset on LDO failure
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlIntEnable(),
-// SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask
-// by the SysCtlIntStatus() API.
-//
-//*****************************************************************************
-#define SYSCTL_INT_MOSC_PUP 0x00000100 // MOSC power-up interrupt
-#define SYSCTL_INT_USBPLL_LOCK 0x00000080 // USB PLL lock interrupt
-#define SYSCTL_INT_PLL_LOCK 0x00000040 // PLL lock interrupt
-#define SYSCTL_INT_CUR_LIMIT 0x00000020 // Current limit interrupt
-#define SYSCTL_INT_IOSC_FAIL 0x00000010 // Internal oscillator failure int
-#define SYSCTL_INT_MOSC_FAIL 0x00000008 // Main oscillator failure int
-#define SYSCTL_INT_POR 0x00000004 // Power on reset interrupt
-#define SYSCTL_INT_BOR 0x00000002 // Brown out interrupt
-#define SYSCTL_INT_PLL_FAIL 0x00000001 // PLL failure interrupt
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlResetCauseClear()
-// API or returned by the SysCtlResetCauseGet() API.
-//
-//*****************************************************************************
-#define SYSCTL_CAUSE_LDO 0x00000020 // LDO power not OK reset
-#define SYSCTL_CAUSE_SW 0x00000010 // Software reset
-#define SYSCTL_CAUSE_WDOG 0x00000008 // Watchdog reset
-#define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset
-#define SYSCTL_CAUSE_POR 0x00000002 // Power on reset
-#define SYSCTL_CAUSE_EXT 0x00000001 // External reset
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlBrownOutConfigSet()
-// API as the ulConfig parameter.
-//
-//*****************************************************************************
-#define SYSCTL_BOR_RESET 0x00000002 // Reset instead of interrupting
-#define SYSCTL_BOR_RESAMPLE 0x00000001 // Resample BOR before asserting
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlPWMClockSet() API
-// as the ulConfig parameter, and can be returned by the SysCtlPWMClockGet()
-// API.
-//
-//*****************************************************************************
-#define SYSCTL_PWMDIV_1 0x00000000 // PWM clock is processor clock /1
-#define SYSCTL_PWMDIV_2 0x00100000 // PWM clock is processor clock /2
-#define SYSCTL_PWMDIV_4 0x00120000 // PWM clock is processor clock /4
-#define SYSCTL_PWMDIV_8 0x00140000 // PWM clock is processor clock /8
-#define SYSCTL_PWMDIV_16 0x00160000 // PWM clock is processor clock /16
-#define SYSCTL_PWMDIV_32 0x00180000 // PWM clock is processor clock /32
-#define SYSCTL_PWMDIV_64 0x001A0000 // PWM clock is processor clock /64
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlADCSpeedSet() API
-// as the ulSpeed parameter, and can be returned by the SyCtlADCSpeedGet()
-// API.
-//
-//*****************************************************************************
-#define SYSCTL_ADCSPEED_1MSPS 0x00000300 // 1,000,000 samples per second
-#define SYSCTL_ADCSPEED_500KSPS 0x00000200 // 500,000 samples per second
-#define SYSCTL_ADCSPEED_250KSPS 0x00000100 // 250,000 samples per second
-#define SYSCTL_ADCSPEED_125KSPS 0x00000000 // 125,000 samples per second
-
-//*****************************************************************************
-//
-// The following are values that can be passed to the SysCtlClockSet() API as
-// the ulConfig parameter.
-//
-//*****************************************************************************
-#define SYSCTL_SYSDIV_1 0x07800000 // Processor clock is osc/pll /1
-#define SYSCTL_SYSDIV_2 0x00C00000 // Processor clock is osc/pll /2
-#define SYSCTL_SYSDIV_3 0x01400000 // Processor clock is osc/pll /3
-#define SYSCTL_SYSDIV_4 0x01C00000 // Processor clock is osc/pll /4
-#define SYSCTL_SYSDIV_5 0x02400000 // Processor clock is osc/pll /5
-#define SYSCTL_SYSDIV_6 0x02C00000 // Processor clock is osc/pll /6
-#define SYSCTL_SYSDIV_7 0x03400000 // Processor clock is osc/pll /7
-#define SYSCTL_SYSDIV_8 0x03C00000 // Processor clock is osc/pll /8
-#define SYSCTL_SYSDIV_9 0x04400000 // Processor clock is osc/pll /9
-#define SYSCTL_SYSDIV_10 0x04C00000 // Processor clock is osc/pll /10
-#define SYSCTL_SYSDIV_11 0x05400000 // Processor clock is osc/pll /11
-#define SYSCTL_SYSDIV_12 0x05C00000 // Processor clock is osc/pll /12
-#define SYSCTL_SYSDIV_13 0x06400000 // Processor clock is osc/pll /13
-#define SYSCTL_SYSDIV_14 0x06C00000 // Processor clock is osc/pll /14
-#define SYSCTL_SYSDIV_15 0x07400000 // Processor clock is osc/pll /15
-#define SYSCTL_SYSDIV_16 0x07C00000 // Processor clock is osc/pll /16
-#define SYSCTL_SYSDIV_17 0x88400000 // Processor clock is osc/pll /17
-#define SYSCTL_SYSDIV_18 0x88C00000 // Processor clock is osc/pll /18
-#define SYSCTL_SYSDIV_19 0x89400000 // Processor clock is osc/pll /19
-#define SYSCTL_SYSDIV_20 0x89C00000 // Processor clock is osc/pll /20
-#define SYSCTL_SYSDIV_21 0x8A400000 // Processor clock is osc/pll /21
-#define SYSCTL_SYSDIV_22 0x8AC00000 // Processor clock is osc/pll /22
-#define SYSCTL_SYSDIV_23 0x8B400000 // Processor clock is osc/pll /23
-#define SYSCTL_SYSDIV_24 0x8BC00000 // Processor clock is osc/pll /24
-#define SYSCTL_SYSDIV_25 0x8C400000 // Processor clock is osc/pll /25
-#define SYSCTL_SYSDIV_26 0x8CC00000 // Processor clock is osc/pll /26
-#define SYSCTL_SYSDIV_27 0x8D400000 // Processor clock is osc/pll /27
-#define SYSCTL_SYSDIV_28 0x8DC00000 // Processor clock is osc/pll /28
-#define SYSCTL_SYSDIV_29 0x8E400000 // Processor clock is osc/pll /29
-#define SYSCTL_SYSDIV_30 0x8EC00000 // Processor clock is osc/pll /30
-#define SYSCTL_SYSDIV_31 0x8F400000 // Processor clock is osc/pll /31
-#define SYSCTL_SYSDIV_32 0x8FC00000 // Processor clock is osc/pll /32
-#define SYSCTL_SYSDIV_33 0x90400000 // Processor clock is osc/pll /33
-#define SYSCTL_SYSDIV_34 0x90C00000 // Processor clock is osc/pll /34
-#define SYSCTL_SYSDIV_35 0x91400000 // Processor clock is osc/pll /35
-#define SYSCTL_SYSDIV_36 0x91C00000 // Processor clock is osc/pll /36
-#define SYSCTL_SYSDIV_37 0x92400000 // Processor clock is osc/pll /37
-#define SYSCTL_SYSDIV_38 0x92C00000 // Processor clock is osc/pll /38
-#define SYSCTL_SYSDIV_39 0x93400000 // Processor clock is osc/pll /39
-#define SYSCTL_SYSDIV_40 0x93C00000 // Processor clock is osc/pll /40
-#define SYSCTL_SYSDIV_41 0x94400000 // Processor clock is osc/pll /41
-#define SYSCTL_SYSDIV_42 0x94C00000 // Processor clock is osc/pll /42
-#define SYSCTL_SYSDIV_43 0x95400000 // Processor clock is osc/pll /43
-#define SYSCTL_SYSDIV_44 0x95C00000 // Processor clock is osc/pll /44
-#define SYSCTL_SYSDIV_45 0x96400000 // Processor clock is osc/pll /45
-#define SYSCTL_SYSDIV_46 0x96C00000 // Processor clock is osc/pll /46
-#define SYSCTL_SYSDIV_47 0x97400000 // Processor clock is osc/pll /47
-#define SYSCTL_SYSDIV_48 0x97C00000 // Processor clock is osc/pll /48
-#define SYSCTL_SYSDIV_49 0x98400000 // Processor clock is osc/pll /49
-#define SYSCTL_SYSDIV_50 0x98C00000 // Processor clock is osc/pll /50
-#define SYSCTL_SYSDIV_51 0x99400000 // Processor clock is osc/pll /51
-#define SYSCTL_SYSDIV_52 0x99C00000 // Processor clock is osc/pll /52
-#define SYSCTL_SYSDIV_53 0x9A400000 // Processor clock is osc/pll /53
-#define SYSCTL_SYSDIV_54 0x9AC00000 // Processor clock is osc/pll /54
-#define SYSCTL_SYSDIV_55 0x9B400000 // Processor clock is osc/pll /55
-#define SYSCTL_SYSDIV_56 0x9BC00000 // Processor clock is osc/pll /56
-#define SYSCTL_SYSDIV_57 0x9C400000 // Processor clock is osc/pll /57
-#define SYSCTL_SYSDIV_58 0x9CC00000 // Processor clock is osc/pll /58
-#define SYSCTL_SYSDIV_59 0x9D400000 // Processor clock is osc/pll /59
-#define SYSCTL_SYSDIV_60 0x9DC00000 // Processor clock is osc/pll /60
-#define SYSCTL_SYSDIV_61 0x9E400000 // Processor clock is osc/pll /61
-#define SYSCTL_SYSDIV_62 0x9EC00000 // Processor clock is osc/pll /62
-#define SYSCTL_SYSDIV_63 0x9F400000 // Processor clock is osc/pll /63
-#define SYSCTL_SYSDIV_64 0x9FC00000 // Processor clock is osc/pll /64
-#define SYSCTL_SYSDIV_2_5 0xC1000000 // Processor clock is pll / 2.5
-#define SYSCTL_SYSDIV_3_5 0xC1800000 // Processor clock is pll / 3.5
-#define SYSCTL_SYSDIV_4_5 0xC2000000 // Processor clock is pll / 4.5
-#define SYSCTL_SYSDIV_5_5 0xC2800000 // Processor clock is pll / 5.5
-#define SYSCTL_SYSDIV_6_5 0xC3000000 // Processor clock is pll / 6.5
-#define SYSCTL_SYSDIV_7_5 0xC3800000 // Processor clock is pll / 7.5
-#define SYSCTL_SYSDIV_8_5 0xC4000000 // Processor clock is pll / 8.5
-#define SYSCTL_SYSDIV_9_5 0xC4800000 // Processor clock is pll / 9.5
-#define SYSCTL_SYSDIV_10_5 0xC5000000 // Processor clock is pll / 10.5
-#define SYSCTL_SYSDIV_11_5 0xC5800000 // Processor clock is pll / 11.5
-#define SYSCTL_SYSDIV_12_5 0xC6000000 // Processor clock is pll / 12.5
-#define SYSCTL_SYSDIV_13_5 0xC6800000 // Processor clock is pll / 13.5
-#define SYSCTL_SYSDIV_14_5 0xC7000000 // Processor clock is pll / 14.5
-#define SYSCTL_SYSDIV_15_5 0xC7800000 // Processor clock is pll / 15.5
-#define SYSCTL_SYSDIV_16_5 0xC8000000 // Processor clock is pll / 16.5
-#define SYSCTL_SYSDIV_17_5 0xC8800000 // Processor clock is pll / 17.5
-#define SYSCTL_SYSDIV_18_5 0xC9000000 // Processor clock is pll / 18.5
-#define SYSCTL_SYSDIV_19_5 0xC9800000 // Processor clock is pll / 19.5
-#define SYSCTL_SYSDIV_20_5 0xCA000000 // Processor clock is pll / 20.5
-#define SYSCTL_SYSDIV_21_5 0xCA800000 // Processor clock is pll / 21.5
-#define SYSCTL_SYSDIV_22_5 0xCB000000 // Processor clock is pll / 22.5
-#define SYSCTL_SYSDIV_23_5 0xCB800000 // Processor clock is pll / 23.5
-#define SYSCTL_SYSDIV_24_5 0xCC000000 // Processor clock is pll / 24.5
-#define SYSCTL_SYSDIV_25_5 0xCC800000 // Processor clock is pll / 25.5
-#define SYSCTL_SYSDIV_26_5 0xCD000000 // Processor clock is pll / 26.5
-#define SYSCTL_SYSDIV_27_5 0xCD800000 // Processor clock is pll / 27.5
-#define SYSCTL_SYSDIV_28_5 0xCE000000 // Processor clock is pll / 28.5
-#define SYSCTL_SYSDIV_29_5 0xCE800000 // Processor clock is pll / 29.5
-#define SYSCTL_SYSDIV_30_5 0xCF000000 // Processor clock is pll / 30.5
-#define SYSCTL_SYSDIV_31_5 0xCF800000 // Processor clock is pll / 31.5
-#define SYSCTL_SYSDIV_32_5 0xD0000000 // Processor clock is pll / 32.5
-#define SYSCTL_SYSDIV_33_5 0xD0800000 // Processor clock is pll / 33.5
-#define SYSCTL_SYSDIV_34_5 0xD1000000 // Processor clock is pll / 34.5
-#define SYSCTL_SYSDIV_35_5 0xD1800000 // Processor clock is pll / 35.5
-#define SYSCTL_SYSDIV_36_5 0xD2000000 // Processor clock is pll / 36.5
-#define SYSCTL_SYSDIV_37_5 0xD2800000 // Processor clock is pll / 37.5
-#define SYSCTL_SYSDIV_38_5 0xD3000000 // Processor clock is pll / 38.5
-#define SYSCTL_SYSDIV_39_5 0xD3800000 // Processor clock is pll / 39.5
-#define SYSCTL_SYSDIV_40_5 0xD4000000 // Processor clock is pll / 40.5
-#define SYSCTL_SYSDIV_41_5 0xD4800000 // Processor clock is pll / 41.5
-#define SYSCTL_SYSDIV_42_5 0xD5000000 // Processor clock is pll / 42.5
-#define SYSCTL_SYSDIV_43_5 0xD5800000 // Processor clock is pll / 43.5
-#define SYSCTL_SYSDIV_44_5 0xD6000000 // Processor clock is pll / 44.5
-#define SYSCTL_SYSDIV_45_5 0xD6800000 // Processor clock is pll / 45.5
-#define SYSCTL_SYSDIV_46_5 0xD7000000 // Processor clock is pll / 46.5
-#define SYSCTL_SYSDIV_47_5 0xD7800000 // Processor clock is pll / 47.5
-#define SYSCTL_SYSDIV_48_5 0xD8000000 // Processor clock is pll / 48.5
-#define SYSCTL_SYSDIV_49_5 0xD8800000 // Processor clock is pll / 49.5
-#define SYSCTL_SYSDIV_50_5 0xD9000000 // Processor clock is pll / 50.5
-#define SYSCTL_SYSDIV_51_5 0xD9800000 // Processor clock is pll / 51.5
-#define SYSCTL_SYSDIV_52_5 0xDA000000 // Processor clock is pll / 52.5
-#define SYSCTL_SYSDIV_53_5 0xDA800000 // Processor clock is pll / 53.5
-#define SYSCTL_SYSDIV_54_5 0xDB000000 // Processor clock is pll / 54.5
-#define SYSCTL_SYSDIV_55_5 0xDB800000 // Processor clock is pll / 55.5
-#define SYSCTL_SYSDIV_56_5 0xDC000000 // Processor clock is pll / 56.5
-#define SYSCTL_SYSDIV_57_5 0xDC800000 // Processor clock is pll / 57.5
-#define SYSCTL_SYSDIV_58_5 0xDD000000 // Processor clock is pll / 58.5
-#define SYSCTL_SYSDIV_59_5 0xDD800000 // Processor clock is pll / 59.5
-#define SYSCTL_SYSDIV_60_5 0xDE000000 // Processor clock is pll / 60.5
-#define SYSCTL_SYSDIV_61_5 0xDE800000 // Processor clock is pll / 61.5
-#define SYSCTL_SYSDIV_62_5 0xDF000000 // Processor clock is pll / 62.5
-#define SYSCTL_SYSDIV_63_5 0xDF800000 // Processor clock is pll / 63.5
-#define SYSCTL_USE_PLL 0x00000000 // System clock is the PLL clock
-#define SYSCTL_USE_OSC 0x00003800 // System clock is the osc clock
-#define SYSCTL_XTAL_1MHZ 0x00000000 // External crystal is 1MHz
-#define SYSCTL_XTAL_1_84MHZ 0x00000040 // External crystal is 1.8432MHz
-#define SYSCTL_XTAL_2MHZ 0x00000080 // External crystal is 2MHz
-#define SYSCTL_XTAL_2_45MHZ 0x000000C0 // External crystal is 2.4576MHz
-#define SYSCTL_XTAL_3_57MHZ 0x00000100 // External crystal is 3.579545MHz
-#define SYSCTL_XTAL_3_68MHZ 0x00000140 // External crystal is 3.6864MHz
-#define SYSCTL_XTAL_4MHZ 0x00000180 // External crystal is 4MHz
-#define SYSCTL_XTAL_4_09MHZ 0x000001C0 // External crystal is 4.096MHz
-#define SYSCTL_XTAL_4_91MHZ 0x00000200 // External crystal is 4.9152MHz
-#define SYSCTL_XTAL_5MHZ 0x00000240 // External crystal is 5MHz
-#define SYSCTL_XTAL_5_12MHZ 0x00000280 // External crystal is 5.12MHz
-#define SYSCTL_XTAL_6MHZ 0x000002C0 // External crystal is 6MHz
-#define SYSCTL_XTAL_6_14MHZ 0x00000300 // External crystal is 6.144MHz
-#define SYSCTL_XTAL_7_37MHZ 0x00000340 // External crystal is 7.3728MHz
-#define SYSCTL_XTAL_8MHZ 0x00000380 // External crystal is 8MHz
-#define SYSCTL_XTAL_8_19MHZ 0x000003C0 // External crystal is 8.192MHz
-#define SYSCTL_XTAL_10MHZ 0x00000400 // External crystal is 10 MHz
-#define SYSCTL_XTAL_12MHZ 0x00000440 // External crystal is 12 MHz
-#define SYSCTL_XTAL_12_2MHZ 0x00000480 // External crystal is 12.288 MHz
-#define SYSCTL_XTAL_13_5MHZ 0x000004C0 // External crystal is 13.56 MHz
-#define SYSCTL_XTAL_14_3MHZ 0x00000500 // External crystal is 14.31818 MHz
-#define SYSCTL_XTAL_16MHZ 0x00000540 // External crystal is 16 MHz
-#define SYSCTL_XTAL_16_3MHZ 0x00000580 // External crystal is 16.384 MHz
-#define SYSCTL_OSC_MAIN 0x00000000 // Osc source is main osc
-#define SYSCTL_OSC_INT 0x00000010 // Osc source is int. osc
-#define SYSCTL_OSC_INT4 0x00000020 // Osc source is int. osc /4
-#define SYSCTL_OSC_INT30 0x00000030 // Osc source is int. 30 KHz
-#define SYSCTL_OSC_EXT4_19 0x80000028 // Osc source is ext. 4.19 MHz
-#define SYSCTL_OSC_EXT32 0x80000038 // Osc source is ext. 32 KHz
-#define SYSCTL_INT_PIOSC_DIS 0x00000004 // Disable interal precision osc.
-#define SYSCTL_INT_OSC_DIS 0x00000002 // Disable internal oscillator
-#define SYSCTL_MAIN_OSC_DIS 0x00000001 // Disable main oscillator
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern unsigned long SysCtlSRAMSizeGet(void);
-extern unsigned long SysCtlFlashSizeGet(void);
-extern tBoolean SysCtlPinPresent(unsigned long ulPin);
-extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
-extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
-extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
-extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
-extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);
-extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);
-extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);
-extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);
-extern void SysCtlPeripheralClockGating(tBoolean bEnable);
-extern void SysCtlIntRegister(void (*pfnHandler)(void));
-extern void SysCtlIntUnregister(void);
-extern void SysCtlIntEnable(unsigned long ulInts);
-extern void SysCtlIntDisable(unsigned long ulInts);
-extern void SysCtlIntClear(unsigned long ulInts);
-extern unsigned long SysCtlIntStatus(tBoolean bMasked);
-extern void SysCtlLDOSet(unsigned long ulVoltage);
-extern unsigned long SysCtlLDOGet(void);
-extern void SysCtlLDOConfigSet(unsigned long ulConfig);
-extern void SysCtlReset(void);
-extern void SysCtlSleep(void);
-extern void SysCtlDeepSleep(void);
-extern unsigned long SysCtlResetCauseGet(void);
-extern void SysCtlResetCauseClear(unsigned long ulCauses);
-extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
- unsigned long ulDelay);
-extern void SysCtlDelay(unsigned long ulCount);
-extern void SysCtlClockSet(unsigned long ulConfig);
-extern unsigned long SysCtlClockGet(void);
-extern void SysCtlPWMClockSet(unsigned long ulConfig);
-extern unsigned long SysCtlPWMClockGet(void);
-extern void SysCtlADCSpeedSet(unsigned long ulSpeed);
-extern unsigned long SysCtlADCSpeedGet(void);
-extern void SysCtlIOSCVerificationSet(tBoolean bEnable);
-extern void SysCtlMOSCVerificationSet(tBoolean bEnable);
-extern void SysCtlPLLVerificationSet(tBoolean bEnable);
-extern void SysCtlClkVerificationClear(void);
-extern void SysCtlGPIOAHBEnable(unsigned long ulGPIOPeripheral);
-extern void SysCtlGPIOAHBDisable(unsigned long ulGPIOPeripheral);
-extern void SysCtlUSBPLLEnable(void);
-extern void SysCtlUSBPLLDisable(void);
-extern unsigned long SysCtlI2SMClkSet(unsigned long ulInputClock,
- unsigned long ulMClk);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __SYSCTL_H__
diff --git a/bsp/lm3s/driverlib/systick.c b/bsp/lm3s/driverlib/systick.c
deleted file mode 100644
index 42968514434647e0e0c4835f87ddfba462ace02e..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/systick.c
+++ /dev/null
@@ -1,262 +0,0 @@
-//*****************************************************************************
-//
-// systick.c - Driver for the SysTick timer in NVIC.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup systick_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_types.h"
-#include "driverlib/debug.h"
-#include "driverlib/interrupt.h"
-#include "driverlib/systick.h"
-
-//*****************************************************************************
-//
-//! Enables the SysTick counter.
-//!
-//! This will start the SysTick counter. If an interrupt handler has been
-//! registered, it will be called when the SysTick counter rolls over.
-//!
-//! \note Calling this function will cause the SysTick counter to (re)commence
-//! counting from its current value. The counter is not automatically reloaded
-//! with the period as specified in a previous call to SysTickPeriodSet(). If
-//! an immediate reload is required, the \b NVIC_ST_CURRENT register must be
-//! written to force this. Any write to this register clears the SysTick
-//! counter to 0 and will cause a reload with the supplied period on the next
-//! clock.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysTickEnable(void)
-{
- //
- // Enable SysTick.
- //
- HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE;
-}
-
-//*****************************************************************************
-//
-//! Disables the SysTick counter.
-//!
-//! This will stop the SysTick counter. If an interrupt handler has been
-//! registered, it will no longer be called until SysTick is restarted.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysTickDisable(void)
-{
- //
- // Disable SysTick.
- //
- HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_ENABLE);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the SysTick interrupt.
-//!
-//! \param pfnHandler is a pointer to the function to be called when the
-//! SysTick interrupt occurs.
-//!
-//! This sets the handler to be called when a SysTick interrupt occurs.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysTickIntRegister(void (*pfnHandler)(void))
-{
- //
- // Register the interrupt handler, returning an error if an error occurs.
- //
- IntRegister(FAULT_SYSTICK, pfnHandler);
-
- //
- // Enable the SysTick interrupt.
- //
- HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
-}
-
-//*****************************************************************************
-//
-//! Unregisters the interrupt handler for the SysTick interrupt.
-//!
-//! This function will clear the handler to be called when a SysTick interrupt
-//! occurs.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysTickIntUnregister(void)
-{
- //
- // Disable the SysTick interrupt.
- //
- HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(FAULT_SYSTICK);
-}
-
-//*****************************************************************************
-//
-//! Enables the SysTick interrupt.
-//!
-//! This function will enable the SysTick interrupt, allowing it to be
-//! reflected to the processor.
-//!
-//! \note The SysTick interrupt handler does not need to clear the SysTick
-//! interrupt source as this is done automatically by NVIC when the interrupt
-//! handler is called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysTickIntEnable(void)
-{
- //
- // Enable the SysTick interrupt.
- //
- HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
-}
-
-//*****************************************************************************
-//
-//! Disables the SysTick interrupt.
-//!
-//! This function will disable the SysTick interrupt, preventing it from being
-//! reflected to the processor.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysTickIntDisable(void)
-{
- //
- // Disable the SysTick interrupt.
- //
- HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
-}
-
-//*****************************************************************************
-//
-//! Sets the period of the SysTick counter.
-//!
-//! \param ulPeriod is the number of clock ticks in each period of the SysTick
-//! counter; must be between 1 and 16,777,216, inclusive.
-//!
-//! This function sets the rate at which the SysTick counter wraps; this
-//! equates to the number of processor clocks between interrupts.
-//!
-//! \note Calling this function does not cause the SysTick counter to reload
-//! immediately. If an immediate reload is required, the \b NVIC_ST_CURRENT
-//! register must be written. Any write to this register clears the SysTick
-//! counter to 0 and will cause a reload with the \e ulPeriod supplied here on
-//! the next clock after the SysTick is enabled.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SysTickPeriodSet(unsigned long ulPeriod)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulPeriod > 0) && (ulPeriod <= 16777216));
-
- //
- // Set the period of the SysTick counter.
- //
- HWREG(NVIC_ST_RELOAD) = ulPeriod - 1;
-}
-
-//*****************************************************************************
-//
-//! Gets the period of the SysTick counter.
-//!
-//! This function returns the rate at which the SysTick counter wraps; this
-//! equates to the number of processor clocks between interrupts.
-//!
-//! \return Returns the period of the SysTick counter.
-//
-//*****************************************************************************
-unsigned long
-SysTickPeriodGet(void)
-{
- //
- // Return the period of the SysTick counter.
- //
- return(HWREG(NVIC_ST_RELOAD) + 1);
-}
-
-//*****************************************************************************
-//
-//! Gets the current value of the SysTick counter.
-//!
-//! This function returns the current value of the SysTick counter; this will
-//! be a value between the period - 1 and zero, inclusive.
-//!
-//! \return Returns the current value of the SysTick counter.
-//
-//*****************************************************************************
-unsigned long
-SysTickValueGet(void)
-{
- //
- // Return the current value of the SysTick counter.
- //
- return(HWREG(NVIC_ST_CURRENT));
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/systick.h b/bsp/lm3s/driverlib/systick.h
deleted file mode 100644
index e3d9d58759174bdca35e5b592f7b9895846c7f56..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/systick.h
+++ /dev/null
@@ -1,66 +0,0 @@
-//*****************************************************************************
-//
-// systick.h - Prototypes for the SysTick driver.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __SYSTICK_H__
-#define __SYSTICK_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern void SysTickEnable(void);
-extern void SysTickDisable(void);
-extern void SysTickIntRegister(void (*pfnHandler)(void));
-extern void SysTickIntUnregister(void);
-extern void SysTickIntEnable(void);
-extern void SysTickIntDisable(void);
-extern void SysTickPeriodSet(unsigned long ulPeriod);
-extern unsigned long SysTickPeriodGet(void);
-extern unsigned long SysTickValueGet(void);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __SYSTICK_H__
diff --git a/bsp/lm3s/driverlib/timer.c b/bsp/lm3s/driverlib/timer.c
deleted file mode 100644
index 8065376d1b2339741aad7d3ebd1e4adcbfadbfa1..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/timer.c
+++ /dev/null
@@ -1,1007 +0,0 @@
-//*****************************************************************************
-//
-// timer.c - Driver for the timer module.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup timer_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_timer.h"
-#include "inc/hw_types.h"
-#include "driverlib/debug.h"
-#include "driverlib/interrupt.h"
-#include "driverlib/timer.h"
-
-//*****************************************************************************
-//
-//! \internal
-//! Checks a timer base address.
-//!
-//! \param ulBase is the base address of the timer module.
-//!
-//! This function determines if a timer module base address is valid.
-//!
-//! \return Returns \b true if the base address is valid and \b false
-//! otherwise.
-//
-//*****************************************************************************
-#ifdef DEBUG
-static tBoolean
-TimerBaseValid(unsigned long ulBase)
-{
- return((ulBase == TIMER0_BASE) || (ulBase == TIMER1_BASE) ||
- (ulBase == TIMER2_BASE) || (ulBase == TIMER3_BASE));
-}
-#endif
-
-//*****************************************************************************
-//
-//! Enables the timer(s).
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to enable; must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH.
-//!
-//! This will enable operation of the timer module. The timer must be
-//! configured before it is enabled.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerEnable(unsigned long ulBase, unsigned long ulTimer)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Enable the timer(s) module.
- //
- HWREG(ulBase + TIMER_O_CTL) |= ulTimer & (TIMER_CTL_TAEN | TIMER_CTL_TBEN);
-}
-
-//*****************************************************************************
-//
-//! Disables the timer(s).
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to disable; must be one of
-//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
-//!
-//! This will disable operation of the timer module.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerDisable(unsigned long ulBase, unsigned long ulTimer)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Disable the timer module.
- //
- HWREG(ulBase + TIMER_O_CTL) &= ~(ulTimer &
- (TIMER_CTL_TAEN | TIMER_CTL_TBEN));
-}
-
-//*****************************************************************************
-//
-//! Configures the timer(s).
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulConfig is the configuration for the timer.
-//!
-//! This function configures the operating mode of the timer(s). The timer
-//! module is disabled before being configured, and is left in the disabled
-//! state. The configuration is specified in \e ulConfig as one of the
-//! following values:
-//!
-//! - \b TIMER_CFG_32_BIT_OS - 32-bit one shot timer
-//! - \b TIMER_CFG_32_BIT_PER - 32-bit periodic timer
-//! - \b TIMER_CFG_32_RTC - 32-bit real time clock timer
-//! - \b TIMER_CFG_16_BIT_PAIR - Two 16-bit timers
-//!
-//! When configured for a pair of 16-bit timers, each timer is separately
-//! configured. The first timer is configured by setting \e ulConfig to
-//! the result of a logical OR operation between one of the following values
-//! and \e ulConfig:
-//!
-//! - \b TIMER_CFG_A_ONE_SHOT - 16-bit one shot timer
-//! - \b TIMER_CFG_A_PERIODIC - 16-bit periodic timer
-//! - \b TIMER_CFG_A_CAP_COUNT - 16-bit edge count capture
-//! - \b TIMER_CFG_A_CAP_TIME - 16-bit edge time capture
-//! - \b TIMER_CFG_A_PWM - 16-bit PWM output
-//!
-//! Similarly, the second timer is configured by setting \e ulConfig to
-//! the result of a logical OR operation between one of the corresponding
-//! \b TIMER_CFG_B_* values and \e ulConfig.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerConfigure(unsigned long ulBase, unsigned long ulConfig)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulConfig == TIMER_CFG_32_BIT_OS) ||
- (ulConfig == TIMER_CFG_32_BIT_PER) ||
- (ulConfig == TIMER_CFG_32_RTC) ||
- ((ulConfig & 0xff000000) == TIMER_CFG_16_BIT_PAIR));
- ASSERT(((ulConfig & 0xff000000) != TIMER_CFG_16_BIT_PAIR) ||
- ((((ulConfig & 0x000000ff) == TIMER_CFG_A_ONE_SHOT) ||
- ((ulConfig & 0x000000ff) == TIMER_CFG_A_PERIODIC) ||
- ((ulConfig & 0x000000ff) == TIMER_CFG_A_CAP_COUNT) ||
- ((ulConfig & 0x000000ff) == TIMER_CFG_A_CAP_TIME) ||
- ((ulConfig & 0x000000ff) == TIMER_CFG_A_PWM)) &&
- (((ulConfig & 0x0000ff00) == TIMER_CFG_B_ONE_SHOT) ||
- ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PERIODIC) ||
- ((ulConfig & 0x0000ff00) == TIMER_CFG_B_CAP_COUNT) ||
- ((ulConfig & 0x0000ff00) == TIMER_CFG_B_CAP_TIME) ||
- ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PWM))));
-
- //
- // Disable the timers.
- //
- HWREG(ulBase + TIMER_O_CTL) &= ~(TIMER_CTL_TAEN | TIMER_CTL_TBEN);
-
- //
- // Set the global timer configuration.
- //
- HWREG(ulBase + TIMER_O_CFG) = ulConfig >> 24;
-
- //
- // Set the configuration of the A and B timers. Note that the B timer
- // configuration is ignored by the hardware in 32-bit modes.
- //
- HWREG(ulBase + TIMER_O_TAMR) = ulConfig & 255;
- HWREG(ulBase + TIMER_O_TBMR) = (ulConfig >> 8) & 255;
-}
-
-//*****************************************************************************
-//
-//! Controls the output level.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH.
-//! \param bInvert specifies the output level.
-//!
-//! This function sets the PWM output level for the specified timer. If the
-//! \e bInvert parameter is \b true, then the timer's output will be made
-//! active low; otherwise, it will be made active high.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerControlLevel(unsigned long ulBase, unsigned long ulTimer,
- tBoolean bInvert)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Set the output levels as requested.
- //
- ulTimer &= TIMER_CTL_TAPWML | TIMER_CTL_TBPWML;
- HWREG(ulBase + TIMER_O_CTL) = (bInvert ?
- (HWREG(ulBase + TIMER_O_CTL) | ulTimer) :
- (HWREG(ulBase + TIMER_O_CTL) & ~(ulTimer)));
-}
-
-//*****************************************************************************
-//
-//! Enables or disables the trigger output.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer to adjust; must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH.
-//! \param bEnable specifies the desired trigger state.
-//!
-//! This function controls the trigger output for the specified timer. If the
-//! \e bEnable parameter is \b true, then the timer's output trigger is
-//! enabled; otherwise it is disabled.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerControlTrigger(unsigned long ulBase, unsigned long ulTimer,
- tBoolean bEnable)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Set the trigger output as requested.
- //
- ulTimer &= TIMER_CTL_TAOTE | TIMER_CTL_TBOTE;
- HWREG(ulBase + TIMER_O_CTL) = (bEnable ?
- (HWREG(ulBase + TIMER_O_CTL) | ulTimer) :
- (HWREG(ulBase + TIMER_O_CTL) & ~(ulTimer)));
-}
-
-//*****************************************************************************
-//
-//! Controls the event type.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to be adjusted; must be one of
-//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
-//! \param ulEvent specifies the type of event; must be one of
-//! \b TIMER_EVENT_POS_EDGE, \b TIMER_EVENT_NEG_EDGE, or
-//! \b TIMER_EVENT_BOTH_EDGES.
-//!
-//! This function sets the signal edge(s) that will trigger the timer when in
-//! capture mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerControlEvent(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulEvent)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Set the event type.
- //
- ulEvent &= ulTimer & (TIMER_CTL_TAEVENT_M | TIMER_CTL_TBEVENT_M);
- HWREG(ulBase + TIMER_O_CTL) = ((HWREG(ulBase + TIMER_O_CTL) &
- ~(TIMER_CTL_TAEVENT_M |
- TIMER_CTL_TBEVENT_M)) | ulEvent);
-}
-
-//*****************************************************************************
-//
-//! Controls the stall handling.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to be adjusted; must be one of
-//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
-//! \param bStall specifies the response to a stall signal.
-//!
-//! This function controls the stall response for the specified timer. If the
-//! \e bStall parameter is \b true, then the timer will stop counting if the
-//! processor enters debug mode; otherwise the timer will keep running while in
-//! debug mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerControlStall(unsigned long ulBase, unsigned long ulTimer,
- tBoolean bStall)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Set the stall mode.
- //
- ulTimer &= TIMER_CTL_TASTALL | TIMER_CTL_TBSTALL;
- HWREG(ulBase + TIMER_O_CTL) = (bStall ?
- (HWREG(ulBase + TIMER_O_CTL) | ulTimer) :
- (HWREG(ulBase + TIMER_O_CTL) & ~(ulTimer)));
-}
-
-//*****************************************************************************
-//
-//! Enable RTC counting.
-//!
-//! \param ulBase is the base address of the timer module.
-//!
-//! This function causes the timer to start counting when in RTC mode. If not
-//! configured for RTC mode, this will do nothing.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerRTCEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
-
- //
- // Enable RTC counting.
- //
- HWREG(ulBase + TIMER_O_CTL) |= TIMER_CTL_RTCEN;
-}
-
-//*****************************************************************************
-//
-//! Disable RTC counting.
-//!
-//! \param ulBase is the base address of the timer module.
-//!
-//! This function causes the timer to stop counting when in RTC mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerRTCDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
-
- //
- // Disable RTC counting.
- //
- HWREG(ulBase + TIMER_O_CTL) &= ~(TIMER_CTL_RTCEN);
-}
-
-//*****************************************************************************
-//
-//! Set the timer prescale value.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH.
-//! \param ulValue is the timer prescale value; must be between 0 and 255,
-//! inclusive.
-//!
-//! This function sets the value of the input clock prescaler. The prescaler
-//! is only operational when in 16-bit mode and is used to extend the range of
-//! the 16-bit timer modes.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulValue)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
- ASSERT(ulValue < 256);
-
- //
- // Set the timer A prescaler if requested.
- //
- if(ulTimer & TIMER_A)
- {
- HWREG(ulBase + TIMER_O_TAPR) = ulValue;
- }
-
- //
- // Set the timer B prescaler if requested.
- //
- if(ulTimer & TIMER_B)
- {
- HWREG(ulBase + TIMER_O_TBPR) = ulValue;
- }
-}
-
-//*****************************************************************************
-//
-//! Get the timer prescale value.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer; must be one of \b TIMER_A or
-//! \b TIMER_B.
-//!
-//! This function gets the value of the input clock prescaler. The prescaler
-//! is only operational when in 16-bit mode and is used to extend the range of
-//! the 16-bit timer modes.
-//!
-//! \return The value of the timer prescaler.
-//
-//*****************************************************************************
-unsigned long
-TimerPrescaleGet(unsigned long ulBase, unsigned long ulTimer)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Return the appropriate prescale value.
- //
- return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAPR) :
- HWREG(ulBase + TIMER_O_TBPR));
-}
-
-//*****************************************************************************
-//
-//! Sets the timer load value.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used when the
-//! timer is configured for 32-bit operation.
-//! \param ulValue is the load value.
-//!
-//! This function sets the timer load value; if the timer is running then the
-//! value will be immediately loaded into the timer.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerLoadSet(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulValue)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Set the timer A load value if requested.
- //
- if(ulTimer & TIMER_A)
- {
- HWREG(ulBase + TIMER_O_TAILR) = ulValue;
- }
-
- //
- // Set the timer B load value if requested.
- //
- if(ulTimer & TIMER_B)
- {
- HWREG(ulBase + TIMER_O_TBILR) = ulValue;
- }
-}
-
-//*****************************************************************************
-//
-//! Gets the timer load value.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer; must be one of \b TIMER_A or
-//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured
-//! for 32-bit operation.
-//!
-//! This function gets the currently programmed interval load value for the
-//! specified timer.
-//!
-//! \return Returns the load value for the timer.
-//
-//*****************************************************************************
-unsigned long
-TimerLoadGet(unsigned long ulBase, unsigned long ulTimer)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B));
-
- //
- // Return the appropriate load value.
- //
- return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAILR) :
- HWREG(ulBase + TIMER_O_TBILR));
-}
-
-//*****************************************************************************
-//
-//! Gets the current timer value.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer; must be one of \b TIMER_A or
-//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured
-//! for 32-bit operation.
-//!
-//! This function reads the current value of the specified timer.
-//!
-//! \return Returns the current value of the timer.
-//
-//*****************************************************************************
-unsigned long
-TimerValueGet(unsigned long ulBase, unsigned long ulTimer)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B));
-
- //
- // Return the appropriate timer value.
- //
- return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAR) :
- HWREG(ulBase + TIMER_O_TBR));
-}
-
-//*****************************************************************************
-//
-//! Sets the timer match value.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used when the
-//! timer is configured for 32-bit operation.
-//! \param ulValue is the match value.
-//!
-//! This function sets the match value for a timer. This is used in capture
-//! count mode to determine when to interrupt the processor and in PWM mode to
-//! determine the duty cycle of the output signal.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerMatchSet(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulValue)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Set the timer A match value if requested.
- //
- if(ulTimer & TIMER_A)
- {
- HWREG(ulBase + TIMER_O_TAMATCHR) = ulValue;
- }
-
- //
- // Set the timer B match value if requested.
- //
- if(ulTimer & TIMER_B)
- {
- HWREG(ulBase + TIMER_O_TBMATCHR) = ulValue;
- }
-}
-
-//*****************************************************************************
-//
-//! Gets the timer match value.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer; must be one of \b TIMER_A or
-//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured
-//! for 32-bit operation.
-//!
-//! This function gets the match value for the specified timer.
-//!
-//! \return Returns the match value for the timer.
-//
-//*****************************************************************************
-unsigned long
-TimerMatchGet(unsigned long ulBase, unsigned long ulTimer)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B));
-
- //
- // Return the appropriate match value.
- //
- return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAMATCHR) :
- HWREG(ulBase + TIMER_O_TBMATCHR));
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the timer interrupt.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s); must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH.
-//! \param pfnHandler is a pointer to the function to be called when the timer
-//! interrupt occurs.
-//!
-//! This sets the handler to be called when a timer interrupt occurs. This
-//! will enable the global interrupt in the interrupt controller; specific
-//! timer interrupts must be enabled via TimerIntEnable(). It is the interrupt
-//! handler's responsibility to clear the interrupt source via TimerIntClear().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerIntRegister(unsigned long ulBase, unsigned long ulTimer,
- void (*pfnHandler)(void))
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Get the interrupt number for this timer module.
- //
- ulBase = ((ulBase == TIMER0_BASE) ? INT_TIMER0A :
- ((ulBase == TIMER1_BASE) ? INT_TIMER1A :
- ((ulBase == TIMER2_BASE) ? INT_TIMER2A : INT_TIMER3A)));
-
- //
- // Register an interrupt handler for timer A if requested.
- //
- if(ulTimer & TIMER_A)
- {
- //
- // Register the interrupt handler.
- //
- IntRegister(ulBase, pfnHandler);
-
- //
- // Enable the interrupt.
- //
- IntEnable(ulBase);
- }
-
- //
- // Register an interrupt handler for timer B if requested.
- //
- if(ulTimer & TIMER_B)
- {
- //
- // Register the interrupt handler.
- //
- IntRegister(ulBase + 1, pfnHandler);
-
- //
- // Enable the interrupt.
- //
- IntEnable(ulBase + 1);
- }
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the timer interrupt.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulTimer specifies the timer(s); must be one of \b TIMER_A,
-//! \b TIMER_B, or \b TIMER_BOTH.
-//!
-//! This function will clear the handler to be called when a timer interrupt
-//! occurs. This will also mask off the interrupt in the interrupt controller
-//! so that the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
- ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
- (ulTimer == TIMER_BOTH));
-
- //
- // Get the interrupt number for this timer module.
- //
- ulBase = ((ulBase == TIMER0_BASE) ? INT_TIMER0A :
- ((ulBase == TIMER1_BASE) ? INT_TIMER1A :
- ((ulBase == TIMER2_BASE) ? INT_TIMER2A : INT_TIMER3A)));
-
- //
- // Unregister the interrupt handler for timer A if requested.
- //
- if(ulTimer & TIMER_A)
- {
- //
- // Disable the interrupt.
- //
- IntDisable(ulBase);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(ulBase);
- }
-
- //
- // Unregister the interrupt handler for timer B if requested.
- //
- if(ulTimer & TIMER_B)
- {
- //
- // Disable the interrupt.
- //
- IntDisable(ulBase + 1);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(ulBase + 1);
- }
-}
-
-//*****************************************************************************
-//
-//! Enables individual timer interrupt sources.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! Enables the indicated timer interrupt sources. Only the sources that are
-//! enabled can be reflected to the processor interrupt; disabled sources have
-//! no effect on the processor.
-//!
-//! The \e ulIntFlags parameter must be the logical OR of any combination of
-//! the following:
-//!
-//! - \b TIMER_CAPB_EVENT - Capture B event interrupt
-//! - \b TIMER_CAPB_MATCH - Capture B match interrupt
-//! - \b TIMER_TIMB_TIMEOUT - Timer B timeout interrupt
-//! - \b TIMER_RTC_MATCH - RTC interrupt mask
-//! - \b TIMER_CAPA_EVENT - Capture A event interrupt
-//! - \b TIMER_CAPA_MATCH - Capture A match interrupt
-//! - \b TIMER_TIMA_TIMEOUT - Timer A timeout interrupt
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
-
- //
- // Enable the specified interrupts.
- //
- HWREG(ulBase + TIMER_O_IMR) |= ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables individual timer interrupt sources.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled.
-//!
-//! Disables the indicated timer interrupt sources. Only the sources that are
-//! enabled can be reflected to the processor interrupt; disabled sources have
-//! no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to TimerIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
-
- //
- // Disable the specified interrupts.
- //
- HWREG(ulBase + TIMER_O_IMR) &= ~(ulIntFlags);
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param bMasked is false if the raw interrupt status is required and true if
-//! the masked interrupt status is required.
-//!
-//! This returns the interrupt status for the timer module. Either the raw
-//! interrupt status or the status of interrupts that are allowed to reflect to
-//! the processor can be returned.
-//!
-//! \return The current interrupt status, enumerated as a bit field of
-//! values described in TimerIntEnable().
-//
-//*****************************************************************************
-unsigned long
-TimerIntStatus(unsigned long ulBase, tBoolean bMasked)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
-
- //
- // Return either the interrupt status or the raw interrupt status as
- // requested.
- //
- return(bMasked ? HWREG(ulBase + TIMER_O_MIS) :
- HWREG(ulBase + TIMER_O_RIS));
-}
-
-//*****************************************************************************
-//
-//! Clears timer interrupt sources.
-//!
-//! \param ulBase is the base address of the timer module.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified timer interrupt sources are cleared, so that they no longer
-//! assert. This must be done in the interrupt handler to keep it from being
-//! called again immediately upon exit.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to TimerIntEnable().
-//!
-//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
-//! several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared. Failure to do so may result in the interrupt handler
-//! being immediately reentered (since NVIC still sees the interrupt source
-//! asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
-
- //
- // Clear the requested interrupt sources.
- //
- HWREG(ulBase + TIMER_O_ICR) = ulIntFlags;
-}
-
-//*****************************************************************************
-//
-// Puts the timer into its reset state.
-//
-// \param ulBase is the base address of the timer module.
-//
-// The specified timer is disabled, and all its interrupts are disabled,
-// cleared, and unregistered. Then the timer registers are set to their reset
-// value.
-//
-// \return None.
-//
-//*****************************************************************************
-#ifndef DEPRECATED
-void
-TimerQuiesce(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(TimerBaseValid(ulBase));
-
- //
- // Disable the timer.
- //
- HWREG(ulBase + TIMER_O_CTL) = TIMER_RV_CTL;
-
- //
- // Disable all the timer interrupts.
- //
- HWREG(ulBase + TIMER_O_IMR) = TIMER_RV_IMR;
-
- //
- // Clear all the timer interrupts.
- //
- HWREG(ulBase + TIMER_O_ICR) = 0xFFFFFFFF;
-
- //
- // Unregister the interrupt handler. This also disables interrupts to the
- // core.
- //
- TimerIntUnregister(ulBase, TIMER_BOTH);
-
- //
- // Set all the registers to their reset value.
- //
- HWREG(ulBase + TIMER_O_CFG) = TIMER_RV_CFG;
- HWREG(ulBase + TIMER_O_TAMR) = TIMER_RV_TAMR;
- HWREG(ulBase + TIMER_O_TBMR) = TIMER_RV_TBMR;
- HWREG(ulBase + TIMER_O_RIS) = TIMER_RV_RIS;
- HWREG(ulBase + TIMER_O_MIS) = TIMER_RV_MIS;
- HWREG(ulBase + TIMER_O_TAILR) = TIMER_RV_TAILR;
- HWREG(ulBase + TIMER_O_TBILR) = TIMER_RV_TBILR;
- HWREG(ulBase + TIMER_O_TAMATCHR) = TIMER_RV_TAMATCHR;
- HWREG(ulBase + TIMER_O_TBMATCHR) = TIMER_RV_TBMATCHR;
- HWREG(ulBase + TIMER_O_TAPR) = TIMER_RV_TAPR;
- HWREG(ulBase + TIMER_O_TBPR) = TIMER_RV_TBPR;
- HWREG(ulBase + TIMER_O_TAPMR) = TIMER_RV_TAPMR;
- HWREG(ulBase + TIMER_O_TBPMR) = TIMER_RV_TBPMR;
- HWREG(ulBase + TIMER_O_TAR) = TIMER_RV_TAR;
- HWREG(ulBase + TIMER_O_TBR) = TIMER_RV_TBR;
-}
-#endif // DEPRECATED
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/timer.h b/bsp/lm3s/driverlib/timer.h
deleted file mode 100644
index 978f5344db68dc93d4704a72693ac857bf90b609..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/timer.h
+++ /dev/null
@@ -1,153 +0,0 @@
-//*****************************************************************************
-//
-// timer.h - Prototypes for the timer module
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __TIMER_H__
-#define __TIMER_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Values that can be passed to TimerConfigure as the ulConfig parameter.
-//
-//*****************************************************************************
-#define TIMER_CFG_32_BIT_OS 0x00000001 // 32-bit one-shot timer
-#define TIMER_CFG_32_BIT_PER 0x00000002 // 32-bit periodic timer
-#define TIMER_CFG_32_RTC 0x01000000 // 32-bit RTC timer
-#define TIMER_CFG_16_BIT_PAIR 0x04000000 // Two 16-bit timers
-#define TIMER_CFG_A_ONE_SHOT 0x00000001 // Timer A one-shot timer
-#define TIMER_CFG_A_PERIODIC 0x00000002 // Timer A periodic timer
-#define TIMER_CFG_A_CAP_COUNT 0x00000003 // Timer A event counter
-#define TIMER_CFG_A_CAP_TIME 0x00000007 // Timer A event timer
-#define TIMER_CFG_A_PWM 0x0000000A // Timer A PWM output
-#define TIMER_CFG_B_ONE_SHOT 0x00000100 // Timer B one-shot timer
-#define TIMER_CFG_B_PERIODIC 0x00000200 // Timer B periodic timer
-#define TIMER_CFG_B_CAP_COUNT 0x00000300 // Timer B event counter
-#define TIMER_CFG_B_CAP_TIME 0x00000700 // Timer B event timer
-#define TIMER_CFG_B_PWM 0x00000A00 // Timer B PWM output
-
-//*****************************************************************************
-//
-// Values that can be passed to TimerIntEnable, TimerIntDisable, and
-// TimerIntClear as the ulIntFlags parameter, and returned from TimerIntStatus.
-//
-//*****************************************************************************
-#define TIMER_CAPB_EVENT 0x00000400 // CaptureB event interrupt
-#define TIMER_CAPB_MATCH 0x00000200 // CaptureB match interrupt
-#define TIMER_TIMB_TIMEOUT 0x00000100 // TimerB time out interrupt
-#define TIMER_RTC_MATCH 0x00000008 // RTC interrupt mask
-#define TIMER_CAPA_EVENT 0x00000004 // CaptureA event interrupt
-#define TIMER_CAPA_MATCH 0x00000002 // CaptureA match interrupt
-#define TIMER_TIMA_TIMEOUT 0x00000001 // TimerA time out interrupt
-
-//*****************************************************************************
-//
-// Values that can be passed to TimerControlEvent as the ulEvent parameter.
-//
-//*****************************************************************************
-#define TIMER_EVENT_POS_EDGE 0x00000000 // Count positive edges
-#define TIMER_EVENT_NEG_EDGE 0x00000404 // Count negative edges
-#define TIMER_EVENT_BOTH_EDGES 0x00000C0C // Count both edges
-
-//*****************************************************************************
-//
-// Values that can be passed to most of the timer APIs as the ulTimer
-// parameter.
-//
-//*****************************************************************************
-#define TIMER_A 0x000000ff // Timer A
-#define TIMER_B 0x0000ff00 // Timer B
-#define TIMER_BOTH 0x0000ffff // Timer Both
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern void TimerEnable(unsigned long ulBase, unsigned long ulTimer);
-extern void TimerDisable(unsigned long ulBase, unsigned long ulTimer);
-extern void TimerConfigure(unsigned long ulBase, unsigned long ulConfig);
-extern void TimerControlLevel(unsigned long ulBase, unsigned long ulTimer,
- tBoolean bInvert);
-extern void TimerControlTrigger(unsigned long ulBase, unsigned long ulTimer,
- tBoolean bEnable);
-extern void TimerControlEvent(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulEvent);
-extern void TimerControlStall(unsigned long ulBase, unsigned long ulTimer,
- tBoolean bStall);
-extern void TimerRTCEnable(unsigned long ulBase);
-extern void TimerRTCDisable(unsigned long ulBase);
-extern void TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulValue);
-extern unsigned long TimerPrescaleGet(unsigned long ulBase,
- unsigned long ulTimer);
-extern void TimerLoadSet(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulValue);
-extern unsigned long TimerLoadGet(unsigned long ulBase, unsigned long ulTimer);
-extern unsigned long TimerValueGet(unsigned long ulBase,
- unsigned long ulTimer);
-extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer,
- unsigned long ulValue);
-extern unsigned long TimerMatchGet(unsigned long ulBase,
- unsigned long ulTimer);
-extern void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer,
- void (*pfnHandler)(void));
-extern void TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer);
-extern void TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
-extern unsigned long TimerIntStatus(unsigned long ulBase, tBoolean bMasked);
-extern void TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags);
-
-//*****************************************************************************
-//
-// TimerQuiesce() has been deprecated. SysCtlPeripheralReset() should be used
-// instead to return the timer to its reset state.
-//
-//*****************************************************************************
-#ifndef DEPRECATED
-extern void TimerQuiesce(unsigned long ulBase);
-#endif
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __TIMER_H__
diff --git a/bsp/lm3s/driverlib/uart.c b/bsp/lm3s/driverlib/uart.c
deleted file mode 100644
index 648e6abeadba9acc11f514d0988f713c70e7d574..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/uart.c
+++ /dev/null
@@ -1,1621 +0,0 @@
-//*****************************************************************************
-//
-// uart.c - Driver for the UART.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup uart_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_sysctl.h"
-#include "inc/hw_types.h"
-#include "inc/hw_uart.h"
-#include "driverlib/debug.h"
-#include "driverlib/interrupt.h"
-#include "driverlib/uart.h"
-
-//*****************************************************************************
-//
-// The system clock divider defining the maximum baud rate supported by the
-// UART.
-//
-//*****************************************************************************
-#define UART_CLK_DIVIDER ((CLASS_IS_SANDSTORM || \
- (CLASS_IS_FURY && REVISION_IS_A2) || \
- (CLASS_IS_DUSTDEVIL && REVISION_IS_A0)) ? \
- 16 : 8)
-
-//*****************************************************************************
-//
-//! \internal
-//! Checks a UART base address.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function determines if a UART port base address is valid.
-//!
-//! \return Returns \b true if the base address is valid and \b false
-//! otherwise.
-//
-//*****************************************************************************
-#ifdef DEBUG
-static tBoolean
-UARTBaseValid(unsigned long ulBase)
-{
- return((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
- (ulBase == UART2_BASE));
-}
-#endif
-
-//*****************************************************************************
-//
-//! Sets the type of parity.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulParity specifies the type of parity to use.
-//!
-//! Sets the type of parity to use for transmitting and expect when receiving.
-//! The \e ulParity parameter must be one of \b UART_CONFIG_PAR_NONE,
-//! \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD, \b UART_CONFIG_PAR_ONE,
-//! or \b UART_CONFIG_PAR_ZERO. The last two allow direct control of the
-//! parity bit; it will always be either be one or zero based on the mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTParityModeSet(unsigned long ulBase, unsigned long ulParity)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
- ASSERT((ulParity == UART_CONFIG_PAR_NONE) ||
- (ulParity == UART_CONFIG_PAR_EVEN) ||
- (ulParity == UART_CONFIG_PAR_ODD) ||
- (ulParity == UART_CONFIG_PAR_ONE) ||
- (ulParity == UART_CONFIG_PAR_ZERO));
-
- //
- // Set the parity mode.
- //
- HWREG(ulBase + UART_O_LCRH) = ((HWREG(ulBase + UART_O_LCRH) &
- ~(UART_LCRH_SPS | UART_LCRH_EPS |
- UART_LCRH_PEN)) | ulParity);
-}
-
-//*****************************************************************************
-//
-//! Gets the type of parity currently being used.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function gets the type of parity used for transmitting data, and
-//! expected when receiving data.
-//!
-//! \return Returns the current parity settings, specified as one of
-//! \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD,
-//! \b UART_CONFIG_PAR_ONE, or \b UART_CONFIG_PAR_ZERO.
-//
-//*****************************************************************************
-unsigned long
-UARTParityModeGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Return the current parity setting.
- //
- return(HWREG(ulBase + UART_O_LCRH) &
- (UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN));
-}
-
-//*****************************************************************************
-//
-//! Sets the FIFO level at which interrupts are generated.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulTxLevel is the transmit FIFO interrupt level, specified as one of
-//! \b UART_FIFO_TX1_8, \b UART_FIFO_TX2_8, \b UART_FIFO_TX4_8,
-//! \b UART_FIFO_TX6_8, or \b UART_FIFO_TX7_8.
-//! \param ulRxLevel is the receive FIFO interrupt level, specified as one of
-//! \b UART_FIFO_RX1_8, \b UART_FIFO_RX2_8, \b UART_FIFO_RX4_8,
-//! \b UART_FIFO_RX6_8, or \b UART_FIFO_RX7_8.
-//!
-//! This function sets the FIFO level at which transmit and receive interrupts
-//! will be generated.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel,
- unsigned long ulRxLevel)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
- ASSERT((ulTxLevel == UART_FIFO_TX1_8) ||
- (ulTxLevel == UART_FIFO_TX2_8) ||
- (ulTxLevel == UART_FIFO_TX4_8) ||
- (ulTxLevel == UART_FIFO_TX6_8) ||
- (ulTxLevel == UART_FIFO_TX7_8));
- ASSERT((ulRxLevel == UART_FIFO_RX1_8) ||
- (ulRxLevel == UART_FIFO_RX2_8) ||
- (ulRxLevel == UART_FIFO_RX4_8) ||
- (ulRxLevel == UART_FIFO_RX6_8) ||
- (ulRxLevel == UART_FIFO_RX7_8));
-
- //
- // Set the FIFO interrupt levels.
- //
- HWREG(ulBase + UART_O_IFLS) = ulTxLevel | ulRxLevel;
-}
-
-//*****************************************************************************
-//
-//! Gets the FIFO level at which interrupts are generated.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param pulTxLevel is a pointer to storage for the transmit FIFO level,
-//! returned as one of \b UART_FIFO_TX1_8, \b UART_FIFO_TX2_8,
-//! \b UART_FIFO_TX4_8, \b UART_FIFO_TX6_8, or UART_FIFO_TX7_8.
-//! \param pulRxLevel is a pointer to storage for the receive FIFO level,
-//! returned as one of \b UART_FIFO_RX1_8, \b UART_FIFO_RX2_8,
-//! \b UART_FIFO_RX4_8, \b UART_FIFO_RX6_8, or \b UART_FIFO_RX7_8.
-//!
-//! This function gets the FIFO level at which transmit and receive interrupts
-//! will be generated.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel,
- unsigned long *pulRxLevel)
-{
- unsigned long ulTemp;
-
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Read the FIFO level register.
- //
- ulTemp = HWREG(ulBase + UART_O_IFLS);
-
- //
- // Extract the transmit and receive FIFO levels.
- //
- *pulTxLevel = ulTemp & UART_IFLS_TX_M;
- *pulRxLevel = ulTemp & UART_IFLS_RX_M;
-}
-
-//*****************************************************************************
-//
-//! Sets the configuration of a UART.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulUARTClk is the rate of the clock supplied to the UART module.
-//! \param ulBaud is the desired baud rate.
-//! \param ulConfig is the data format for the port (number of data bits,
-//! number of stop bits, and parity).
-//!
-//! This function will configure the UART for operation in the specified data
-//! format. The baud rate is provided in the \e ulBaud parameter and the data
-//! format in the \e ulConfig parameter.
-//!
-//! The \e ulConfig parameter is the logical OR of three values: the number of
-//! data bits, the number of stop bits, and the parity. \b UART_CONFIG_WLEN_8,
-//! \b UART_CONFIG_WLEN_7, \b UART_CONFIG_WLEN_6, and \b UART_CONFIG_WLEN_5
-//! select from eight to five data bits per byte (respectively).
-//! \b UART_CONFIG_STOP_ONE and \b UART_CONFIG_STOP_TWO select one or two stop
-//! bits (respectively). \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN,
-//! \b UART_CONFIG_PAR_ODD, \b UART_CONFIG_PAR_ONE, and \b UART_CONFIG_PAR_ZERO
-//! select the parity mode (no parity bit, even parity bit, odd parity bit,
-//! parity bit always one, and parity bit always zero, respectively).
-//!
-//! The peripheral clock will be the same as the processor clock. This will be
-//! the value returned by SysCtlClockGet(), or it can be explicitly hard coded
-//! if it is constant and known (to save the code/execution overhead of a call
-//! to SysCtlClockGet()).
-//!
-//! This function replaces the original UARTConfigSet() API and performs the
-//! same actions. A macro is provided in uart.h to map the original
-//! API to this API.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
- unsigned long ulBaud, unsigned long ulConfig)
-{
- unsigned long ulDiv;
-
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
- ASSERT(ulBaud != 0);
- ASSERT(ulUARTClk >= (ulBaud * UART_CLK_DIVIDER));
-
- //
- // Stop the UART.
- //
- UARTDisable(ulBase);
-
- //
- // Is the required baud rate greater than the maximum rate supported
- // without the use of high speed mode?
- //
- if((ulBaud * 16) > ulUARTClk)
- {
- //
- // Enable high speed mode.
- //
- HWREG(ulBase + UART_O_CTL) |= UART_CTL_HSE;
-
- //
- // Half the supplied baud rate to compensate for enabling high speed
- // mode. This allows the following code to be common to both cases.
- //
- ulBaud /= 2;
- }
- else
- {
- //
- // Disable high speed mode.
- //
- HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_HSE);
- }
-
- //
- // Compute the fractional baud rate divider.
- //
- ulDiv = (((ulUARTClk * 8) / ulBaud) + 1) / 2;
-
- //
- // Set the baud rate.
- //
- HWREG(ulBase + UART_O_IBRD) = ulDiv / 64;
- HWREG(ulBase + UART_O_FBRD) = ulDiv % 64;
-
- //
- // Set parity, data length, and number of stop bits.
- //
- HWREG(ulBase + UART_O_LCRH) = ulConfig;
-
- //
- // Clear the flags register.
- //
- HWREG(ulBase + UART_O_FR) = 0;
-
- //
- // Start the UART.
- //
- UARTEnable(ulBase);
-}
-
-//*****************************************************************************
-//
-//! Gets the current configuration of a UART.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulUARTClk is the rate of the clock supplied to the UART module.
-//! \param pulBaud is a pointer to storage for the baud rate.
-//! \param pulConfig is a pointer to storage for the data format.
-//!
-//! The baud rate and data format for the UART is determined, given an
-//! explicitly provided peripheral clock (hence the ExpClk suffix). The
-//! returned baud rate is the actual baud rate; it may not be the exact baud
-//! rate requested or an ``official'' baud rate. The data format returned in
-//! \e pulConfig is enumerated the same as the \e ulConfig parameter of
-//! UARTConfigSetExpClk().
-//!
-//! The peripheral clock will be the same as the processor clock. This will be
-//! the value returned by SysCtlClockGet(), or it can be explicitly hard coded
-//! if it is constant and known (to save the code/execution overhead of a call
-//! to SysCtlClockGet()).
-//!
-//! This function replaces the original UARTConfigGet() API and performs the
-//! same actions. A macro is provided in uart.h to map the original
-//! API to this API.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
- unsigned long *pulBaud, unsigned long *pulConfig)
-{
- unsigned long ulInt, ulFrac;
-
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Compute the baud rate.
- //
- ulInt = HWREG(ulBase + UART_O_IBRD);
- ulFrac = HWREG(ulBase + UART_O_FBRD);
- *pulBaud = (ulUARTClk * 4) / ((64 * ulInt) + ulFrac);
-
- //
- // See if high speed mode enabled.
- //
- if(HWREG(ulBase + UART_O_CTL) & UART_CTL_HSE)
- {
- //
- // High speed mode is enabled so the actual baud rate is actually
- // double what was just calculated.
- //
- *pulBaud *= 2;
- }
-
- //
- // Get the parity, data length, and number of stop bits.
- //
- *pulConfig = (HWREG(ulBase + UART_O_LCRH) &
- (UART_LCRH_SPS | UART_LCRH_WLEN_M | UART_LCRH_STP2 |
- UART_LCRH_EPS | UART_LCRH_PEN));
-}
-
-//*****************************************************************************
-//
-//! Enables transmitting and receiving.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Sets the UARTEN, TXE, and RXE bits, and enables the transmit and receive
-//! FIFOs.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Enable the FIFO.
- //
- HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN;
-
- //
- // Enable RX, TX, and the UART.
- //
- HWREG(ulBase + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |
- UART_CTL_RXE);
-}
-
-//*****************************************************************************
-//
-//! Disables transmitting and receiving.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Clears the UARTEN, TXE, and RXE bits, then waits for the end of
-//! transmission of the current character, and flushes the transmit FIFO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Wait for end of TX.
- //
- while(HWREG(ulBase + UART_O_FR) & UART_FR_BUSY)
- {
- }
-
- //
- // Disable the FIFO.
- //
- HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN);
-
- //
- // Disable the UART.
- //
- HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE |
- UART_CTL_RXE);
-}
-
-//*****************************************************************************
-//
-//! Enables the transmit and receive FIFOs.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This functions enables the transmit and receive FIFOs in the UART.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTFIFOEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Enable the FIFO.
- //
- HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN;
-}
-
-//*****************************************************************************
-//
-//! Disables the transmit and receive FIFOs.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This functions disables the transmit and receive FIFOs in the UART.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTFIFODisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Disable the FIFO.
- //
- HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN);
-}
-
-//*****************************************************************************
-//
-//! Enables SIR (IrDA) mode on the specified UART.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param bLowPower indicates if SIR Low Power Mode is to be used.
-//!
-//! Enables the SIREN control bit for IrDA mode on the UART. If the
-//! \e bLowPower flag is set, then SIRLP bit will also be set.
-//!
-//! \note SIR (IrDA) operation is not supported on Sandstorm-class devices.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTEnableSIR(unsigned long ulBase, tBoolean bLowPower)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Enable SIR and SIRLP (if appropriate).
- //
- if(bLowPower)
- {
- HWREG(ulBase + UART_O_CTL) |= (UART_CTL_SIREN | UART_CTL_SIRLP);
- }
- else
- {
- HWREG(ulBase + UART_O_CTL) |= (UART_CTL_SIREN);
- }
-}
-
-//*****************************************************************************
-//
-//! Disables SIR (IrDA) mode on the specified UART.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Clears the SIREN (IrDA) and SIRLP (Low Power) bits.
-//!
-//! \note SIR (IrDA) operation is not supported on Sandstorm-class devices.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTDisableSIR(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Disable SIR and SIRLP (if appropriate).
- //
- HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_SIREN | UART_CTL_SIRLP);
-}
-
-//*****************************************************************************
-//
-//! Enables ISO 7816 smart card mode on the specified UART.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Enables the SMART control bit for ISO 7816 smart card mode on the UART.
-//! This call also sets 8 bit word length and even parity as required by ISO
-//! 7816.
-//!
-//! \note The availability of ISO 7816 smart card mode varies with the
-//! Stellaris part and UART in use. Please consult the datasheet for the part
-//! you are using to determine whether this support is available.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTSmartCardEnable(unsigned long ulBase)
-{
- unsigned long ulVal;
-
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
- (ulBase == UART2_BASE));
-
- //
- // Set 8 bit word length, even parity, 2 stop bits (even though the STP2
- // bit is ignored when in smartcard mode, this lets the caller read back
- // the actual setting in use).
- //
- ulVal = HWREG(ulBase + UART_O_LCRH);
- ulVal &= ~(UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN |
- UART_LCRH_WLEN_M);
- ulVal |= UART_LCRH_WLEN_8 | UART_LCRH_PEN | UART_LCRH_EPS | UART_LCRH_STP2;
- HWREG(ulBase + UART_O_LCRH) = ulVal;
-
- //
- // Enable SMART mode.
- //
- HWREG(ulBase + UART_O_CTL) |= UART_CTL_SMART;
-}
-
-//*****************************************************************************
-//
-//! Disables ISO 7816 smart card mode on the specified UART.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Clears the SMART (ISO 7816 smart card) bits in the UART control register.
-//!
-//! \note The availability of ISO 7816 smart card mode varies with the
-//! Stellaris part and UART in use. Please consult the datasheet for the part
-//! you are using to determine whether this support is available.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTSmartCardDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
- (ulBase == UART2_BASE));
-
- //
- // Disable the SMART bit.
- //
- HWREG(ulBase + UART_O_CTL) &= ~UART_CTL_SMART;
-}
-
-//*****************************************************************************
-//
-//! Sets the states of the DTR and/or RTS modem control signals.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulControl is a bit-mapped flag indicating which modem control bits
-//! should be set.
-//!
-//! Sets the states of the DTR or RTS modem handshake outputs from the UART.
-//!
-//! The \e ulControl parameter is the logical OR of any of the following:
-//!
-//! - \b UART_OUTPUT_DTR - The Modem Control DTR signal
-//! - \b UART_OUTPUT_RTS - The Modem Control RTS signal
-//!
-//! \note The availability of hardware modem handshake signals varies with the
-//! Stellaris part and UART in use. Please consult the datasheet for the part
-//! you are using to determine whether this support is available.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTModemControlSet(unsigned long ulBase, unsigned long ulControl)
-{
- unsigned long ulTemp;
-
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT(ulBase == UART1_BASE);
- ASSERT((ulControl & ~(UART_OUTPUT_RTS | UART_OUTPUT_DTR)) == 0);
-
- //
- // Set the appropriate modem control output bits.
- //
- ulTemp = HWREG(ulBase + UART_O_CTL);
- ulTemp |= (ulControl & (UART_OUTPUT_RTS | UART_OUTPUT_DTR));
- HWREG(ulBase + UART_O_CTL) = ulTemp;
-}
-
-//*****************************************************************************
-//
-//! Clears the states of the DTR and/or RTS modem control signals.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulControl is a bit-mapped flag indicating which modem control bits
-//! should be set.
-//!
-//! Clears the states of the DTR or RTS modem handshake outputs from the UART.
-//!
-//! The \e ulControl parameter is the logical OR of any of the following:
-//!
-//! - \b UART_OUTPUT_DTR - The Modem Control DTR signal
-//! - \b UART_OUTPUT_RTS - The Modem Control RTS signal
-//!
-//! \note The availability of hardware modem handshake signals varies with the
-//! Stellaris part and UART in use. Please consult the datasheet for the part
-//! you are using to determine whether this support is available.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTModemControlClear(unsigned long ulBase, unsigned long ulControl)
-{
- unsigned long ulTemp;
-
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT(ulBase == UART1_BASE);
- ASSERT((ulControl & ~(UART_OUTPUT_RTS | UART_OUTPUT_DTR)) == 0);
-
- //
- // Set the appropriate modem control output bits.
- //
- ulTemp = HWREG(ulBase + UART_O_CTL);
- ulTemp &= ~(ulControl & (UART_OUTPUT_RTS | UART_OUTPUT_DTR));
- HWREG(ulBase + UART_O_CTL) = ulTemp;
-}
-
-//*****************************************************************************
-//
-//! Gets the states of the DTR and RTS modem control signals.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Returns the current states of each of the two UART modem control signals,
-//! DTR and RTS.
-//!
-//! \note The availability of hardware modem handshake signals varies with the
-//! Stellaris part and UART in use. Please consult the datasheet for the part
-//! you are using to determine whether this support is available.
-//!
-//! \return Returns the states of the handshake output signals. This will be a
-//! logical logical OR combination of values \b UART_OUTPUT_RTS and
-//! \b UART_OUTPUT_DTR where the presence of each flag indicates that the
-//! associated signal is asserted.
-//
-//*****************************************************************************
-unsigned long
-UARTModemControlGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT(ulBase == UART1_BASE);
-
- return(HWREG(ulBase + UART_O_CTL) & (UART_OUTPUT_RTS | UART_OUTPUT_DTR));
-}
-
-//*****************************************************************************
-//
-//! Gets the states of the RI, DCD, DSR and CTS modem status signals.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Returns the current states of each of the four UART modem status signals,
-//! RI, DCD, DSR and CTS.
-//!
-//! \note The availability of hardware modem handshake signals varies with the
-//! Stellaris part and UART in use. Please consult the datasheet for the part
-//! you are using to determine whether this support is available.
-//!
-//! \return Returns the states of the handshake output signals. This will be a
-//! logical logical OR combination of values \b UART_INPUT_RI, \b
-//! UART_INPUT_DCD, \b UART_INPUT_CTS and \b UART_INPUT_DSR where the
-//! presence of each flag indicates that the associated signal is asserted.
-//
-//*****************************************************************************
-unsigned long
-UARTModemStatusGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT(ulBase == UART1_BASE);
-
- return(HWREG(ulBase + UART_O_FR) & (UART_INPUT_RI | UART_INPUT_DCD |
- UART_INPUT_CTS | UART_INPUT_DSR));
-}
-
-//*****************************************************************************
-//
-//! Sets the UART hardware flow control mode to be used.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulMode indicates the flow control modes to be used. This is a
-//! logical OR combination of values \b UART_FLOWCONTROL_TX and \b
-//! UART_FLOWCONTROL_RX to enable hardware transmit (CTS) and receive (RTS)
-//! flow control or \b UART_FLOWCONTROL_NONE to disable hardware flow control.
-//!
-//! Sets the required hardware flow control modes. If \e ulMode contains
-//! flag \b UART_FLOWCONTROL_TX, data is only transmitted if the incoming CTS
-//! signal is asserted. If \e ulMode contains flag \b UART_FLOWCONTROL_RX,
-//! the RTS output is controlled by the hardware and is asserted only when
-//! there is space available in the receive FIFO. If no hardware flow control
-//! is required, UART_FLOWCONTROL_NONE should be passed.
-//!
-//! \note The availability of hardware flow control varies with the Stellaris
-//! part and UART in use. Please consult the datasheet for the part you are
-//! using to determine whether this support is available.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode)
-{
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
- (ulBase == UART2_BASE));
- ASSERT((ulMode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0);
-
- //
- // Set the flow control mode as requested.
- //
- HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) &
- ~(UART_FLOWCONTROL_TX |
- UART_FLOWCONTROL_RX)) | ulMode);
-}
-
-//*****************************************************************************
-//
-//! Returns the UART hardware flow control mode currently in use.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Returns the current hardware flow control mode.
-//!
-//! \note The availability of hardware flow control varies with the Stellaris
-//! part and UART in use. Please consult the datasheet for the part you are
-//! using to determine whether this support is available.
-//!
-//! \return Returns the current flow control mode in use. This is a
-//! logical OR combination of values \b UART_FLOWCONTROL_TX if transmit
-//! (CTS) flow control is enabled and \b UART_FLOWCONTROL_RX if receive (RTS)
-//! flow control is in use. If hardware flow control is disabled, \b
-//! UART_FLOWCONTROL_NONE will be returned.
-//
-//*****************************************************************************
-unsigned long
-UARTFlowControlGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(!CLASS_IS_SANDSTORM && !CLASS_IS_FURY && !CLASS_IS_DUSTDEVIL);
- ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
- (ulBase == UART2_BASE));
-
- return(HWREG(ulBase + UART_O_CTL) & (UART_FLOWCONTROL_TX |
- UART_FLOWCONTROL_RX));
-}
-
-//*****************************************************************************
-//
-//! Sets the operating mode for the UART transmit interrupt.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulMode is the operating mode for the transmit interrupt. It may be
-//! \b UART_TXINT_MODE_EOT to trigger interrupts when the transmitter is idle
-//! or \b UART_TXINT_MODE_FIFO to trigger based on the current transmit FIFO
-//! level.
-//!
-//! This function allows the mode of the UART transmit interrupt to be set. By
-//! default, the transmit interrupt is asserted when the FIFO level falls past
-//! a threshold set via a call to UARTFIFOLevelSet(). Alternatively, if this
-//! function is called with \e ulMode set to \b UART_TXINT_MODE_EOT, the
-//! transmit interrupt will only be asserted once the transmitter is completely
-//! idle - the transmit FIFO is empty and all bits, including any stop bits,
-//! have cleared the transmitter.
-//!
-//! \note The availability of end-of-transmission mode varies with the
-//! Stellaris part in use. Please consult the datasheet for the part you are
-//! using to determine whether this support is available.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
- (ulBase == UART2_BASE));
- ASSERT((ulMode == UART_TXINT_MODE_EOT) ||
- (ulMode == UART_TXINT_MODE_FIFO));
-
- //
- // Set or clear the EOT bit of the UART control register as appropriate.
- //
- HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) &
- ~(UART_TXINT_MODE_EOT |
- UART_TXINT_MODE_FIFO)) | ulMode);
-}
-
-//*****************************************************************************
-//
-//! Returns the current operating mode for the UART transmit interrupt.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function returns the current operating mode for the UART transmit
-//! interrupt. The return value will be \b UART_TXINT_MODE_EOT if the
-//! transmit interrupt is currently set to be asserted once the transmitter is
-//! completely idle - the transmit FIFO is empty and all bits, including any
-//! stop bits, have cleared the transmitter. The return value will be \b
-//! UART_TXINT_MODE_FIFO if the interrupt is set to be asserted based upon the
-//! level of the transmit FIFO.
-//!
-//! \note The availability of end-of-transmission mode varies with the
-//! Stellaris part in use. Please consult the datasheet for the part you are
-//! using to determine whether this support is available.
-//!
-//! \return Returns \b UART_TXINT_MODE_FIFO or \b UART_TXINT_MODE_EOT.
-//
-//*****************************************************************************
-unsigned long
-UARTTxIntModeGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
- (ulBase == UART2_BASE));
-
- //
- // Return the current transmit interrupt mode.
- //
- return(HWREG(ulBase + UART_O_CTL) & (UART_TXINT_MODE_EOT |
- UART_TXINT_MODE_FIFO));
-}
-
-//*****************************************************************************
-//
-//! Determines if there are any characters in the receive FIFO.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function returns a flag indicating whether or not there is data
-//! available in the receive FIFO.
-//!
-//! \return Returns \b true if there is data in the receive FIFO, and \b false
-//! if there is no data in the receive FIFO.
-//
-//*****************************************************************************
-tBoolean
-UARTCharsAvail(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Return the availability of characters.
- //
- return((HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) ? false : true);
-}
-
-//*****************************************************************************
-//
-//! Determines if there is any space in the transmit FIFO.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function returns a flag indicating whether or not there is space
-//! available in the transmit FIFO.
-//!
-//! \return Returns \b true if there is space available in the transmit FIFO,
-//! and \b false if there is no space available in the transmit FIFO.
-//
-//*****************************************************************************
-tBoolean
-UARTSpaceAvail(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Return the availability of space.
- //
- return((HWREG(ulBase + UART_O_FR) & UART_FR_TXFF) ? false : true);
-}
-
-//*****************************************************************************
-//
-//! Receives a character from the specified port.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Gets a character from the receive FIFO for the specified port.
-//!
-//! This function replaces the original UARTCharNonBlockingGet() API and
-//! performs the same actions. A macro is provided in uart.h to map
-//! the original API to this API.
-//!
-//! \return Returns the character read from the specified port, cast as a
-//! \e long. A \b -1 will be returned if there are no characters present in
-//! the receive FIFO. The UARTCharsAvail() function should be called before
-//! attempting to call this function.
-//
-//*****************************************************************************
-long
-UARTCharGetNonBlocking(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // See if there are any characters in the receive FIFO.
- //
- if(!(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE))
- {
- //
- // Read and return the next character.
- //
- return(HWREG(ulBase + UART_O_DR));
- }
- else
- {
- //
- // There are no characters, so return a failure.
- //
- return(-1);
- }
-}
-
-//*****************************************************************************
-//
-//! Waits for a character from the specified port.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Gets a character from the receive FIFO for the specified port. If there
-//! are no characters available, this function will wait until a character is
-//! received before returning.
-//!
-//! \return Returns the character read from the specified port, cast as an
-//! \e long.
-//
-//*****************************************************************************
-long
-UARTCharGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Wait until a char is available.
- //
- while(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE)
- {
- }
-
- //
- // Now get the char.
- //
- return(HWREG(ulBase + UART_O_DR));
-}
-
-//*****************************************************************************
-//
-//! Sends a character to the specified port.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ucData is the character to be transmitted.
-//!
-//! Writes the character \e ucData to the transmit FIFO for the specified port.
-//! This function does not block, so if there is no space available, then a
-//! \b false is returned, and the application will have to retry the function
-//! later.
-//!
-//! This function replaces the original UARTCharNonBlockingPut() API and
-//! performs the same actions. A macro is provided in uart.h to map
-//! the original API to this API.
-//!
-//! \return Returns \b true if the character was successfully placed in the
-//! transmit FIFO, and \b false if there was no space available in the transmit
-//! FIFO.
-//
-//*****************************************************************************
-tBoolean
-UARTCharPutNonBlocking(unsigned long ulBase, unsigned char ucData)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // See if there is space in the transmit FIFO.
- //
- if(!(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF))
- {
- //
- // Write this character to the transmit FIFO.
- //
- HWREG(ulBase + UART_O_DR) = ucData;
-
- //
- // Success.
- //
- return(true);
- }
- else
- {
- //
- // There is no space in the transmit FIFO, so return a failure.
- //
- return(false);
- }
-}
-
-//*****************************************************************************
-//
-//! Waits to send a character from the specified port.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ucData is the character to be transmitted.
-//!
-//! Sends the character \e ucData to the transmit FIFO for the specified port.
-//! If there is no space available in the transmit FIFO, this function will
-//! wait until there is space available before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTCharPut(unsigned long ulBase, unsigned char ucData)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Wait until space is available.
- //
- while(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF)
- {
- }
-
- //
- // Send the char.
- //
- HWREG(ulBase + UART_O_DR) = ucData;
-}
-
-//*****************************************************************************
-//
-//! Causes a BREAK to be sent.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param bBreakState controls the output level.
-//!
-//! Calling this function with \e bBreakState set to \b true will assert a
-//! break condition on the UART. Calling this function with \e bBreakState set
-//! to \b false will remove the break condition. For proper transmission of a
-//! break command, the break must be asserted for at least two complete frames.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Set the break condition as requested.
- //
- HWREG(ulBase + UART_O_LCRH) =
- (bBreakState ?
- (HWREG(ulBase + UART_O_LCRH) | UART_LCRH_BRK) :
- (HWREG(ulBase + UART_O_LCRH) & ~(UART_LCRH_BRK)));
-}
-
-//*****************************************************************************
-//
-//! Determines whether the UART transmitter is busy or not.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! Allows the caller to determine whether all transmitted bytes have cleared
-//! the transmitter hardware. If \b false is returned, the transmit FIFO is
-//! empty and all bits of the last transmitted character, including all stop
-//! bits, have left the hardware shift register.
-//!
-//! \return Returns \b true if the UART is transmitting or \b false if all
-//! transmissions are complete.
-//
-//*****************************************************************************
-tBoolean
-UARTBusy(unsigned long ulBase)
-{
- //
- // Check the argument.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Determine if the UART is busy.
- //
- return((HWREG(ulBase + UART_O_FR) & UART_FR_BUSY) ? true : false);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for a UART interrupt.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! UART interrupt occurs.
-//!
-//! This function does the actual registering of the interrupt handler. This
-//! will enable the global interrupt in the interrupt controller; specific UART
-//! interrupts must be enabled via UARTIntEnable(). It is the interrupt
-//! handler's responsibility to clear the interrupt source.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
-{
- unsigned long ulInt;
-
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Determine the interrupt number based on the UART port.
- //
- ulInt = ((ulBase == UART0_BASE) ? INT_UART0 :
- ((ulBase == UART1_BASE) ? INT_UART1 : INT_UART2));
-
- //
- // Register the interrupt handler.
- //
- IntRegister(ulInt, pfnHandler);
-
- //
- // Enable the UART interrupt.
- //
- IntEnable(ulInt);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for a UART interrupt.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function does the actual unregistering of the interrupt handler. It
-//! will clear the handler to be called when a UART interrupt occurs. This
-//! will also mask off the interrupt in the interrupt controller so that the
-//! interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTIntUnregister(unsigned long ulBase)
-{
- unsigned long ulInt;
-
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Determine the interrupt number based on the UART port.
- //
- ulInt = ((ulBase == UART0_BASE) ? INT_UART0 :
- ((ulBase == UART1_BASE) ? INT_UART1 : INT_UART2));
-
- //
- // Disable the interrupt.
- //
- IntDisable(ulInt);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(ulInt);
-}
-
-//*****************************************************************************
-//
-//! Enables individual UART interrupt sources.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! Enables the indicated UART interrupt sources. Only the sources that are
-//! enabled can be reflected to the processor interrupt; disabled sources have
-//! no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b UART_INT_OE - Overrun Error interrupt
-//! - \b UART_INT_BE - Break Error interrupt
-//! - \b UART_INT_PE - Parity Error interrupt
-//! - \b UART_INT_FE - Framing Error interrupt
-//! - \b UART_INT_RT - Receive Timeout interrupt
-//! - \b UART_INT_TX - Transmit interrupt
-//! - \b UART_INT_RX - Receive interrupt
-//! - \b UART_INT_DSR - DSR interrupt
-//! - \b UART_INT_DCD - DCD interrupt
-//! - \b UART_INT_CTS - CTS interrupt
-//! - \b UART_INT_RI - RI interrupt
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Enable the specified interrupts.
- //
- HWREG(ulBase + UART_O_IM) |= ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables individual UART interrupt sources.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled.
-//!
-//! Disables the indicated UART interrupt sources. Only the sources that are
-//! enabled can be reflected to the processor interrupt; disabled sources have
-//! no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to UARTIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Disable the specified interrupts.
- //
- HWREG(ulBase + UART_O_IM) &= ~(ulIntFlags);
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param bMasked is false if the raw interrupt status is required and true
-//! if the masked interrupt status is required.
-//!
-//! This returns the interrupt status for the specified UART. Either the raw
-//! interrupt status or the status of interrupts that are allowed to reflect to
-//! the processor can be returned.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in UARTIntEnable().
-//
-//*****************************************************************************
-unsigned long
-UARTIntStatus(unsigned long ulBase, tBoolean bMasked)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Return either the interrupt status or the raw interrupt status as
- // requested.
- //
- if(bMasked)
- {
- return(HWREG(ulBase + UART_O_MIS));
- }
- else
- {
- return(HWREG(ulBase + UART_O_RIS));
- }
-}
-
-//*****************************************************************************
-//
-//! Clears UART interrupt sources.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified UART interrupt sources are cleared, so that they no longer
-//! assert. This must be done in the interrupt handler to keep it from being
-//! called again immediately upon exit.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to UARTIntEnable().
-//!
-//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
-//! several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared. Failure to do so may result in the interrupt handler
-//! being immediately reentered (since NVIC still sees the interrupt source
-//! asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Clear the requested interrupt sources.
- //
- HWREG(ulBase + UART_O_ICR) = ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Enable UART DMA operation.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulDMAFlags is a bit mask of the DMA features to enable.
-//!
-//! The specified UART DMA features are enabled. The UART can be
-//! configured to use DMA for transmit or receive, and to disable
-//! receive if an error occurs. The \e ulDMAFlags parameter is the
-//! logical OR of any of the following values:
-//!
-//! - UART_DMA_RX - enable DMA for receive
-//! - UART_DMA_TX - enable DMA for transmit
-//! - UART_DMA_ERR_RXSTOP - disable DMA receive on UART error
-//!
-//! \note The uDMA controller must also be set up before DMA can be used
-//! with the UART.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Set the requested bits in the UART DMA control register.
- //
- HWREG(ulBase + UART_O_DMACTL) |= ulDMAFlags;
-}
-
-//*****************************************************************************
-//
-//! Disable UART DMA operation.
-//!
-//! \param ulBase is the base address of the UART port.
-//! \param ulDMAFlags is a bit mask of the DMA features to disable.
-//!
-//! This function is used to disable UART DMA features that were enabled
-//! by UARTDMAEnable(). The specified UART DMA features are disabled. The
-//! \e ulDMAFlags parameter is the logical OR of any of the following values:
-//!
-//! - UART_DMA_RX - disable DMA for receive
-//! - UART_DMA_TX - disable DMA for transmit
-//! - UART_DMA_ERR_RXSTOP - do not disable DMA receive on UART error
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Clear the requested bits in the UART DMA control register.
- //
- HWREG(ulBase + UART_O_DMACTL) &= ~ulDMAFlags;
-}
-
-//*****************************************************************************
-//
-//! Gets current receiver errors.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function returns the current state of each of the 4 receiver error
-//! sources. The returned errors are equivalent to the four error bits
-//! returned via the previous call to UARTCharGet() or UARTCharGetNonBlocking()
-//! with the exception that the overrun error is set immediately the overrun
-//! occurs rather than when a character is next read.
-//!
-//! \return Returns a logical OR combination of the receiver error flags,
-//! \b UART_RXERROR_FRAMING, \b UART_RXERROR_PARITY, \b UART_RXERROR_BREAK
-//! and \b UART_RXERROR_OVERRUN.
-//
-//*****************************************************************************
-unsigned long
-UARTRxErrorGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Return the current value of the receive status register.
- //
- return(HWREG(ulBase + UART_O_RSR) & 0x0000000F);
-}
-
-//*****************************************************************************
-//
-//! Clears all reported receiver errors.
-//!
-//! \param ulBase is the base address of the UART port.
-//!
-//! This function is used to clear all receiver error conditions reported via
-//! UARTRxErrorGet(). If using the overrun, framing error, parity error or
-//! break interrupts, this function must be called after clearing the interrupt
-//! to ensure that later errors of the same type trigger another interrupt.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-UARTRxErrorClear(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(UARTBaseValid(ulBase));
-
- //
- // Any write to the Error Clear Register will clear all bits which are
- // currently set.
- //
- HWREG(ulBase + UART_O_ECR) = 0;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/uart.h b/bsp/lm3s/driverlib/uart.h
deleted file mode 100644
index 5c8416cc1bae1faa7ee5a27a7a273213c9f57046..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/uart.h
+++ /dev/null
@@ -1,246 +0,0 @@
-//*****************************************************************************
-//
-// uart.h - Defines and Macros for the UART.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __UART_H__
-#define __UART_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTIntEnable, UARTIntDisable, and UARTIntClear
-// as the ulIntFlags parameter, and returned from UARTIntStatus.
-//
-//*****************************************************************************
-#define UART_INT_OE 0x400 // Overrun Error Interrupt Mask
-#define UART_INT_BE 0x200 // Break Error Interrupt Mask
-#define UART_INT_PE 0x100 // Parity Error Interrupt Mask
-#define UART_INT_FE 0x080 // Framing Error Interrupt Mask
-#define UART_INT_RT 0x040 // Receive Timeout Interrupt Mask
-#define UART_INT_TX 0x020 // Transmit Interrupt Mask
-#define UART_INT_RX 0x010 // Receive Interrupt Mask
-#define UART_INT_DSR 0x008 // DSR Modem Interrupt Mask
-#define UART_INT_DCD 0x004 // DCD Modem Interrupt Mask
-#define UART_INT_CTS 0x002 // CTS Modem Interrupt Mask
-#define UART_INT_RI 0x001 // RI Modem Interrupt Mask
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTConfigSetExpClk as the ulConfig parameter
-// and returned by UARTConfigGetExpClk in the pulConfig parameter.
-// Additionally, the UART_CONFIG_PAR_* subset can be passed to
-// UARTParityModeSet as the ulParity parameter, and are returned by
-// UARTParityModeGet.
-//
-//*****************************************************************************
-#define UART_CONFIG_WLEN_MASK 0x00000060 // Mask for extracting word length
-#define UART_CONFIG_WLEN_8 0x00000060 // 8 bit data
-#define UART_CONFIG_WLEN_7 0x00000040 // 7 bit data
-#define UART_CONFIG_WLEN_6 0x00000020 // 6 bit data
-#define UART_CONFIG_WLEN_5 0x00000000 // 5 bit data
-#define UART_CONFIG_STOP_MASK 0x00000008 // Mask for extracting stop bits
-#define UART_CONFIG_STOP_ONE 0x00000000 // One stop bit
-#define UART_CONFIG_STOP_TWO 0x00000008 // Two stop bits
-#define UART_CONFIG_PAR_MASK 0x00000086 // Mask for extracting parity
-#define UART_CONFIG_PAR_NONE 0x00000000 // No parity
-#define UART_CONFIG_PAR_EVEN 0x00000006 // Even parity
-#define UART_CONFIG_PAR_ODD 0x00000002 // Odd parity
-#define UART_CONFIG_PAR_ONE 0x00000082 // Parity bit is one
-#define UART_CONFIG_PAR_ZERO 0x00000086 // Parity bit is zero
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTFIFOLevelSet as the ulTxLevel parameter and
-// returned by UARTFIFOLevelGet in the pulTxLevel.
-//
-//*****************************************************************************
-#define UART_FIFO_TX1_8 0x00000000 // Transmit interrupt at 1/8 Full
-#define UART_FIFO_TX2_8 0x00000001 // Transmit interrupt at 1/4 Full
-#define UART_FIFO_TX4_8 0x00000002 // Transmit interrupt at 1/2 Full
-#define UART_FIFO_TX6_8 0x00000003 // Transmit interrupt at 3/4 Full
-#define UART_FIFO_TX7_8 0x00000004 // Transmit interrupt at 7/8 Full
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTFIFOLevelSet as the ulRxLevel parameter and
-// returned by UARTFIFOLevelGet in the pulRxLevel.
-//
-//*****************************************************************************
-#define UART_FIFO_RX1_8 0x00000000 // Receive interrupt at 1/8 Full
-#define UART_FIFO_RX2_8 0x00000008 // Receive interrupt at 1/4 Full
-#define UART_FIFO_RX4_8 0x00000010 // Receive interrupt at 1/2 Full
-#define UART_FIFO_RX6_8 0x00000018 // Receive interrupt at 3/4 Full
-#define UART_FIFO_RX7_8 0x00000020 // Receive interrupt at 7/8 Full
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTDMAEnable() and UARTDMADisable().
-//
-//*****************************************************************************
-#define UART_DMA_ERR_RXSTOP 0x00000004 // Stop DMA receive if UART error
-#define UART_DMA_TX 0x00000002 // Enable DMA for transmit
-#define UART_DMA_RX 0x00000001 // Enable DMA for receive
-
-//*****************************************************************************
-//
-// Values returned from UARTRxErrorGet().
-//
-//*****************************************************************************
-#define UART_RXERROR_OVERRUN 0x00000008
-#define UART_RXERROR_BREAK 0x00000004
-#define UART_RXERROR_PARITY 0x00000002
-#define UART_RXERROR_FRAMING 0x00000001
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTHandshakeOutputsSet() or returned from
-// UARTHandshakeOutputGet().
-//
-//*****************************************************************************
-#define UART_OUTPUT_RTS 0x00000800
-#define UART_OUTPUT_DTR 0x00000400
-
-//*****************************************************************************
-//
-// Values that can be returned from UARTHandshakeInputsGet().
-//
-//*****************************************************************************
-#define UART_INPUT_RI 0x00000100
-#define UART_INPUT_DCD 0x00000004
-#define UART_INPUT_DSR 0x00000002
-#define UART_INPUT_CTS 0x00000001
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTFlowControl() or returned from
-// UARTFlowControlGet().
-//
-//*****************************************************************************
-#define UART_FLOWCONTROL_TX 0x00008000
-#define UART_FLOWCONTROL_RX 0x00004000
-#define UART_FLOWCONTROL_NONE 0x00000000
-
-//*****************************************************************************
-//
-// Values that can be passed to UARTTxIntModeSet() or returned from
-// UARTTxIntModeGet().
-//
-//*****************************************************************************
-#define UART_TXINT_MODE_FIFO 0x00000000
-#define UART_TXINT_MODE_EOT 0x00000010
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void UARTParityModeSet(unsigned long ulBase, unsigned long ulParity);
-extern unsigned long UARTParityModeGet(unsigned long ulBase);
-extern void UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel,
- unsigned long ulRxLevel);
-extern void UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel,
- unsigned long *pulRxLevel);
-extern void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
- unsigned long ulBaud, unsigned long ulConfig);
-extern void UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
- unsigned long *pulBaud,
- unsigned long *pulConfig);
-extern void UARTEnable(unsigned long ulBase);
-extern void UARTDisable(unsigned long ulBase);
-extern void UARTFIFOEnable(unsigned long ulBase);
-extern void UARTFIFODisable(unsigned long ulBase);
-extern void UARTEnableSIR(unsigned long ulBase, tBoolean bLowPower);
-extern void UARTDisableSIR(unsigned long ulBase);
-extern tBoolean UARTCharsAvail(unsigned long ulBase);
-extern tBoolean UARTSpaceAvail(unsigned long ulBase);
-extern long UARTCharGetNonBlocking(unsigned long ulBase);
-extern long UARTCharGet(unsigned long ulBase);
-extern tBoolean UARTCharPutNonBlocking(unsigned long ulBase,
- unsigned char ucData);
-extern void UARTCharPut(unsigned long ulBase, unsigned char ucData);
-extern void UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState);
-extern tBoolean UARTBusy(unsigned long ulBase);
-extern void UARTIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
-extern void UARTIntUnregister(unsigned long ulBase);
-extern void UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
-extern unsigned long UARTIntStatus(unsigned long ulBase, tBoolean bMasked);
-extern void UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags);
-extern void UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags);
-extern void UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags);
-extern unsigned long UARTRxErrorGet(unsigned long ulBase);
-extern void UARTRxErrorClear(unsigned long ulBase);
-extern void UARTSmartCardEnable(unsigned long ulBase);
-extern void UARTSmartCardDisable(unsigned long ulBase);
-extern void UARTModemControlSet(unsigned long ulBase,
- unsigned long ulControl);
-extern void UARTModemControlClear(unsigned long ulBase,
- unsigned long ulControl);
-extern unsigned long UARTModemControlGet(unsigned long ulBase);
-extern unsigned long UARTModemStatusGet(unsigned long ulBase);
-extern void UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode);
-extern unsigned long UARTFlowControlGet(unsigned long ulBase);
-extern void UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode);
-extern unsigned long UARTTxIntModeGet(unsigned long ulBase);
-
-//*****************************************************************************
-//
-// Several UART APIs have been renamed, with the original function name being
-// deprecated. These defines provide backward compatibility.
-//
-//*****************************************************************************
-#ifndef DEPRECATED
-#include "driverlib/sysctl.h"
-#define UARTConfigSet(a, b, c) \
- UARTConfigSetExpClk(a, SysCtlClockGet(), b, c)
-#define UARTConfigGet(a, b, c) \
- UARTConfigGetExpClk(a, SysCtlClockGet(), b, c)
-#define UARTCharNonBlockingGet(a) \
- UARTCharGetNonBlocking(a)
-#define UARTCharNonBlockingPut(a, b) \
- UARTCharPutNonBlocking(a, b)
-#endif
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __UART_H__
diff --git a/bsp/lm3s/driverlib/udma.c b/bsp/lm3s/driverlib/udma.c
deleted file mode 100644
index 3f4729ce458aae59acbae790b809dddcce0b4437..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/udma.c
+++ /dev/null
@@ -1,1247 +0,0 @@
-//*****************************************************************************
-//
-// udma.c - Driver for the micro-DMA controller.
-//
-// Copyright (c) 2007-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup udma_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_udma.h"
-#include "driverlib/debug.h"
-#include "driverlib/interrupt.h"
-#include "driverlib/udma.h"
-
-//*****************************************************************************
-//
-//! Enables the uDMA controller for use.
-//!
-//! This function enables the uDMA controller. The uDMA controller must be
-//! enabled before it can be configured and used.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAEnable(void)
-{
- //
- // Set the master enable bit in the config register.
- //
- HWREG(UDMA_CFG) = UDMA_CFG_MASTEN;
-}
-
-//*****************************************************************************
-//
-//! Disables the uDMA controller for use.
-//!
-//! This function disables the uDMA controller. Once disabled, the uDMA
-//! controller will not operate until re-enabled with uDMAEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMADisable(void)
-{
- //
- // Clear the master enable bit in the config register.
- //
- HWREG(UDMA_CFG) = 0;
-}
-
-//*****************************************************************************
-//
-//! Gets the uDMA error status.
-//!
-//! This function returns the uDMA error status. It should be called from
-//! within the uDMA error interrupt handler to determine if a uDMA error
-//! occurred.
-//!
-//! \return Returns non-zero if a uDMA error is pending.
-//
-//*****************************************************************************
-unsigned long
-uDMAErrorStatusGet(void)
-{
- //
- // Return the uDMA error status.
- //
- return(HWREG(UDMA_ERRCLR));
-}
-
-//*****************************************************************************
-//
-//! Clears the uDMA error interrupt.
-//!
-//! This function clears a pending uDMA error interrupt. It should be called
-//! from within the uDMA error interrupt handler to clear the interrupt.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAErrorStatusClear(void)
-{
- //
- // Clear the uDMA error interrupt.
- //
- HWREG(UDMA_ERRCLR) = 1;
-}
-
-//*****************************************************************************
-//
-//! Enables a uDMA channel for operation.
-//!
-//! \param ulChannel is the channel number to enable.
-//!
-//! This function enables a specific uDMA channel for use. This function must
-//! be used to enable a channel before it can be used to perform a uDMA
-//! transfer.
-//!
-//! When a uDMA transfer is completed, the channel will be automatically
-//! disabled by the uDMA controller. Therefore, this function should be called
-//! prior to starting up any new transfer.
-//!
-//! The \e ulChannel parameter must be one of the following:
-//!
-//! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
-//! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
-//! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
-//! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
-//! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
-//! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
-//! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
-//! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
-//! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
-//!
-//! And for microcontrollers that have a USB peripheral:
-//!
-//! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
-//! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
-//! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
-//! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
-//! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
-//! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelEnable(unsigned long ulChannel)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 32);
-
- //
- // Set the bit for this channel in the enable set register.
- //
- HWREG(UDMA_ENASET) = 1 << ulChannel;
-}
-
-//*****************************************************************************
-//
-//! Disables a uDMA channel for operation.
-//!
-//! \param ulChannel is the channel number to disable.
-//!
-//! This function disables a specific uDMA channel. Once disabled, a channel
-//! will not respond to uDMA transfer requests until re-enabled via
-//! uDMAChannelEnable().
-//!
-//! The \e ulChannel parameter must be one of the following:
-//!
-//! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
-//! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
-//! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
-//! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
-//! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
-//! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
-//! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
-//! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
-//! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
-//!
-//! And for microcontrollers that have a USB peripheral:
-//!
-//! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
-//! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
-//! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
-//! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
-//! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
-//! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelDisable(unsigned long ulChannel)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 32);
-
- //
- // Set the bit for this channel in the enable clear register.
- //
- HWREG(UDMA_ENACLR) = 1 << ulChannel;
-}
-
-//*****************************************************************************
-//
-//! Checks if a uDMA channel is enabled for operation.
-//!
-//! \param ulChannel is the channel number to check.
-//!
-//! This function checks to see if a specific uDMA channel is enabled. This
-//! can be used to check the status of a transfer, since the channel will
-//! be automatically disabled at the end of a transfer.
-//!
-//! The \e ulChannel parameter must be one of the following:
-//!
-//! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
-//! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
-//! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
-//! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
-//! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
-//! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
-//! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
-//! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
-//! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
-//!
-//! And for microcontrollers that have a USB peripheral:
-//!
-//! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
-//! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
-//! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
-//! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
-//! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
-//! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
-//!
-//! \return Returns \b true if the channel is enabled, \b false if disabled.
-//
-//*****************************************************************************
-tBoolean
-uDMAChannelIsEnabled(unsigned long ulChannel)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 32);
-
- //
- // AND the specified channel bit with the enable register, and return the
- // result.
- //
- return((HWREG(UDMA_ENASET) & (1 << ulChannel)) ? true : false);
-}
-
-//*****************************************************************************
-//
-//! Sets the base address for the channel control table.
-//!
-//! \param pControlTable is a pointer to the 1024 byte aligned base address
-//! of the uDMA channel control table.
-//!
-//! This function sets the base address of the channel control table. This
-//! table resides in system memory and holds control information for each uDMA
-//! channel. The table must be aligned on a 1024 byte boundary. The base
-//! address must be set before any of the channel functions can be used.
-//!
-//! The size of the channel control table depends on the number of uDMA
-//! channels, and which transfer modes are used. Refer to the introductory
-//! text and the microcontroller datasheet for more information about the
-//! channel control table.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAControlBaseSet(void *pControlTable)
-{
- //
- // Check the arguments.
- //
- ASSERT(((unsigned long)pControlTable & ~0x3FF) ==
- (unsigned long)pControlTable);
- ASSERT((unsigned long)pControlTable >= 0x20000000);
-
- //
- // Program the base address into the register.
- //
- HWREG(UDMA_CTLBASE) = (unsigned long)pControlTable;
-}
-
-//*****************************************************************************
-//
-//! Gets the base address for the channel control table.
-//!
-//! This function gets the base address of the channel control table. This
-//! table resides in system memory and holds control information for each uDMA
-//! channel.
-//!
-//! \return Returns a pointer to the base address of the channel control table.
-//
-//*****************************************************************************
-void *
-uDMAControlBaseGet(void)
-{
- //
- // Read the current value of the control base register, and return it to
- // the caller.
- //
- return((void *)HWREG(UDMA_CTLBASE));
-}
-
-//*****************************************************************************
-//
-//! Requests a uDMA channel to start a transfer.
-//!
-//! \param ulChannel is the channel number on which to request a uDMA transfer.
-//!
-//! This function allows software to request a uDMA channel to begin a
-//! transfer. This could be used for performing a memory to memory transfer,
-//! or if for some reason a transfer needs to be initiated by software instead
-//! of the peripheral associated with that channel.
-//!
-//! The \e ulChannel parameter must be one of the following:
-//!
-//! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
-//! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
-//! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
-//! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
-//! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
-//! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
-//! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
-//! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
-//! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
-//!
-//! And for microcontrollers that have a USB peripheral:
-//!
-//! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
-//! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
-//! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
-//! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
-//! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
-//! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
-//!
-//! \note If the channel is \b UDMA_CHANNEL_SW and interrupts are used, then
-//! the completion will be signaled on the uDMA dedicated interrupt. If a
-//! peripheral channel is used, then the completion will be signaled on the
-//! peripheral's interrupt.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelRequest(unsigned long ulChannel)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 32);
-
- //
- // Set the bit for this channel in the software uDMA request register.
- //
- HWREG(UDMA_SWREQ) = 1 << ulChannel;
-}
-
-//*****************************************************************************
-//
-//! Enables attributes of a uDMA channel.
-//!
-//! \param ulChannel is the channel to configure.
-//! \param ulAttr is a combination of attributes for the channel.
-//!
-//! The \e ulChannel parameter must be one of the following:
-//!
-//! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
-//! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
-//! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
-//! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
-//! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
-//! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
-//! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
-//! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
-//! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
-//!
-//! And for microcontrollers that have a USB peripheral:
-//!
-//! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
-//! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
-//! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
-//! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
-//! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
-//! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
-//!
-//! The \e ulAttr parameter is the logical OR of any of the following:
-//!
-//! - \b UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst
-//! mode.
-//! - \b UDMA_ATTR_ALTSELECT is used to select the alternate control structure
-//! for this channel.
-//! - \b UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
-//! - \b UDMA_ATTR_REQMASK is used to mask the hardware request signal from the
-//! peripheral for this channel.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelAttributeEnable(unsigned long ulChannel, unsigned long ulAttr)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 32);
- ASSERT((ulAttr & ~(UDMA_ATTR_USEBURST | UDMA_ATTR_ALTSELECT |
- UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK)) == 0);
-
- //
- // Set the useburst bit for this channel if set in ulConfig.
- //
- if(ulAttr & UDMA_ATTR_USEBURST)
- {
- HWREG(UDMA_USEBURSTSET) = 1 << ulChannel;
- }
-
- //
- // Set the alternate control select bit for this channel,
- // if set in ulConfig.
- //
- if(ulAttr & UDMA_ATTR_ALTSELECT)
- {
- HWREG(UDMA_ALTSET) = 1 << ulChannel;
- }
-
- //
- // Set the high priority bit for this channel, if set in ulConfig.
- //
- if(ulAttr & UDMA_ATTR_HIGH_PRIORITY)
- {
- HWREG(UDMA_PRIOSET) = 1 << ulChannel;
- }
-
- //
- // Set the request mask bit for this channel, if set in ulConfig.
- //
- if(ulAttr & UDMA_ATTR_REQMASK)
- {
- HWREG(UDMA_REQMASKSET) = 1 << ulChannel;
- }
-}
-
-//*****************************************************************************
-//
-//! Disables attributes of a uDMA channel.
-//!
-//! \param ulChannel is the channel to configure.
-//! \param ulAttr is a combination of attributes for the channel.
-//!
-//! This function is used to disable attributes of a uDMA channel.
-//!
-//! The \e ulChannel parameter must be one of the following:
-//!
-//! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
-//! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
-//! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
-//! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
-//! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
-//! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
-//! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
-//! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
-//! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
-//!
-//! And for microcontrollers that have a USB peripheral:
-//!
-//! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
-//! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
-//! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
-//! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
-//! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
-//! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
-//!
-//! The \e ulAttr parameter is the logical OR of any of the following:
-//!
-//! - \b UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst
-//! mode.
-//! - \b UDMA_ATTR_ALTSELECT is used to select the alternate control structure
-//! for this channel.
-//! - \b UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
-//! - \b UDMA_ATTR_REQMASK is used to mask the hardware request signal from the
-//! peripheral for this channel.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelAttributeDisable(unsigned long ulChannel, unsigned long ulAttr)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 32);
- ASSERT((ulAttr & ~(UDMA_ATTR_USEBURST | UDMA_ATTR_ALTSELECT |
- UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK)) == 0);
-
- //
- // Clear the useburst bit for this channel if set in ulConfig.
- //
- if(ulAttr & UDMA_ATTR_USEBURST)
- {
- HWREG(UDMA_USEBURSTCLR) = 1 << ulChannel;
- }
-
- //
- // Clear the alternate control select bit for this channel, if set in
- // ulConfig.
- //
- if(ulAttr & UDMA_ATTR_ALTSELECT)
- {
- HWREG(UDMA_ALTCLR) = 1 << ulChannel;
- }
-
- //
- // Clear the high priority bit for this channel, if set in ulConfig.
- //
- if(ulAttr & UDMA_ATTR_HIGH_PRIORITY)
- {
- HWREG(UDMA_PRIOCLR) = 1 << ulChannel;
- }
-
- //
- // Clear the request mask bit for this channel, if set in ulConfig.
- //
- if(ulAttr & UDMA_ATTR_REQMASK)
- {
- HWREG(UDMA_REQMASKCLR) = 1 << ulChannel;
- }
-}
-
-//*****************************************************************************
-//
-//! Gets the enabled attributes of a uDMA channel.
-//!
-//! \param ulChannel is the channel to configure.
-//!
-//! This function returns a combination of flags representing the attributes of
-//! the uDMA channel.
-//!
-//! The \e ulChannel parameter must be one of the following:
-//!
-//! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
-//! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
-//! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
-//! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
-//! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
-//! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
-//! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
-//! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
-//! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
-//!
-//! And for microcontrollers that have a USB peripheral:
-//!
-//! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
-//! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
-//! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
-//! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
-//! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
-//! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
-//!
-//! \return Returns the logical OR of the attributes of the uDMA channel, which
-//! can be any of the following:
-//! - \b UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst
-//! mode.
-//! - \b UDMA_ATTR_ALTSELECT is used to select the alternate control structure
-//! for this channel.
-//! - \b UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
-//! - \b UDMA_ATTR_REQMASK is used to mask the hardware request signal from the
-//! peripheral for this channel.
-//
-//*****************************************************************************
-unsigned long
-uDMAChannelAttributeGet(unsigned long ulChannel)
-{
- unsigned long ulAttr = 0;
-
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 32);
-
- //
- // Check to see if useburst bit is set for this channel.
- //
- if(HWREG(UDMA_USEBURSTSET) & (1 << ulChannel))
- {
- ulAttr |= UDMA_ATTR_USEBURST;
- }
-
- //
- // Check to see if the alternate control bit is set for this channel.
- //
- if(HWREG(UDMA_ALTSET) & (1 << ulChannel))
- {
- ulAttr |= UDMA_ATTR_ALTSELECT;
- }
-
- //
- // Check to see if the high priority bit is set for this channel.
- //
- if(HWREG(UDMA_PRIOSET) & (1 << ulChannel))
- {
- ulAttr |= UDMA_ATTR_HIGH_PRIORITY;
- }
-
- //
- // Check to see if the request mask bit is set for this channel.
- //
- if(HWREG(UDMA_REQMASKSET) & (1 << ulChannel))
- {
- ulAttr |= UDMA_ATTR_REQMASK;
- }
-
- //
- // Return the configuration flags.
- //
- return(ulAttr);
-}
-
-//*****************************************************************************
-//
-//! Sets the control parameters for a uDMA channel.
-//!
-//! \param ulChannel is the logical OR of the uDMA channel number with
-//! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
-//! \param ulControl is logical OR of several control values to set the control
-//! parameters for the channel.
-//!
-//! This function is used to set control parameters for a uDMA transfer. These
-//! are typically parameters that are not changed often.
-//!
-//! The \e ulChannel parameter is one of the choices documented in the
-//! uDMAChannelEnable() function. It should be the logical OR of the channel
-//! with one of \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether
-//! the primary or alternate data structure is used.
-//!
-//! The \e ulControl parameter is the logical OR of five values: the data size,
-//! the source address increment, the destination address increment, the
-//! arbitration size, and the use burst flag. The choices available for each
-//! of these values is described below.
-//!
-//! Choose the data size from one of \b UDMA_SIZE_8, \b UDMA_SIZE_16, or
-//! \b UDMA_SIZE_32 to select a data size of 8, 16, or 32 bits.
-//!
-//! Choose the source address increment from one of \b UDMA_SRC_INC_8,
-//! \b UDMA_SRC_INC_16, \b UDMA_SRC_INC_32, or \b UDMA_SRC_INC_NONE to select
-//! an address increment of 8-bit bytes, 16-bit halfwords, 32-bit words, or
-//! to select non-incrementing.
-//!
-//! Choose the destination address increment from one of \b UDMA_DST_INC_8,
-//! \b UDMA_DST_INC_16, \b UDMA_DST_INC_32, or \b UDMA_DST_INC_NONE to select
-//! an address increment of 8-bit bytes, 16-bit halfwords, 32-bit words, or
-//! to select non-incrementing.
-//!
-//! The arbitration size determines how many items are transferred before
-//! the uDMA controller re-arbitrates for the bus. Choose the arbitration size
-//! from one of \b UDMA_ARB_1, \b UDMA_ARB_2, \b UDMA_ARB_4, \b UDMA_ARB_8,
-//! through \b UDMA_ARB_1024 to select the arbitration size from 1 to 1024
-//! items, in powers of 2.
-//!
-//! The value \b UDMA_NEXT_USEBURST is used to force the channel to only
-//! respond to burst requests at the tail end of a scatter-gather transfer.
-//!
-//! \note The address increment cannot be smaller than the data size.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelControlSet(unsigned long ulChannel, unsigned long ulControl)
-{
- tDMAControlTable *pCtl;
-
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 64);
- ASSERT(HWREG(UDMA_CTLBASE) != 0);
-
- //
- // Get the base address of the control table.
- //
- pCtl = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
-
- //
- // Get the current control word value and mask off the fields to be
- // changed, then OR in the new settings.
- //
- pCtl[ulChannel].ulControl = ((pCtl[ulChannel].ulControl &
- ~(UDMA_CHCTL_DSTINC_M |
- UDMA_CHCTL_DSTSIZE_M |
- UDMA_CHCTL_SRCINC_M |
- UDMA_CHCTL_SRCSIZE_M |
- UDMA_CHCTL_ARBSIZE_M |
- UDMA_CHCTL_NXTUSEBURST)) |
- ulControl);
-}
-
-//*****************************************************************************
-//
-//! Sets the transfer parameters for a uDMA channel.
-//!
-//! \param ulChannel is the logical or of the uDMA channel number with either
-//! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
-//! \param ulMode is the type of uDMA transfer.
-//! \param pvSrcAddr is the source address for the transfer.
-//! \param pvDstAddr is the destination address for the transfer.
-//! \param ulTransferSize is the number of data items to transfer.
-//!
-//! This function is used to set the parameters for a uDMA transfer. These are
-//! typically parameters that are changed often. The function
-//! uDMAChannelControlSet() MUST be called at least once for this channel prior
-//! to calling this function.
-//!
-//! The \e ulChannel parameter is one of the choices documented in the
-//! uDMAChannelEnable() function. It should be the logical OR of the channel
-//! with either \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether the
-//! primary or alternate data structure is used.
-//!
-//! The \e ulMode parameter should be one of the following values:
-//!
-//! - \b UDMA_MODE_STOP stops the uDMA transfer. The controller sets the mode
-//! to this value at the end of a transfer.
-//! - \b UDMA_MODE_BASIC to perform a basic transfer based on request.
-//! - \b UDMA_MODE_AUTO to perform a transfer that will always complete once
-//! started even if request is removed.
-//! - \b UDMA_MODE_PINGPONG to set up a transfer that switches between the
-//! primary and alternate control structures for the channel. This allows
-//! use of ping-pong buffering for uDMA transfers.
-//! - \b UDMA_MODE_MEM_SCATTER_GATHER to set up a memory scatter-gather
-//! transfer.
-//! - \b UDMA_MODE_PER_SCATTER_GATHER to set up a peripheral scatter-gather
-//! transfer.
-//!
-//! The \e pvSrcAddr and \e pvDstAddr parameters are pointers to the first
-//! location of the data to be transferred. These addresses should be aligned
-//! according to the item size. The compiler will take care of this if the
-//! pointers are pointing to storage of the appropriate data type.
-//!
-//! The \e ulTransferSize parameter is the number of data items, not the number
-//! of bytes.
-//!
-//! The two scatter/gather modes, memory and peripheral, are actually different
-//! depending on whether the primary or alternate control structure is
-//! selected. This function will look for the \b UDMA_PRI_SELECT and
-//! \b UDMA_ALT_SELECT flag along with the channel number and will set the
-//! scatter/gather mode as appropriate for the primary or alternate control
-//! structure.
-//!
-//! The channel must also be enabled using uDMAChannelEnable() after calling
-//! this function. The transfer will not begin until the channel has been set
-//! up and enabled. Note that the channel is automatically disabled after the
-//! transfer is completed, meaning that uDMAChannelEnable() must be called
-//! again after setting up the next transfer.
-//!
-//! \note Great care must be taken to not modify a channel control structure
-//! that is in use or else the results will be unpredictable, including the
-//! possibility of undesired data transfers to or from memory or peripherals.
-//! For BASIC and AUTO modes, it is safe to make changes when the channel is
-//! disabled, or the uDMAChannelModeGet() returns \b UDMA_MODE_STOP. For
-//! PINGPONG or one of the SCATTER_GATHER modes, it is safe to modify the
-//! primary or alternate control structure only when the other is being used.
-//! The uDMAChannelModeGet() function will return \b UDMA_MODE_STOP when a
-//! channel control structure is inactive and safe to modify.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelTransferSet(unsigned long ulChannel, unsigned long ulMode,
- void *pvSrcAddr, void *pvDstAddr,
- unsigned long ulTransferSize)
-{
- tDMAControlTable *pControlTable;
- unsigned long ulControl;
- unsigned long ulSize;
- unsigned long ulInc;
-
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 64);
- ASSERT(HWREG(UDMA_CTLBASE) != 0);
- ASSERT(ulMode <= UDMA_MODE_PER_SCATTER_GATHER);
- ASSERT((unsigned long)pvSrcAddr >= 0x20000000);
- ASSERT((unsigned long)pvDstAddr >= 0x20000000);
- ASSERT((ulTransferSize != 0) && (ulTransferSize <= 1024));
-
- //
- // Get the base address of the control table.
- //
- pControlTable = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
-
- //
- // Get the current control word value and mask off the mode and size
- // fields.
- //
- ulControl = (pControlTable[ulChannel].ulControl &
- ~(UDMA_CHCTL_XFERSIZE_M | UDMA_CHCTL_XFERMODE_M));
-
- //
- // Adjust the mode if the alt control structure is selected.
- //
- if(ulChannel & UDMA_ALT_SELECT)
- {
- if((ulMode == UDMA_MODE_MEM_SCATTER_GATHER) ||
- (ulMode == UDMA_MODE_PER_SCATTER_GATHER))
- {
- ulMode |= UDMA_MODE_ALT_SELECT;
- }
- }
-
- //
- // Set the transfer size and mode in the control word (but dont write the
- // control word yet as it could kick off a transfer).
- //
- ulControl |= ulMode | ((ulTransferSize - 1) << 4);
-
- //
- // Get the data item size from the control word (set previously).
- //
- ulSize = (ulControl & UDMA_CHCTL_DSTSIZE_M) >> 28;
-
- //
- // Convert the transfer size to be in units of bytes. Shift (multiply) to
- // get the value in bytes, based on the data item size.
- //
- ulTransferSize = ulTransferSize << ulSize;
-
- //
- // Get the address increment value for the source, from the control word.
- //
- ulInc = (ulControl & UDMA_CHCTL_SRCINC_M);
-
- //
- // Compute the ending source address of the transfer. If the source
- // increment is set to none, then the ending address is the same as the
- // beginning.
- //
- if(ulInc != UDMA_SRC_INC_NONE)
- {
- pvSrcAddr = (void *)((unsigned long)pvSrcAddr + ulTransferSize - 1);
- }
-
- //
- // Load the source ending address into the control block.
- //
- pControlTable[ulChannel].pvSrcEndAddr = pvSrcAddr;
-
- //
- // Get the address increment value for the destination, from the control
- // word.
- //
- ulInc = (ulControl & UDMA_CHCTL_DSTINC_M);
-
- //
- // Compute the ending destination address of the transfer. If the
- // destination increment is set to none, then the ending address is the
- // same as the beginning.
- //
- if(ulInc != UDMA_DST_INC_NONE)
- {
- pvDstAddr = (void *)((unsigned long)pvDstAddr + ulTransferSize - 1);
- }
-
- //
- // Load the destination ending address into the control block.
- //
- pControlTable[ulChannel].pvDstEndAddr = pvDstAddr;
-
- //
- // Write the new control word value.
- //
- pControlTable[ulChannel].ulControl = ulControl;
-}
-
-//*****************************************************************************
-//
-//! Gets the current transfer size for a uDMA channel.
-//!
-//! \param ulChannel is the logical or of the uDMA channel number with either
-//! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
-//!
-//! This function is used to get the uDMA transfer size for a channel. The
-//! transfer size is the number of items to transfer, where the size of an item
-//! might be 8, 16, or 32 bits. If a partial transfer has already occurred,
-//! then the number of remaining items will be returned. If the transfer is
-//! complete, then 0 will be returned.
-//!
-//! The \e ulChannel parameter is one of the choices documented in the
-//! uDMAChannelEnable() function. It should be the logical OR of the channel
-//! with either \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether
-//! the primary or alternate data structure is used.
-//!
-//! \return Returns the number of items remaining to transfer.
-//
-//*****************************************************************************
-unsigned long
-uDMAChannelSizeGet(unsigned long ulChannel)
-{
- tDMAControlTable *pControlTable;
- unsigned long ulControl;
-
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 64);
- ASSERT(HWREG(UDMA_CTLBASE) != 0);
-
- //
- // Get the base address of the control table.
- //
- pControlTable = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
-
- //
- // Get the current control word value and mask off all but the size field.
- //
- ulControl = pControlTable[ulChannel].ulControl & UDMA_CHCTL_XFERSIZE_M;
-
- //
- // Shift the size field and add one, then return to user.
- //
- return((ulControl >> 4) + 1);
-}
-
-//*****************************************************************************
-//
-//! Gets the transfer mode for a uDMA channel.
-//!
-//! \param ulChannel is the logical or of the uDMA channel number with either
-//! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
-//!
-//! This function is used to get the transfer mode for the uDMA channel. It
-//! can be used to query the status of a transfer on a channel. When the
-//! transfer is complete the mode will be \b UDMA_MODE_STOP.
-//!
-//! The \e ulChannel parameter is one of the choices documented in the
-//! uDMAChannelEnable() function. It should be the logical OR of the channel
-//! with either \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether the
-//! primary or alternate data structure is used.
-//!
-//! \return Returns the transfer mode of the specified channel and control
-//! structure, which will be one of the following values: \b UDMA_MODE_STOP,
-//! \b UDMA_MODE_BASIC, \b UDMA_MODE_AUTO, \b UDMA_MODE_PINGPONG,
-//! \b UDMA_MODE_MEM_SCATTER_GATHER, or \b UDMA_MODE_PER_SCATTER_GATHER.
-//
-//*****************************************************************************
-unsigned long
-uDMAChannelModeGet(unsigned long ulChannel)
-{
- tDMAControlTable *pControlTable;
- unsigned long ulControl;
-
- //
- // Check the arguments.
- //
- ASSERT(ulChannel < 64);
- ASSERT(HWREG(UDMA_CTLBASE) != 0);
-
- //
- // Get the base address of the control table.
- //
- pControlTable = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
-
- //
- // Get the current control word value and mask off all but the mode field.
- //
- ulControl = pControlTable[ulChannel].ulControl & UDMA_CHCTL_XFERMODE_M;
-
- //
- // Check if scatter/gather mode, and if so, mask off the alt bit.
- //
- if(((ulControl & ~UDMA_MODE_ALT_SELECT) == UDMA_MODE_MEM_SCATTER_GATHER) ||
- ((ulControl & ~UDMA_MODE_ALT_SELECT) == UDMA_MODE_PER_SCATTER_GATHER))
- {
- ulControl &= ~UDMA_MODE_ALT_SELECT;
- }
-
- //
- // Return the mode to the caller.
- //
- return(ulControl);
-}
-
-//*****************************************************************************
-//
-//! Select the secondary peripheral for a set of uDMA channels.
-//!
-//! \param ulSecPeriphs is the logical or of the uDMA channels for which to
-//! use the secondary peripheral, instead of the default peripheral.
-//!
-//! This function is used to select the secondary peripheral assignment for
-//! a set of uDMA channels. By selecting the secondary peripheral assignment
-//! for a channel, the default peripheral assignment is no longer available
-//! for that channel.
-//!
-//! The parameter \e ulSecPeriphs can be the logical OR of any of the
-//! following macros. If one of the macros below is in the list passed
-//! to this function, then the secondary peripheral (marked as \b _SEC_)
-//! will be selected.
-//!
-//! - \b UDMA_DEF_USBEP1RX_SEC_UART2RX
-//! - \b UDMA_DEF_USBEP1TX_SEC_UART2TX
-//! - \b UDMA_DEF_USBEP2RX_SEC_TMR3A
-//! - \b UDMA_DEF_USBEP2TX_SEC_TMR3B
-//! - \b UDMA_DEF_USBEP3RX_SEC_TMR2A
-//! - \b UDMA_DEF_USBEP3TX_SEC_TMR2B
-//! - \b UDMA_DEF_ETH0RX_SEC_TMR2A
-//! - \b UDMA_DEF_ETH0TX_SEC_TMR2B
-//! - \b UDMA_DEF_UART0RX_SEC_UART1RX
-//! - \b UDMA_DEF_UART0TX_SEC_UART1TX
-//! - \b UDMA_DEF_SSI0RX_SEC_SSI1RX
-//! - \b UDMA_DEF_SSI0TX_SEC_SSI1TX
-//! - \b UDMA_DEF_RESERVED_SEC_UART2RX
-//! - \b UDMA_DEF_RESERVED_SEC_UART2TX
-//! - \b UDMA_DEF_ADC00_SEC_TMR2A
-//! - \b UDMA_DEF_ADC01_SEC_TMR2B
-//! - \b UDMA_DEF_ADC02_SEC_RESERVED
-//! - \b UDMA_DEF_ADC03_SEC_RESERVED
-//! - \b UDMA_DEF_TMR0A_SEC_TMR1A
-//! - \b UDMA_DEF_TMR0B_SEC_TMR1B
-//! - \b UDMA_DEF_TMR1A_SEC_GPIORX
-//! - \b UDMA_DEF_TMR1B_SEC_GPIOTX
-//! - \b UDMA_DEF_UART1RX_SEC_RESERVED
-//! - \b UDMA_DEF_UART1TX_SEC_RESERVED
-//! - \b UDMA_DEF_SSI1RX_SEC_ADC10
-//! - \b UDMA_DEF_SSI1TX_SEC_ADC11
-//! - \b UDMA_DEF_RESERVED_SEC_ADC12
-//! - \b UDMA_DEF_RESERVED_SEC_ADC13
-//! - \b UDMA_DEF_I2S0RX_SEC_RESERVED
-//! - \b UDMA_DEF_I2S0TX_SEC_RESERVED
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelSelectSecondary(unsigned long ulSecPeriphs)
-{
- //
- // Select the secondary peripheral for the specified channels.
- //
- HWREG(UDMA_CHALT) |= ulSecPeriphs;
-}
-
-//*****************************************************************************
-//
-//! Select the default peripheral for a set of uDMA channels.
-//!
-//! \param ulDefPeriphs is the logical or of the uDMA channels for which to
-//! use the default peripheral, instead of the secondary peripheral.
-//!
-//! This function is used to select the default peripheral assignment for
-//! a set of uDMA channels.
-//!
-//! The parameter \e ulDefPeriphs can be the logical OR of any of the
-//! following macros. If one of the macros below is in the list passed
-//! to this function, then the default peripheral (marked as \b _DEF_)
-//! will be selected.
-//!
-//! - \b UDMA_DEF_USBEP1RX_SEC_UART2RX
-//! - \b UDMA_DEF_USBEP1TX_SEC_UART2TX
-//! - \b UDMA_DEF_USBEP2RX_SEC_TMR3A
-//! - \b UDMA_DEF_USBEP2TX_SEC_TMR3B
-//! - \b UDMA_DEF_USBEP3RX_SEC_TMR2A
-//! - \b UDMA_DEF_USBEP3TX_SEC_TMR2B
-//! - \b UDMA_DEF_ETH0RX_SEC_TMR2A
-//! - \b UDMA_DEF_ETH0TX_SEC_TMR2B
-//! - \b UDMA_DEF_UART0RX_SEC_UART1RX
-//! - \b UDMA_DEF_UART0TX_SEC_UART1TX
-//! - \b UDMA_DEF_SSI0RX_SEC_SSI1RX
-//! - \b UDMA_DEF_SSI0TX_SEC_SSI1TX
-//! - \b UDMA_DEF_RESERVED_SEC_UART2RX
-//! - \b UDMA_DEF_RESERVED_SEC_UART2TX
-//! - \b UDMA_DEF_ADC00_SEC_TMR2A
-//! - \b UDMA_DEF_ADC01_SEC_TMR2B
-//! - \b UDMA_DEF_ADC02_SEC_RESERVED
-//! - \b UDMA_DEF_ADC03_SEC_RESERVED
-//! - \b UDMA_DEF_TMR0A_SEC_TMR1A
-//! - \b UDMA_DEF_TMR0B_SEC_TMR1B
-//! - \b UDMA_DEF_TMR1A_SEC_GPIORX
-//! - \b UDMA_DEF_TMR1B_SEC_GPIOTX
-//! - \b UDMA_DEF_UART1RX_SEC_RESERVED
-//! - \b UDMA_DEF_UART1TX_SEC_RESERVED
-//! - \b UDMA_DEF_SSI1RX_SEC_ADC10
-//! - \b UDMA_DEF_SSI1TX_SEC_ADC11
-//! - \b UDMA_DEF_RESERVED_SEC_ADC12
-//! - \b UDMA_DEF_RESERVED_SEC_ADC13
-//! - \b UDMA_DEF_I2S0RX_SEC_RESERVED
-//! - \b UDMA_DEF_I2S0TX_SEC_RESERVED
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAChannelSelectDefault(unsigned long ulDefPeriphs)
-{
- //
- // Select the default peripheral for the specified channels.
- //
- HWREG(UDMA_CHALT) &= ~ulDefPeriphs;
-}
-
-//*****************************************************************************
-//
-//! Gets the uDMA controller channel interrupt status.
-//!
-//! This function is used to get the interrupt status of the uDMA controller.
-//! The returned value is a 32-bit bit mask that indicates which channels are
-//! requesting an interrupt. This function can be used from within an
-//! interrupt handler to determine or confirm which uDMA channel has requested
-//! an interrupt.
-//!
-//! \return Returns a 32-bit mask which indicates requesting uDMA channels.
-//! There is a bit for each channel, and a 1 in a bit indicates that channel
-//! is requesting an interrupt. Multiple bits can be set.
-//
-//*****************************************************************************
-unsigned long
-uDMAIntStatus(void)
-{
- return(HWREG(UDMA_CHIS));
-}
-
-//*****************************************************************************
-//
-//! Clears uDMA interrupt status.
-//!
-//! \param ulChanMask is a 32-bit mask with one bit for each uDMA channel.
-//!
-//! Clears bits in the uDMA interrupt status register according to which bits
-//! are set in \e ulChanMask. There is one bit for each channel. If a a bit
-//! is set in \e ulChanMask, then that corresponding channel's interrupt
-//! status will be cleared (if it was set).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAIntClear(unsigned long ulChanMask)
-{
- HWREG(UDMA_CHIS) = ulChanMask;
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the uDMA controller.
-//!
-//! \param ulIntChannel identifies which uDMA interrupt is to be registered.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! interrupt is activated.
-//!
-//! This sets and enables the handler to be called when the uDMA controller
-//! generates an interrupt. The \e ulIntChannel parameter should be one of the
-//! following:
-//!
-//! - \b UDMA_INT_SW to register an interrupt handler to process interrupts
-//! from the uDMA software channel (UDMA_CHANNEL_SW)
-//! - \b UDMA_INT_ERR to register an interrupt handler to process uDMA error
-//! interrupts
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \note The interrupt handler for uDMA is for transfer completion when the
-//! channel UDMA_CHANNEL_SW is used, and for error interrupts. The
-//! interrupts for each peripheral channel are handled through the individual
-//! peripheral interrupt handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAIntRegister(unsigned long ulIntChannel, void (*pfnHandler)(void))
-{
- //
- // Check the arguments.
- //
- ASSERT(pfnHandler);
- ASSERT((ulIntChannel == UDMA_INT_SW) || (ulIntChannel == UDMA_INT_ERR));
-
- //
- // Register the interrupt handler.
- //
- IntRegister(ulIntChannel, pfnHandler);
-
- //
- // Enable the memory management fault.
- //
- IntEnable(ulIntChannel);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the uDMA controller.
-//!
-//! \param ulIntChannel identifies which uDMA interrupt to unregister.
-//!
-//! This function will disable and clear the handler to be called for the
-//! specified uDMA interrupt. The \e ulIntChannel parameter should be one of
-//! \b UDMA_INT_SW or \b UDMA_INT_ERR as documented for the function
-//! uDMAIntRegister().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-uDMAIntUnregister(unsigned long ulIntChannel)
-{
- //
- // Disable the interrupt.
- //
- IntDisable(ulIntChannel);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(ulIntChannel);
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/udma.h b/bsp/lm3s/driverlib/udma.h
deleted file mode 100644
index d175947ee4f00dfdcff30b52699a9feae6930640..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/udma.h
+++ /dev/null
@@ -1,338 +0,0 @@
-//*****************************************************************************
-//
-// udma.h - Prototypes and macros for the uDMA controller.
-//
-// Copyright (c) 2007-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __UDMA_H__
-#define __UDMA_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// A structure that defines an entry in the channel control table. These
-// fields are used by the uDMA controller and normally it is not necessary for
-// software to directly read or write fields in the table.
-//
-//*****************************************************************************
-typedef struct
-{
- //
- // The ending source address of the data transfer.
- //
- volatile void *pvSrcEndAddr;
-
- //
- // The ending destination address of the data transfer.
- //
- volatile void *pvDstEndAddr;
-
- //
- // The channel control mode.
- //
- volatile unsigned long ulControl;
-
- //
- // An unused location.
- //
- volatile unsigned long ulSpare;
-}
-tDMAControlTable;
-
-//*****************************************************************************
-//
-// Flags that can be passed to uDMAChannelAttributeEnable(),
-// uDMAChannelAttributeDisable(), and returned from uDMAChannelAttributeGet().
-//
-//*****************************************************************************
-#define UDMA_ATTR_USEBURST 0x00000001
-#define UDMA_ATTR_ALTSELECT 0x00000002
-#define UDMA_ATTR_HIGH_PRIORITY 0x00000004
-#define UDMA_ATTR_REQMASK 0x00000008
-#define UDMA_ATTR_ALL 0x0000000F
-
-//*****************************************************************************
-//
-// DMA control modes that can be passed to uDMAModeSet() and returned
-// uDMAModeGet().
-//
-//*****************************************************************************
-#define UDMA_MODE_STOP 0x00000000
-#define UDMA_MODE_BASIC 0x00000001
-#define UDMA_MODE_AUTO 0x00000002
-#define UDMA_MODE_PINGPONG 0x00000003
-#define UDMA_MODE_MEM_SCATTER_GATHER \
- 0x00000004
-#define UDMA_MODE_PER_SCATTER_GATHER \
- 0x00000006
-#define UDMA_MODE_ALT_SELECT 0x00000001
-
-//*****************************************************************************
-//
-// Channel configuration values that can be passed to uDMAControlSet().
-//
-//*****************************************************************************
-#define UDMA_DST_INC_8 0x00000000
-#define UDMA_DST_INC_16 0x40000000
-#define UDMA_DST_INC_32 0x80000000
-#define UDMA_DST_INC_NONE 0xc0000000
-#define UDMA_SRC_INC_8 0x00000000
-#define UDMA_SRC_INC_16 0x04000000
-#define UDMA_SRC_INC_32 0x08000000
-#define UDMA_SRC_INC_NONE 0x0c000000
-#define UDMA_SIZE_8 0x00000000
-#define UDMA_SIZE_16 0x11000000
-#define UDMA_SIZE_32 0x22000000
-#define UDMA_ARB_1 0x00000000
-#define UDMA_ARB_2 0x00004000
-#define UDMA_ARB_4 0x00008000
-#define UDMA_ARB_8 0x0000c000
-#define UDMA_ARB_16 0x00010000
-#define UDMA_ARB_32 0x00014000
-#define UDMA_ARB_64 0x00018000
-#define UDMA_ARB_128 0x0001c000
-#define UDMA_ARB_256 0x00020000
-#define UDMA_ARB_512 0x00024000
-#define UDMA_ARB_1024 0x00028000
-#define UDMA_NEXT_USEBURST 0x00000008
-
-//*****************************************************************************
-//
-// Channel numbers to be passed to API functions that require a channel number
-// ID.
-//
-//*****************************************************************************
-#define UDMA_CHANNEL_USBEP1RX 0
-#define UDMA_CHANNEL_USBEP1TX 1
-#define UDMA_CHANNEL_USBEP2RX 2
-#define UDMA_CHANNEL_USBEP2TX 3
-#define UDMA_CHANNEL_USBEP3RX 4
-#define UDMA_CHANNEL_USBEP3TX 5
-#define UDMA_CHANNEL_ETH0RX 6
-#define UDMA_CHANNEL_ETH0TX 7
-#define UDMA_CHANNEL_UART0RX 8
-#define UDMA_CHANNEL_UART0TX 9
-#define UDMA_CHANNEL_SSI0RX 10
-#define UDMA_CHANNEL_SSI0TX 11
-#define UDMA_CHANNEL_ADC0 14
-#define UDMA_CHANNEL_ADC1 15
-#define UDMA_CHANNEL_ADC2 16
-#define UDMA_CHANNEL_ADC3 17
-#define UDMA_CHANNEL_TMR0A 18
-#define UDMA_CHANNEL_TMR0B 19
-#define UDMA_CHANNEL_TMR1A 20
-#define UDMA_CHANNEL_TMR1B 21
-#define UDMA_CHANNEL_UART1RX 22
-#define UDMA_CHANNEL_UART1TX 23
-#define UDMA_CHANNEL_SSI1RX 24
-#define UDMA_CHANNEL_SSI1TX 25
-#define UDMA_CHANNEL_I2S0RX 28
-#define UDMA_CHANNEL_I2S0TX 29
-#define UDMA_CHANNEL_SW 30
-
-//*****************************************************************************
-//
-// Flags to be OR'd with the channel ID to indicate if the primary or alternate
-// control structure should be used.
-//
-//*****************************************************************************
-#define UDMA_PRI_SELECT 0x00000000
-#define UDMA_ALT_SELECT 0x00000020
-
-//*****************************************************************************
-//
-// uDMA interrupt sources, to be passed to uDMAIntRegister() and
-// uDMAIntUnregister().
-//
-//*****************************************************************************
-#define UDMA_INT_SW 62
-#define UDMA_INT_ERR 63
-
-//*****************************************************************************
-//
-// Channel numbers to be passed to API functions that require a channel number
-// ID. These are for secondary peripheral assignments.
-//
-//*****************************************************************************
-#define UDMA_SEC_CHANNEL_UART2RX_0 \
- 0
-#define UDMA_SEC_CHANNEL_UART2TX_1 \
- 1
-#define UDMA_SEC_CHANNEL_TMR3A 2
-#define UDMA_SEC_CHANNEL_TMR3B 3
-#define UDMA_SEC_CHANNEL_TMR2A_4 \
- 4
-#define UDMA_SEC_CHANNEL_TMR2B_5 \
- 5
-#define UDMA_SEC_CHANNEL_TMR2A_6 \
- 6
-#define UDMA_SEC_CHANNEL_TMR2B_7 \
- 7
-#define UDMA_SEC_CHANNEL_UART1RX \
- 8
-#define UDMA_SEC_CHANNEL_UART1TX \
- 9
-#define UDMA_SEC_CHANNEL_SSI1RX 10
-#define UDMA_SEC_CHANNEL_SSI1TX 11
-#define UDMA_SEC_CHANNEL_UART2RX_12 \
- 12
-#define UDMA_SEC_CHANNEL_UART2TX_13 \
- 13
-#define UDMA_SEC_CHANNEL_TMR2A_14 \
- 14
-#define UDMA_SEC_CHANNEL_TMR2B_15 \
- 15
-#define UDMA_SEC_CHANNEL_TMR1A 18
-#define UDMA_SEC_CHANNEL_TMR1B 19
-#define UDMA_SEC_CHANNEL_EPI0RX 20
-#define UDMA_SEC_CHANNEL_EPI0TX 21
-#define UDMA_SEC_CHANNEL_ADC10 24
-#define UDMA_SEC_CHANNEL_ADC11 25
-#define UDMA_SEC_CHANNEL_ADC12 26
-#define UDMA_SEC_CHANNEL_ADC13 27
-#define UDMA_SEC_CHANNEL_SW 30
-
-//*****************************************************************************
-//
-// uDMA default/secondary peripheral selections, to be passed to
-// uDMAChannelSelectSecondary() and uDMAChannelSelectDefault().
-//
-//*****************************************************************************
-#define UDMA_DEF_USBEP1RX_SEC_UART2RX \
- 0x00000001
-#define UDMA_DEF_USBEP1TX_SEC_UART2TX \
- 0x00000002
-#define UDMA_DEF_USBEP2RX_SEC_TMR3A \
- 0x00000004
-#define UDMA_DEF_USBEP2TX_SEC_TMR3B \
- 0x00000008
-#define UDMA_DEF_USBEP3RX_SEC_TMR2A \
- 0x00000010
-#define UDMA_DEF_USBEP3TX_SEC_TMR2B \
- 0x00000020
-#define UDMA_DEF_ETH0RX_SEC_TMR2A \
- 0x00000040
-#define UDMA_DEF_ETH0TX_SEC_TMR2B \
- 0x00000080
-#define UDMA_DEF_UART0RX_SEC_UART1RX \
- 0x00000100
-#define UDMA_DEF_UART0TX_SEC_UART1TX \
- 0x00000200
-#define UDMA_DEF_SSI0RX_SEC_SSI1RX \
- 0x00000400
-#define UDMA_DEF_SSI0TX_SEC_SSI1TX \
- 0x00000800
-#define UDMA_DEF_RESERVED_SEC_UART2RX \
- 0x00001000
-#define UDMA_DEF_RESERVED_SEC_UART2TX \
- 0x00002000
-#define UDMA_DEF_ADC00_SEC_TMR2A \
- 0x00004000
-#define UDMA_DEF_ADC01_SEC_TMR2B \
- 0x00008000
-#define UDMA_DEF_ADC02_SEC_RESERVED \
- 0x00010000
-#define UDMA_DEF_ADC03_SEC_RESERVED \
- 0x00020000
-#define UDMA_DEF_TMR0A_SEC_TMR1A \
- 0x00040000
-#define UDMA_DEF_TMR0B_SEC_TMR1B \
- 0x00080000
-#define UDMA_DEF_TMR1A_SEC_EPI0RX \
- 0x00100000
-#define UDMA_DEF_TMR1B_SEC_EPI0TX \
- 0x00200000
-#define UDMA_DEF_UART1RX_SEC_RESERVED \
- 0x00400000
-#define UDMA_DEF_UART1TX_SEC_RESERVED \
- 0x00800000
-#define UDMA_DEF_SSI1RX_SEC_ADC10 \
- 0x01000000
-#define UDMA_DEF_SSI1TX_SEC_ADC11 \
- 0x02000000
-#define UDMA_DEF_RESERVED_SEC_ADC12 \
- 0x04000000
-#define UDMA_DEF_RESERVED_SEC_ADC13 \
- 0x08000000
-#define UDMA_DEF_I2S0RX_SEC_RESERVED \
- 0x10000000
-#define UDMA_DEF_I2S0TX_SEC_RESERVED \
- 0x20000000
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void uDMAEnable(void);
-extern void uDMADisable(void);
-extern unsigned long uDMAErrorStatusGet(void);
-extern void uDMAErrorStatusClear(void);
-extern void uDMAChannelEnable(unsigned long ulChannel);
-extern void uDMAChannelDisable(unsigned long ulChannel);
-extern tBoolean uDMAChannelIsEnabled(unsigned long ulChannel);
-extern void uDMAControlBaseSet(void *pControlTable);
-extern void *uDMAControlBaseGet(void);
-extern void uDMAChannelRequest(unsigned long ulChannel);
-extern void uDMAChannelAttributeEnable(unsigned long ulChannel,
- unsigned long ulAttr);
-extern void uDMAChannelAttributeDisable(unsigned long ulChannel,
- unsigned long ulAttr);
-extern unsigned long uDMAChannelAttributeGet(unsigned long ulChannel);
-extern void uDMAChannelControlSet(unsigned long ulChannel,
- unsigned long ulControl);
-extern void uDMAChannelTransferSet(unsigned long ulChannel,
- unsigned long ulMode, void *pvSrcAddr,
- void *pvDstAddr,
- unsigned long ulTransferSize);
-extern unsigned long uDMAChannelSizeGet(unsigned long ulChannel);
-extern unsigned long uDMAChannelModeGet(unsigned long ulChannel);
-extern void uDMAIntRegister(unsigned long ulIntChannel,
- void (*pfnHandler)(void));
-extern void uDMAIntUnregister(unsigned long ulIntChannel);
-extern void uDMAChannelSelectDefault(unsigned long ulDefPeriphs);
-extern void uDMAChannelSelectSecondary(unsigned long ulSecPeriphs);
-extern unsigned long uDMAIntStatus(void);
-extern void uDMAIntClear(unsigned long ulChanMask);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __UDMA_H__
diff --git a/bsp/lm3s/driverlib/usb.c b/bsp/lm3s/driverlib/usb.c
deleted file mode 100644
index b59be5115f5ab1000884fd942e4bc1783a75375a..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/usb.c
+++ /dev/null
@@ -1,3434 +0,0 @@
-//*****************************************************************************
-//
-// usb.c - Driver for the USB Interface.
-//
-// Copyright (c) 2007-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup usb_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "inc/hw_usb.h"
-#include "driverlib/debug.h"
-#include "driverlib/interrupt.h"
-#include "driverlib/udma.h"
-#include "driverlib/usb.h"
-
-//*****************************************************************************
-//
-// Amount to shift the RX interrupt sources by in the flags used in the
-// interrupt calls.
-//
-//*****************************************************************************
-#define USB_INT_RX_SHIFT 8
-
-//*****************************************************************************
-//
-// Amount to shift the status interrupt sources by in the flags used in the
-// interrupt calls.
-//
-//*****************************************************************************
-#define USB_INT_STATUS_SHIFT 24
-
-//*****************************************************************************
-//
-// Amount to shift the RX endpoint status sources by in the flags used in the
-// calls.
-//
-//*****************************************************************************
-#define USB_RX_EPSTATUS_SHIFT 16
-
-//*****************************************************************************
-//
-// Converts from an endpoint specifier to the offset of the endpoint's
-// control/status registers.
-//
-//*****************************************************************************
-#define EP_OFFSET(Endpoint) (Endpoint - 0x10)
-
-//*****************************************************************************
-//
-// Sets one of the indexed registers.
-//
-// \param ulBase specifies the USB module base address.
-// \param ulEndpoint is the endpoint index to target for this write.
-// \param ulIndexedReg is the indexed register to write to.
-// \param ucValue is the value to write to the register.
-//
-// This function is used to access the indexed registers for each endpoint.
-// The only registers that are indexed are the FIFO configuration registers
-// which are not used after configuration.
-//
-// \return None.
-//
-//*****************************************************************************
-static void
-USBIndexWrite(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulIndexedReg, unsigned long ulValue,
- unsigned long ulSize)
-{
- unsigned long ulIndex;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == 0) || (ulEndpoint == 1) || (ulEndpoint == 2) ||
- (ulEndpoint == 3));
- ASSERT((ulSize == 1) || (ulSize == 2));
-
- //
- // Save the old index in case it was in use.
- //
- ulIndex = HWREGB(ulBase + USB_O_EPIDX);
-
- //
- // Set the index.
- //
- HWREGB(ulBase + USB_O_EPIDX) = ulEndpoint;
-
- //
- // Determine the size of the register value.
- //
- if(ulSize == 1)
- {
- //
- // Set the value.
- //
- HWREGB(ulBase + ulIndexedReg) = ulValue;
- }
- else
- {
- //
- // Set the value.
- //
- HWREGH(ulBase + ulIndexedReg) = ulValue;
- }
-
- //
- // Restore the old index in case it was in use.
- //
- HWREGB(ulBase + USB_O_EPIDX) = ulIndex;
-}
-
-//*****************************************************************************
-//
-// Reads one of the indexed registers.
-//
-// \param ulBase specifies the USB module base address.
-// \param ulEndpoint is the endpoint index to target for this write.
-// \param ulIndexedReg is the indexed register to write to.
-//
-// This function is used interally to access the indexed registers for each
-// endpoint. The only registers that are indexed are the FIFO configuration
-// registers which are not used after configuration.
-//
-// \return The value in the register requested.
-//
-//*****************************************************************************
-static unsigned long
-USBIndexRead(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulIndexedReg, unsigned long ulSize)
-{
- unsigned char ulIndex;
- unsigned char ulValue;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == 0) || (ulEndpoint == 1) || (ulEndpoint == 2) ||
- (ulEndpoint == 3));
- ASSERT((ulSize == 1) || (ulSize == 2));
-
- //
- // Save the old index in case it was in use.
- //
- ulIndex = HWREGB(ulBase + USB_O_EPIDX);
-
- //
- // Set the index.
- //
- HWREGB(ulBase + USB_O_EPIDX) = ulEndpoint;
-
- //
- // Determine the size of the register value.
- //
- if(ulSize == 1)
- {
- //
- // Get the value.
- //
- ulValue = HWREGB(ulBase + ulIndexedReg);
- }
- else
- {
- //
- // Get the value.
- //
- ulValue = HWREGH(ulBase + ulIndexedReg);
- }
-
- //
- // Restore the old index in case it was in use.
- //
- HWREGB(ulBase + USB_O_EPIDX) = ulIndex;
-
- //
- // Return the register's value.
- //
- return(ulValue);
-}
-
-//*****************************************************************************
-//
-//! Puts the USB bus in a suspended state.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! When used in host mode, this function will put the USB bus in the suspended
-//! state.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostSuspend(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Send the suspend signaling to the USB bus.
- //
- HWREGB(ulBase + USB_O_POWER) |= USB_POWER_SUSPEND;
-}
-
-//*****************************************************************************
-//
-//! Handles the USB bus reset condition.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param bStart specifies whether to start or stop signaling reset on the USB
-//! bus.
-//!
-//! When this function is called with the \e bStart parameter set to \b true,
-//! this function will cause the start of a reset condition on the USB bus.
-//! The caller should then delay at least 20ms before calling this function
-//! again with the \e bStart parameter set to \b false.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostReset(unsigned long ulBase, tBoolean bStart)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Send a reset signal to the bus.
- //
- if(bStart)
- {
- HWREGB(ulBase + USB_O_POWER) |= USB_POWER_RESET;
- }
- else
- {
- HWREGB(ulBase + USB_O_POWER) &= ~USB_POWER_RESET;
- }
-}
-
-//*****************************************************************************
-//
-//! Handles the USB bus resume condition.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param bStart specifies if the USB controller is entering or leaving the
-//! resume signaling state.
-//!
-//! When in device mode this function will bring the USB controller out of the
-//! suspend state. This call should first be made with the \e bStart parameter
-//! set to \b true to start resume signaling. The device application should
-//! then delay at least 10ms but not more than 15ms before calling this
-//! function with the \e bStart parameter set to \b false.
-//!
-//! When in host mode this function will signal devices to leave the suspend
-//! state. This call should first be made with the \e bStart parameter set to
-//! \b true to start resume signaling. The host application should then delay
-//! at least 20ms before calling this function with the \e bStart parameter set
-//! to \b false. This will cause the controller to complete the resume
-//! signaling on the USB bus.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostResume(unsigned long ulBase, tBoolean bStart)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Send a resume signal to the bus.
- //
- if(bStart)
- {
- HWREGB(ulBase + USB_O_POWER) |= USB_POWER_RESUME;
- }
- else
- {
- HWREGB(ulBase + USB_O_POWER) &= ~USB_POWER_RESUME;
- }
-}
-
-//*****************************************************************************
-//
-//! Returns the current speed of the USB device connected.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function will return the current speed of the USB bus.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return Returns either \b USB_LOW_SPEED, \b USB_FULL_SPEED, or
-//! \b USB_UNDEF_SPEED.
-//
-//*****************************************************************************
-unsigned long
-USBHostSpeedGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // If the Full Speed device bit is set, then this is a full speed device.
- //
- if(HWREGB(ulBase + USB_O_DEVCTL) & USB_DEVCTL_FSDEV)
- {
- return(USB_FULL_SPEED);
- }
-
- //
- // If the Low Speed device bit is set, then this is a low speed device.
- //
- if(HWREGB(ulBase + USB_O_DEVCTL) & USB_DEVCTL_LSDEV)
- {
- return(USB_LOW_SPEED);
- }
-
- //
- // The device speed is not known.
- //
- return(USB_UNDEF_SPEED);
-}
-
-//*****************************************************************************
-//
-//! Returns the status of the USB interrupts.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function will read the source of the interrupt for the USB controller.
-//! There are three groups of interrupt sources, IN Endpoints, OUT Endpoints,
-//! and general status changes. This call will return the current status for
-//! all of these interrupts. The bit values returned should be compared
-//! against the \b USB_HOST_IN, \b USB_HOST_OUT, \b USB_HOST_EP0,
-//! \b USB_DEV_IN, \b USB_DEV_OUT, and \b USB_DEV_EP0 values.
-//!
-//! \note This call will clear the source of all of the general status
-//! interrupts.
-//!
-//! \return Returns the status of the sources for the USB controller's
-//! interrupt.
-//
-//*****************************************************************************
-unsigned long
-USBIntStatus(unsigned long ulBase)
-{
- unsigned long ulStatus;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Get the transmit interrupt status.
- //
- ulStatus = (HWREGH(ulBase + USB_O_TXIS));
-
- //
- // Get the receive interrupt status, these bits go into the second byte of
- // the returned value.
- //
- ulStatus |= (HWREGH(ulBase + USB_O_RXIS) << USB_INT_RX_SHIFT);
-
- //
- // Get the general interrupt status, these bits go into the upper 8 bits
- // of the returned value.
- //
- ulStatus |= (HWREGB(ulBase + USB_O_IS) << USB_INT_STATUS_SHIFT);
-
- //
- // Add the power fault status.
- //
- if(HWREG(ulBase + USB_O_EPCISC) & USB_EPCISC_PF)
- {
- //
- // Indicate a power fault was detected.
- //
- ulStatus |= USB_INT_POWER_FAULT;
-
- //
- // Clear the power fault interrupt.
- //
- HWREGB(ulBase + USB_O_EPCISC) |= USB_EPCISC_PF;
- }
-
- if(HWREG(USB0_BASE + USB_O_IDVISC) & USB_IDVRIS_ID)
- {
- //
- // Indicate a id detection was detected.
- //
- ulStatus |= USB_INT_MODE_DETECT;
-
- //
- // Clear the id detection interrupt.
- //
- HWREG(USB0_BASE + USB_O_IDVISC) |= USB_IDVRIS_ID;
- }
-
- //
- // Return the combined interrupt status.
- //
- return(ulStatus);
-}
-
-//*****************************************************************************
-//
-//! Disables the sources for USB interrupts.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulFlags specifies which interrupts to disable.
-//!
-//! This function will disable the USB controller from generating the
-//! interrupts indicated by the \e ulFlags parameter. There are three groups
-//! of interrupt sources, IN Endpoints, OUT Endpoints, and general status
-//! changes, specified by \b USB_INT_HOST_IN, \b USB_INT_HOST_OUT,
-//! \b USB_INT_DEV_IN, \b USB_INT_DEV_OUT, and \b USB_INT_STATUS. If
-//! \b USB_INT_ALL is specified then all interrupts will be disabled.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBIntDisable(unsigned long ulBase, unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulFlags & ~(USB_INT_ALL)) == 0);
-
- //
- // If any transmit interrupts were disabled then write the transmit
- // interrupt settings out to the hardware.
- //
- if(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0))
- {
- HWREGH(ulBase + USB_O_TXIE) &=
- ~(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0));
- }
-
- //
- // If any receive interrupts were disabled then write the receive interrupt
- // settings out to the hardware.
- //
- if(ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT))
- {
- HWREGH(ulBase + USB_O_RXIE) &=
- ~((ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT)) >>
- USB_INT_RX_SHIFT);
- }
-
- //
- // If any general interrupts were disabled then write the general interrupt
- // settings out to the hardware.
- //
- if(ulFlags & USB_INT_STATUS)
- {
- HWREGB(ulBase + USB_O_IE) &=
- ~((ulFlags & USB_INT_STATUS) >> USB_INT_STATUS_SHIFT);
- }
-
- //
- // Disable the power fault interrupt.
- //
- if(ulFlags & USB_INT_POWER_FAULT)
- {
- HWREG(ulBase + USB_O_EPCIM) = 0;
- }
-
- //
- // Disable the ID pin detect interrupt.
- //
- if(ulFlags & USB_INT_MODE_DETECT)
- {
- HWREG(USB0_BASE + USB_O_IDVIM) = 0;
- }
-}
-
-//*****************************************************************************
-//
-//! Enables the sources for USB interrupts.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulFlags specifies which interrupts to enable.
-//!
-//! This function will enable the USB controller's ability to generate the
-//! interrupts indicated by the \e ulFlags parameter. There are three
-//! groups of interrupt sources, IN Endpoints, OUT Endpoints, and
-//! general status changes, specified by \b USB_INT_HOST_IN,
-//! \b USB_INT_HOST_OUT, \b USB_INT_DEV_IN, \b USB_INT_DEV_OUT, and
-//! \b USB_STATUS. If \b USB_INT_ALL is specified then all interrupts will be
-//! enabled.
-//!
-//! \note A call must be made to enable the interrupt in the main interrupt
-//! controller to receive interrupts. The USBIntRegister() API performs this
-//! controller level interrupt enable. However if static interrupt handlers
-//! are used then then a call to IntEnable() must be made in order to allow any
-//! USB interrupts to occur.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBIntEnable(unsigned long ulBase, unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulFlags & (~USB_INT_ALL)) == 0);
-
- //
- // If any transmit interrupts were enabled then write the transmit
- // interrupt settings out to the hardware.
- //
- if(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0))
- {
- HWREGH(ulBase + USB_O_TXIE) |=
- ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0);
- }
-
- //
- // If any receive interrupts were enabled then write the receive interrupt
- // settings out to the hardware.
- //
- if(ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT))
- {
- HWREGH(ulBase + USB_O_RXIE) |=
- ((ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT)) >>
- USB_INT_RX_SHIFT);
- }
-
- //
- // If any general interrupts were enabled then write the general interrupt
- // settings out to the hardware.
- //
- if(ulFlags & USB_INT_STATUS)
- {
- HWREGB(ulBase + USB_O_IE) |=
- (ulFlags & USB_INT_STATUS) >> USB_INT_STATUS_SHIFT;
- }
-
- //
- // Enable the power fault interrupt.
- //
- if(ulFlags & USB_INT_POWER_FAULT)
- {
- HWREG(ulBase + USB_O_EPCIM) = USB_EPCIM_PF;
- }
-
- //
- // Enable the ID pin detect interrupt.
- //
- if(ulFlags & USB_INT_MODE_DETECT)
- {
- HWREG(USB0_BASE + USB_O_IDVIM) = USB_IDVIM_ID;
- }
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the USB controller.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param pfnHandler is a pointer to the function to be called when a USB
-//! interrupt occurs.
-//!
-//! This sets the handler to be called when a USB interrupt occurs. This will
-//! also enable the global USB interrupt in the interrupt controller. The
-//! specific desired USB interrupts must be enabled via a separate call to
-//! USBIntEnable(). It is the interrupt handler's responsibility to clear the
-//! interrupt sources via a call to USBIntStatus().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBIntRegister(unsigned long ulBase, void(*pfnHandler)(void))
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Register the interrupt handler.
- //
- IntRegister(INT_USB0, pfnHandler);
-
- //
- // Enable the USB interrupt.
- //
- IntEnable(INT_USB0);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the USB controller.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function unregister the interrupt handler. This function will also
-//! disable the USB interrupt in the interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering or
-//! unregistering interrupt handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBIntUnregister(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(INT_USB0);
-
- //
- // Disable the CAN interrupt.
- //
- IntDisable(INT_USB0);
-}
-
-//*****************************************************************************
-//
-//! Returns the current status of an endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//!
-//! This function will return the status of a given endpoint. If any of these
-//! status bits need to be cleared, then these these values must be cleared by
-//! calling the USBDevEndpointStatusClear() or USBHostEndpointStatusClear()
-//! functions.
-//!
-//! The following are the status flags for host mode:
-//!
-//! - \b USB_HOST_IN_PID_ERROR - PID error on the given endpoint.
-//! - \b USB_HOST_IN_NOT_COMP - The device failed to respond to an IN request.
-//! - \b USB_HOST_IN_STALL - A stall was received on an IN endpoint.
-//! - \b USB_HOST_IN_DATA_ERROR - There was a CRC or bit-stuff error on an IN
-//! endpoint in Isochronous mode.
-//! - \b USB_HOST_IN_NAK_TO - NAKs received on this IN endpoint for more than
-//! the specified timeout period.
-//! - \b USB_HOST_IN_ERROR - Failed to communicate with a device using this IN
-//! endpoint.
-//! - \b USB_HOST_IN_FIFO_FULL - This IN endpoint's FIFO is full.
-//! - \b USB_HOST_IN_PKTRDY - Data packet ready on this IN endpoint.
-//! - \b USB_HOST_OUT_NAK_TO - NAKs received on this OUT endpoint for more than
-//! the specified timeout period.
-//! - \b USB_HOST_OUT_NOT_COMP - The device failed to respond to an OUT
-//! request.
-//! - \b USB_HOST_OUT_STALL - A stall was received on this OUT endpoint.
-//! - \b USB_HOST_OUT_ERROR - Failed to communicate with a device using this
-//! OUT endpoint.
-//! - \b USB_HOST_OUT_FIFO_NE - This endpoint's OUT FIFO is not empty.
-//! - \b USB_HOST_OUT_PKTPEND - The data transfer on this OUT endpoint has not
-//! completed.
-//! - \b USB_HOST_EP0_NAK_TO - NAKs received on endpoint zero for more than the
-//! specified timeout period.
-//! - \b USB_HOST_EP0_ERROR - The device failed to respond to a request on
-//! endpoint zero.
-//! - \b USB_HOST_EP0_IN_STALL - A stall was received on endpoint zero for an
-//! IN transaction.
-//! - \b USB_HOST_EP0_IN_PKTRDY - Data packet ready on endpoint zero for an IN
-//! transaction.
-//!
-//! The following are the status flags for device mode:
-//!
-//! - \b USB_DEV_OUT_SENT_STALL - A stall was sent on this OUT endpoint.
-//! - \b USB_DEV_OUT_DATA_ERROR - There was a CRC or bit-stuff error on an OUT
-//! endpoint.
-//! - \b USB_DEV_OUT_OVERRUN - An OUT packet was not loaded due to a full FIFO.
-//! - \b USB_DEV_OUT_FIFO_FULL - The OUT endpoint's FIFO is full.
-//! - \b USB_DEV_OUT_PKTRDY - There is a data packet ready in the OUT
-//! endpoint's FIFO.
-//! - \b USB_DEV_IN_NOT_COMP - A larger packet was split up, more data to come.
-//! - \b USB_DEV_IN_SENT_STALL - A stall was sent on this IN endpoint.
-//! - \b USB_DEV_IN_UNDERRUN - Data was requested on the IN endpoint and no
-//! data was ready.
-//! - \b USB_DEV_IN_FIFO_NE - The IN endpoint's FIFO is not empty.
-//! - \b USB_DEV_IN_PKTPEND - The data transfer on this IN endpoint has not
-//! completed.
-//! - \b USB_DEV_EP0_SETUP_END - A control transaction ended before Data End
-//! condition was sent.
-//! - \b USB_DEV_EP0_SENT_STALL - A stall was sent on endpoint zero.
-//! - \b USB_DEV_EP0_IN_PKTPEND - The data transfer on endpoint zero has not
-//! completed.
-//! - \b USB_DEV_EP0_OUT_PKTRDY - There is a data packet ready in endpoint
-//! zero's OUT FIFO.
-//!
-//! \return The current status flags for the endpoint depending on mode.
-//
-//*****************************************************************************
-unsigned long
-USBEndpointStatus(unsigned long ulBase, unsigned long ulEndpoint)
-{
- unsigned long ulStatus;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Get the TX portion of the endpoint status.
- //
- ulStatus = HWREGH(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRL1);
-
- //
- // Get the RX portion of the endpoint status.
- //
- ulStatus |= ((HWREGH(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRL1)) <<
- USB_RX_EPSTATUS_SHIFT);
-
- //
- // Return the endpoint status.
- //
- return(ulStatus);
-}
-
-//*****************************************************************************
-//
-//! Clears the status bits in this endpoint in host mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFlags are the status bits that will be cleared.
-//!
-//! This function will clear the status of any bits that are passed in the
-//! \e ulFlags parameter. The \e ulFlags parameter can take the value returned
-//! from the USBEndpointStatus() call.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostEndpointStatusClear(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Clear the specified flags for the endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- HWREGB(ulBase + USB_O_CSRL0) &= ~ulFlags;
- }
- else
- {
- HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &= ~ulFlags;
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
- ~(ulFlags >> USB_RX_EPSTATUS_SHIFT);
- }
-}
-
-//*****************************************************************************
-//
-//! Clears the status bits in this endpoint in device mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFlags are the status bits that will be cleared.
-//!
-//! This function will clear the status of any bits that are passed in the
-//! \e ulFlags parameter. The \e ulFlags parameter can take the value returned
-//! from the USBEndpointStatus() call.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevEndpointStatusClear(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // If this is endpoint 0 then the bits have different meaning and map into
- // the TX memory location.
- //
- if(ulEndpoint == USB_EP_0)
- {
- //
- // Set the Serviced RxPktRdy bit to clear the RxPktRdy.
- //
- if(ulFlags & USB_DEV_EP0_OUT_PKTRDY)
- {
- HWREGB(ulBase + USB_O_CSRL0) |= USB_CSRL0_RXRDYC;
- }
-
- //
- // Set the serviced Setup End bit to clear the SetupEnd status.
- //
- if(ulFlags & USB_DEV_EP0_SETUP_END)
- {
- HWREGB(ulBase + USB_O_CSRL0) |= USB_CSRL0_SETENDC;
- }
-
- //
- // Clear the Sent Stall status flag.
- //
- if(ulFlags & USB_DEV_EP0_SENT_STALL)
- {
- HWREGB(ulBase + USB_O_CSRL0) &= ~(USB_DEV_EP0_SENT_STALL);
- }
- }
- else
- {
- //
- // Clear out any TX flags that were passed in. Only
- // USB_DEV_TX_SENT_STALL and USB_DEV_TX_UNDERRUN should be cleared.
- //
- HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &=
- ~(ulFlags & (USB_DEV_TX_SENT_STALL | USB_DEV_TX_UNDERRUN));
-
- //
- // Clear out valid RX flags that were passed in. Only
- // USB_DEV_RX_SENT_STALL, USB_DEV_RX_DATA_ERROR, and USB_DEV_RX_OVERRUN
- // should be cleared.
- //
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
- ~((ulFlags & (USB_DEV_RX_SENT_STALL | USB_DEV_RX_DATA_ERROR |
- USB_DEV_RX_OVERRUN)) >> USB_RX_EPSTATUS_SHIFT);
- }
-}
-
-//*****************************************************************************
-//
-//! Sets the value data toggle on an endpoint in host mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint specifies the endpoint to reset the data toggle.
-//! \param bDataToggle specifies whether to set the state to DATA0 or DATA1.
-//! \param ulFlags specifies whether to set the IN or OUT endpoint.
-//!
-//! This function is used to force the state of the data toggle in host mode.
-//! If the value passed in the \e bDataToggle parameter is \b false, then the
-//! data toggle will be set to the DATA0 state, and if it is \b true it will be
-//! set to the DATA1 state. The \e ulFlags parameter can be \b USB_EP_HOST_IN
-//! or \b USB_EP_HOST_OUT to access the desired portion of this endpoint. The
-//! \e ulFlags parameter is ignored for endpoint zero.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostEndpointDataToggle(unsigned long ulBase, unsigned long ulEndpoint,
- tBoolean bDataToggle, unsigned long ulFlags)
-{
- unsigned long ulDataToggle;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // The data toggle defaults to DATA0.
- //
- ulDataToggle = 0;
-
- //
- // See if the data toggle should be set to DATA1.
- //
- if(bDataToggle)
- {
- //
- // Select the data toggle bit based on the endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- ulDataToggle = USB_CSRH0_DT;
- }
- else if(ulFlags == USB_EP_HOST_IN)
- {
- ulDataToggle = USB_RXCSRH1_DT;
- }
- else
- {
- ulDataToggle = USB_TXCSRH1_DT;
- }
- }
-
- //
- // Set the data toggle based on the endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- //
- // Set the write enable and the bit value for endpoint zero.
- //
- HWREGB(ulBase + USB_O_CSRH0) =
- ((HWREGB(ulBase + USB_O_CSRH0) &
- ~(USB_CSRH0_DTWE | USB_CSRH0_DT)) |
- (ulDataToggle | USB_CSRH0_DTWE));
- }
- else if(ulFlags == USB_EP_HOST_IN)
- {
- //
- // Set the Write enable and the bit value for an IN endpoint.
- //
- HWREGB(ulBase + USB_O_RXCSRH1 + EP_OFFSET(ulEndpoint)) =
- ((HWREGB(ulBase + USB_O_RXCSRH1 + EP_OFFSET(ulEndpoint)) &
- ~(USB_RXCSRH1_DTWE | USB_RXCSRH1_DT)) |
- (ulDataToggle | USB_RXCSRH1_DTWE));
- }
- else
- {
- //
- // Set the Write enable and the bit value for an OUT endpoint.
- //
- HWREGB(ulBase + USB_O_TXCSRH1 + EP_OFFSET(ulEndpoint)) =
- ((HWREGB(ulBase + USB_O_TXCSRH1 + EP_OFFSET(ulEndpoint)) &
- ~(USB_TXCSRH1_DTWE | USB_TXCSRH1_DT)) |
- (ulDataToggle | USB_TXCSRH1_DTWE));
- }
-}
-
-//*****************************************************************************
-//
-//! Sets the Data toggle on an endpoint to zero.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint specifies the endpoint to reset the data toggle.
-//! \param ulFlags specifies whether to access the IN or OUT endpoint.
-//!
-//! This function will cause the controller to clear the data toggle for an
-//! endpoint. This call is not valid for endpoint zero and can be made with
-//! host or device controllers.
-//!
-//! The \e ulFlags parameter should be one of \b USB_EP_HOST_OUT,
-//! \b USB_EP_HOST_IN, \b USB_EP_DEV_OUT, or \b USB_EP_DEV_IN.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBEndpointDataToggleClear(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
- (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
- (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
- (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
- (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
- (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
- (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
- (ulEndpoint == USB_EP_15));
-
- //
- // See if the transmit or receive data toggle should be cleared.
- //
- if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
- {
- HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_TXCSRL1_CLRDT;
- }
- else
- {
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_RXCSRL1_CLRDT;
- }
-}
-
-//*****************************************************************************
-//
-//! Stalls the specified endpoint in device mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint specifies the endpoint to stall.
-//! \param ulFlags specifies whether to stall the IN or OUT endpoint.
-//!
-//! This function will cause to endpoint number passed in to go into a stall
-//! condition. If the \e ulFlags parameter is \b USB_EP_DEV_IN then the stall
-//! will be issued on the IN portion of this endpoint. If the \e ulFlags
-//! parameter is \b USB_EP_DEV_OUT then the stall will be issued on the OUT
-//! portion of this endpoint.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevEndpointStall(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulFlags & ~(USB_EP_DEV_IN | USB_EP_DEV_OUT)) == 0)
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Determine how to stall this endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- //
- // Perform a stall on endpoint zero.
- //
- HWREGB(ulBase + USB_O_CSRL0) |=
- (USB_CSRL0_STALL | USB_CSRL0_RXRDYC);
- }
- else if(ulFlags == USB_EP_DEV_IN)
- {
- //
- // Perform a stall on an IN endpoint.
- //
- HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_TXCSRL1_STALL;
- }
- else
- {
- //
- // Perform a stall on an OUT endpoint.
- //
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_RXCSRL1_STALL;
- }
-}
-
-//*****************************************************************************
-//
-//! Clears the stall condition on the specified endpoint in device mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint specifies which endpoint to remove the stall condition.
-//! \param ulFlags specifies whether to remove the stall condition from the IN
-//! or the OUT portion of this endpoint.
-//!
-//! This function will cause the endpoint number passed in to exit the stall
-//! condition. If the \e ulFlags parameter is \b USB_EP_DEV_IN then the stall
-//! will be cleared on the IN portion of this endpoint. If the \e ulFlags
-//! parameter is \b USB_EP_DEV_OUT then the stall will be cleared on the OUT
-//! portion of this endpoint.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevEndpointStallClear(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
- ASSERT((ulFlags & ~(USB_EP_DEV_IN | USB_EP_DEV_OUT)) == 0)
-
- //
- // Determine how to clear the stall on this endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- //
- // Clear the stall on endpoint zero.
- //
- HWREGB(ulBase + USB_O_CSRL0) &= ~USB_CSRL0_STALLED;
- }
- else if(ulFlags == USB_EP_DEV_IN)
- {
- //
- // Clear the stall on an IN endpoint.
- //
- HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &=
- ~(USB_TXCSRL1_STALL | USB_TXCSRL1_STALLED);
-
- //
- // Reset the data toggle.
- //
- HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_TXCSRL1_CLRDT;
- }
- else
- {
- //
- // Clear the stall on an OUT endpoint.
- //
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
- ~(USB_RXCSRL1_STALL | USB_RXCSRL1_STALLED);
-
- //
- // Reset the data toggle.
- //
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_TXCSRL1_CLRDT;
- }
-}
-
-//*****************************************************************************
-//
-//! Connects the USB controller to the bus in device mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function will cause the soft connect feature of the USB controller to
-//! be enabled. Call USBDisconnect() to remove the USB device from the bus.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevConnect(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Enable connection to the USB bus.
- //
- HWREGB(ulBase + USB_O_POWER) |= USB_POWER_SOFTCONN;
-}
-
-//*****************************************************************************
-//
-//! Removes the USB controller from the bus in device mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function will cause the soft connect feature of the USB controller to
-//! remove the device from the USB bus. A call to USBDevConnect() is needed to
-//! reconnect to the bus.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevDisconnect(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Disable connection to the USB bus.
- //
- HWREGB(ulBase + USB_O_POWER) &= (~USB_POWER_SOFTCONN);
-}
-
-//*****************************************************************************
-//
-//! Sets the address in device mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulAddress is the address to use for a device.
-//!
-//! This function will set the device address on the USB bus. This address was
-//! likely received via a SET ADDRESS command from the host controller.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevAddrSet(unsigned long ulBase, unsigned long ulAddress)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Set the function address in the correct location.
- //
- HWREGB(ulBase + USB_O_FADDR) = (unsigned char)ulAddress;
-}
-
-//*****************************************************************************
-//
-//! Returns the current device address in device mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function will return the current device address. This address was set
-//! by a call to USBDevAddrSet().
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return The current device address.
-//
-//*****************************************************************************
-unsigned long
-USBDevAddrGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Return the function address.
- //
- return(HWREGB(ulBase + USB_O_FADDR));
-}
-
-//*****************************************************************************
-//
-//! Sets the base configuration for a host endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulMaxPayload is the maximum payload for this endpoint.
-//! \param ulNAKPollInterval is the either the NAK timeout limit or the polling
-//! interval depending on the type of endpoint.
-//! \param ulTargetEndpoint is the endpoint that the host endpoint is
-//! targeting.
-//! \param ulFlags are used to configure other endpoint settings.
-//!
-//! This function will set the basic configuration for the transmit or receive
-//! portion of an endpoint in host mode. The \e ulFlags parameter determines
-//! some of the configuration while the other parameters provide the rest. The
-//! \e ulFlags parameter determines whether this is an IN endpoint
-//! (USB_EP_HOST_IN or USB_EP_DEV_IN) or an OUT endpoint (USB_EP_HOST_OUT or
-//! USB_EP_DEV_OUT), whether this is a Full speed endpoint (USB_EP_SPEED_FULL)
-//! or a Low speed endpoint (USB_EP_SPEED_LOW).
-//!
-//! The \b USB_EP_MODE_ flags control the type of the endpoint.
-//! - \b USB_EP_MODE_CTRL is a control endpoint.
-//! - \b USB_EP_MODE_ISOC is an isochronous endpoint.
-//! - \b USB_EP_MODE_BULK is a bulk endpoint.
-//! - \b USB_EP_MODE_INT is an interrupt endpoint.
-//!
-//! The \e ulNAKPollInterval parameter has different meanings based on the
-//! \b USB_EP_MODE value and whether or not this call is being made for
-//! endpoint zero or another endpoint. For endpoint zero or any Bulk
-//! endpoints, this value always indicates the number of frames to allow a
-//! device to NAK before considering it a timeout. If this endpoint is an
-//! isochronous or interrupt endpoint, this value is the polling interval for
-//! this endpoint.
-//!
-//! For interrupt endpoints the polling interval is simply the number of
-//! frames between polling an interrupt endpoint. For isochronous endpoints
-//! this value represents a polling interval of 2 ^ (\e ulNAKPollInterval - 1)
-//! frames. When used as a NAK timeout, the \e ulNAKPollInterval value
-//! specifies 2 ^ (\e ulNAKPollInterval - 1) frames before issuing a time out.
-//! There are two special time out values that can be specified when setting
-//! the \e ulNAKPollInterval value. The first is \b MAX_NAK_LIMIT which is the
-//! maximum value that can be passed in this variable. The other is
-//! \b DISABLE_NAK_LIMIT which indicates that there should be no limit on the
-//! number of NAKs.
-//!
-//! The \b USB_EP_DMA_MODE_ flags enables the type of DMA used to access the
-//! endpoint's data FIFOs. The choice of the DMA mode depends on how the DMA
-//! controller is configured and how it is being used. See the ``Using USB
-//! with the uDMA Controller'' section for more information on DMA
-//! configuration.
-//!
-//! When configuring the OUT portion of an endpoint, the \b USB_EP_AUTO_SET bit
-//! is specified to cause the transmission of data on the USB bus to start
-//! as soon as the number of bytes specified by \e ulMaxPayload have been
-//! written into the OUT FIFO for this endpoint.
-//!
-//! When configuring the IN portion of an endpoint, the \b USB_EP_AUTO_REQUEST
-//! bit can be specified to trigger the request for more data once the FIFO has
-//! been drained enough to fit \e ulMaxPayload bytes. The \b USB_EP_AUTO_CLEAR
-//! bit can be used to clear the data packet ready flag automatically once the
-//! data has been read from the FIFO. If this is not used, this flag must be
-//! manually cleared via a call to USBDevEndpointStatusClear() or
-//! USBHostEndpointStatusClear().
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostEndpointConfig(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulMaxPayload,
- unsigned long ulNAKPollInterval,
- unsigned long ulTargetEndpoint, unsigned long ulFlags)
-{
- unsigned long ulRegister;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
- ASSERT(ulNAKPollInterval <= MAX_NAK_LIMIT);
-
- //
- // Endpoint zero is configured differently than the other endpoints, so see
- // if this is endpoint zero.
- //
- if(ulEndpoint == USB_EP_0)
- {
- //
- // Set the NAK timeout.
- //
- HWREGB(ulBase + USB_O_NAKLMT) = ulNAKPollInterval;
-
- //
- // Set the transfer type information.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TYPE0) =
- ((ulFlags & USB_EP_SPEED_FULL) ? USB_TYPE0_SPEED_FULL :
- USB_TYPE0_SPEED_LOW);
- }
- else
- {
- //
- // Start with the target endpoint.
- //
- ulRegister = ulTargetEndpoint;
-
- //
- // Set the speed for the device using this endpoint.
- //
- if(ulFlags & USB_EP_SPEED_FULL)
- {
- ulRegister |= USB_TXTYPE1_SPEED_FULL;
- }
- else
- {
- ulRegister |= USB_TXTYPE1_SPEED_LOW;
- }
-
- //
- // Set the protocol for the device using this endpoint.
- //
- switch(ulFlags & USB_EP_MODE_MASK)
- {
- //
- // The bulk protocol is being used.
- //
- case USB_EP_MODE_BULK:
- {
- ulRegister |= USB_TXTYPE1_PROTO_BULK;
- break;
- }
-
- //
- // The isochronous protocol is being used.
- //
- case USB_EP_MODE_ISOC:
- {
- ulRegister |= USB_TXTYPE1_PROTO_ISOC;
- break;
- }
-
- //
- // The interrupt protocol is being used.
- //
- case USB_EP_MODE_INT:
- {
- ulRegister |= USB_TXTYPE1_PROTO_INT;
- break;
- }
-
- //
- // The control protocol is being used.
- //
- case USB_EP_MODE_CTRL:
- {
- ulRegister |= USB_TXTYPE1_PROTO_CTRL;
- break;
- }
- }
-
- //
- // See if the transmit or receive endpoint is being configured.
- //
- if(ulFlags & USB_EP_HOST_OUT)
- {
- //
- // Set the transfer type information.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXTYPE1) =
- ulRegister;
-
- //
- // Set the NAK timeout or polling interval.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXINTERVAL1) =
- ulNAKPollInterval;
-
- //
- // Set the Maximum Payload per transaction.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXMAXP1) =
- ulMaxPayload;
-
- //
- // Set the transmit control value to zero.
- //
- ulRegister = 0;
-
- //
- // Allow auto setting of TxPktRdy when max packet size has been
- // loaded into the FIFO.
- //
- if(ulFlags & USB_EP_AUTO_SET)
- {
- ulRegister |= USB_TXCSRH1_AUTOSET;
- }
-
- //
- // Configure the DMA Mode.
- //
- if(ulFlags & USB_EP_DMA_MODE_1)
- {
- ulRegister |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
- }
- else if(ulFlags & USB_EP_DMA_MODE_0)
- {
- ulRegister |= USB_TXCSRH1_DMAEN;
- }
-
- //
- // Write out the transmit control value.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) =
- (unsigned char)ulRegister;
- }
- else
- {
- //
- // Set the transfer type information.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXTYPE1) =
- ulRegister;
-
- //
- // Set the NAK timeout or polling interval.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXINTERVAL1) =
- ulNAKPollInterval;
-
- //
- // Set the receive control value to zero.
- //
- ulRegister = 0;
-
- //
- // Allow auto clearing of RxPktRdy when packet of size max packet
- // has been unloaded from the FIFO.
- //
- if(ulFlags & USB_EP_AUTO_CLEAR)
- {
- ulRegister |= USB_RXCSRH1_AUTOCL;
- }
-
- //
- // Configure the DMA Mode.
- //
- if(ulFlags & USB_EP_DMA_MODE_1)
- {
- ulRegister |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
- }
- else if(ulFlags & USB_EP_DMA_MODE_0)
- {
- ulRegister |= USB_RXCSRH1_DMAEN;
- }
-
- //
- // Write out the receive control value.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) =
- (unsigned char)ulRegister;
- }
- }
-}
-
-//*****************************************************************************
-//
-//! Sets the configuration for an endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulMaxPacketSize is the maximum packet size for this endpoint.
-//! \param ulFlags are used to configure other endpoint settings.
-//!
-//! This function will set the basic configuration for an endpoint in device
-//! mode. Endpoint zero does not have a dynamic configuration, so this
-//! function should not be called for endpoint zero. The \e ulFlags parameter
-//! determines some of the configuration while the other parameters provide the
-//! rest.
-//!
-//! The \b USB_EP_MODE_ flags define what the type is for the given endpoint.
-//!
-//! - \b USB_EP_MODE_CTRL is a control endpoint.
-//! - \b USB_EP_MODE_ISOC is an isochronous endpoint.
-//! - \b USB_EP_MODE_BULK is a bulk endpoint.
-//! - \b USB_EP_MODE_INT is an interrupt endpoint.
-//!
-//! The \b USB_EP_DMA_MODE_ flags determines the type of DMA access to the
-//! endpoint data FIFOs. The choice of the DMA mode depends on how the DMA
-//! controller is configured and how it is being used. See the ``Using USB
-//! with the uDMA Controller'' section for more information on DMA
-//! configuration.
-//!
-//! When configuring an IN endpoint, the \b USB_EP_AUTO_SET bit can be
-//! specified to cause the automatic transmission of data on the USB bus as
-//! soon as \e ulMaxPacketSize bytes of data are written into the FIFO for
-//! this endpoint. This is commonly used with DMA as no interaction is
-//! required to start the transmission of data.
-//!
-//! When configuring an OUT endpoint, the \b USB_EP_AUTO_REQUEST bit is
-//! specified to trigger the request for more data once the FIFO has been
-//! drained enough to receive \e ulMaxPacketSize more bytes of data. Also for
-//! OUT endpoints, the \b USB_EP_AUTO_CLEAR bit can be used to clear the data
-//! packet ready flag automatically once the data has been read from the FIFO.
-//! If this is not used, this flag must be manually cleared via a call to
-//! USBDevEndpointStatusClear(). Both of these settings can be used to remove
-//! the need for extra calls when using the controller in DMA mode.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevEndpointConfig(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulMaxPacketSize, unsigned long ulFlags)
-{
- unsigned long ulRegister;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
- (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
- (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
- (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
- (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
- (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
- (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
- (ulEndpoint == USB_EP_15));
-
- //
- // Determine if a transmit or receive endpoint is being configured.
- //
- if(ulFlags & USB_EP_DEV_IN)
- {
- //
- // Set the maximum packet size.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXMAXP1) =
- ulMaxPacketSize;
-
- //
- // The transmit control value is zero unless options are enabled.
- //
- ulRegister = 0;
-
- //
- // Allow auto setting of TxPktRdy when max packet size has been loaded
- // into the FIFO.
- //
- if(ulFlags & USB_EP_AUTO_SET)
- {
- ulRegister |= USB_TXCSRH1_AUTOSET;
- }
-
- //
- // Configure the DMA mode.
- //
- if(ulFlags & USB_EP_DMA_MODE_1)
- {
- ulRegister |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
- }
- else if(ulFlags & USB_EP_DMA_MODE_0)
- {
- ulRegister |= USB_TXCSRH1_DMAEN;
- }
-
- //
- // Enable isochronous mode if requested.
- //
- if((ulFlags & USB_EP_MODE_MASK) == USB_EP_MODE_ISOC)
- {
- ulRegister |= USB_TXCSRH1_ISO;
- }
-
- //
- // Write the transmit control value.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) =
- (unsigned char)ulRegister;
-
- //
- // Reset the Data toggle to zero.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRL1) =
- USB_TXCSRL1_CLRDT;
- }
- else
- {
- //
- // Set the MaxPacketSize.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXMAXP1) =
- ulMaxPacketSize;
-
- //
- // The receive control value is zero unless options are enabled.
- //
- ulRegister = 0;
-
- //
- // Allow auto clearing of RxPktRdy when packet of size max packet
- // has been unloaded from the FIFO.
- //
- if(ulFlags & USB_EP_AUTO_CLEAR)
- {
- ulRegister = USB_RXCSRH1_AUTOCL;
- }
-
- //
- // Configure the DMA mode.
- //
- if(ulFlags & USB_EP_DMA_MODE_1)
- {
- ulRegister |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
- }
- else if(ulFlags & USB_EP_DMA_MODE_0)
- {
- ulRegister |= USB_RXCSRH1_DMAEN;
- }
-
- //
- // Enable isochronous mode if requested.
- //
- if(USB_EP_MODE_ISOC & (ulFlags & USB_EP_MODE_MASK))
- {
- ulRegister |= USB_RXCSRH1_ISO;
- }
-
- //
- // Write the receive control value.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) =
- (unsigned char)ulRegister;
-
- //
- // Reset the Data toggle to zero.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRL1) =
- USB_RXCSRL1_CLRDT;
- }
-}
-
-//*****************************************************************************
-//
-//! Gets the current configuration for an endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param pulMaxPacketSize is a pointer which will be written with the
-//! maximum packet size for this endpoint.
-//! \param pulFlags is a pointer which will be written with the current
-//! endpoint settings. On entry to the function, this pointer must contain
-//! either \b USB_EP_DEV_IN or \b USB_EP_DEV_OUT to indicate whether the IN or
-//! OUT endpoint is to be queried.
-//!
-//! This function will return the basic configuration for an endpoint in device
-//! mode. The values returned in \e *pulMaxPacketSize and \e *pulFlags are
-//! equivalent to the \e ulMaxPacketSize and \e ulFlags previously passed to
-//! USBDevEndpointConfig for this endpoint.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevEndpointConfigGet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long *pulMaxPacketSize,
- unsigned long *pulFlags)
-{
- unsigned long ulRegister;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT(pulMaxPacketSize && pulFlags);
- ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
- (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
- (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
- (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
- (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
- (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
- (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
- (ulEndpoint == USB_EP_15));
-
- //
- // Determine if a transmit or receive endpoint is being queried.
- //
- if(*pulFlags & USB_EP_DEV_IN)
- {
- //
- // Clear the flags other than the direction bit.
- //
- *pulFlags = USB_EP_DEV_IN;
-
- //
- // Get the maximum packet size.
- //
- *pulMaxPacketSize = (unsigned long)HWREGB(ulBase +
- EP_OFFSET(ulEndpoint) +
- USB_O_TXMAXP1);
-
- //
- // Get the current transmit control register value.
- //
- ulRegister = (unsigned long)HWREGB(ulBase + EP_OFFSET(ulEndpoint) +
- USB_O_TXCSRH1);
-
- //
- // Are we allowing auto setting of TxPktRdy when max packet size has
- // been loaded into the FIFO?
- //
- if(ulRegister & USB_TXCSRH1_AUTOSET)
- {
- *pulFlags |= USB_EP_AUTO_SET;
- }
-
- //
- // Get the DMA mode.
- //
- if(ulRegister & USB_TXCSRH1_DMAEN)
- {
- if(ulRegister & USB_TXCSRH1_DMAMOD)
- {
- *pulFlags |= USB_EP_DMA_MODE_1;
- }
- else
- {
- *pulFlags |= USB_EP_DMA_MODE_0;
- }
- }
-
- //
- // Are we in isochronous mode?
- //
- if(ulRegister & USB_TXCSRH1_ISO)
- {
- *pulFlags |= USB_EP_MODE_ISOC;
- }
- else
- {
- //
- // The hardware doesn't differentiate between bulk, interrupt
- // and control mode for the endpoint so we just set something
- // that isn't isochronous. This ensures that anyone modifying
- // the returned flags in preparation for a call to
- // USBDevEndpointConfig will not see an unexpected mode change.
- // If they decode the returned mode, however, they may be in for
- // a surprise.
- //
- *pulFlags |= USB_EP_MODE_BULK;
- }
- }
- else
- {
- //
- // Clear the flags other than the direction bit.
- //
- *pulFlags = USB_EP_DEV_OUT;
-
- //
- // Get the MaxPacketSize.
- //
- *pulMaxPacketSize = (unsigned long)HWREGB(ulBase +
- EP_OFFSET(ulEndpoint) +
- USB_O_RXMAXP1);
-
- //
- // Get the current receive control register value.
- //
- ulRegister = (unsigned long)HWREGB(ulBase + EP_OFFSET(ulEndpoint) +
- USB_O_RXCSRH1);
-
- //
- // Are we allowing auto clearing of RxPktRdy when packet of size max
- // packet has been unloaded from the FIFO?
- //
- if(ulRegister & USB_RXCSRH1_AUTOCL)
- {
- *pulFlags |= USB_EP_AUTO_CLEAR;
- }
-
- //
- // Get the DMA mode.
- //
- if(ulRegister & USB_RXCSRH1_DMAEN)
- {
- if(ulRegister & USB_RXCSRH1_DMAMOD)
- {
- *pulFlags |= USB_EP_DMA_MODE_1;
- }
- else
- {
- *pulFlags |= USB_EP_DMA_MODE_0;
- }
- }
-
- //
- // Are we in isochronous mode?
- //
- if(ulRegister & USB_RXCSRH1_ISO)
- {
- *pulFlags |= USB_EP_MODE_ISOC;
- }
- else
- {
- //
- // The hardware doesn't differentiate between bulk, interrupt
- // and control mode for the endpoint so we just set something
- // that isn't isochronous. This ensures that anyone modifying
- // the returned flags in preparation for a call to
- // USBDevEndpointConfig will not see an unexpected mode change.
- // If they decode the returned mode, however, they may be in for
- // a surprise.
- //
- *pulFlags |= USB_EP_MODE_BULK;
- }
- }
-}
-
-//*****************************************************************************
-//
-//! Sets the FIFO configuration for an endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFIFOAddress is the starting address for the FIFO.
-//! \param ulFIFOSize is the size of the FIFO in bytes.
-//! \param ulFlags specifies what information to set in the FIFO configuration.
-//!
-//! This function will set the starting FIFO RAM address and size of the FIFO
-//! for a given endpoint. Endpoint zero does not have a dynamically
-//! configurable FIFO so this function should not be called for endpoint zero.
-//! The \e ulFIFOSize parameter should be one of the values in the
-//! \b USB_FIFO_SZ_ values. If the endpoint is going to use double buffering
-//! it should use the values with the \b _DB at the end of the value. For
-//! example, use \b USB_FIFO_SZ_16_DB to configure an endpoint to have a 16
-//! byte double buffered FIFO. If a double buffered FIFO is used, then the
-//! actual size of the FIFO will be twice the size indicated by the
-//! \e ulFIFOSize parameter. This means that the \b USB_FIFO_SZ_16_DB value
-//! will use 32 bytes of the USB controller's FIFO memory.
-//!
-//! The \e ulFIFOAddress value should be a multiple of 8 bytes and directly
-//! indicates the starting address in the USB controller's FIFO RAM. For
-//! example, a value of 64 indicates that the FIFO should start 64 bytes into
-//! the USB controller's FIFO memory. The \e ulFlags value specifies whether
-//! the endpoint's OUT or IN FIFO should be configured. If in host mode, use
-//! \b USB_EP_HOST_OUT or \b USB_EP_HOST_IN, and if in device mode use
-//! \b USB_EP_DEV_OUT or \b USB_EP_DEV_IN.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBFIFOConfigSet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFIFOAddress, unsigned long ulFIFOSize,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
- (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
- (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
- (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
- (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
- (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
- (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
- (ulEndpoint == USB_EP_15));
-
- //
- // See if the transmit or receive FIFO is being configured.
- //
- if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
- {
- //
- // Set the transmit FIFO location and size for this endpoint.
- //
- USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_TXFIFOSZ, ulFIFOSize, 1);
- USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_TXFIFOADD,
- ulFIFOAddress >> 3, 2);
- }
- else
- {
- //
- // Set the receive FIFO location and size for this endpoint.
- //
- USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_RXFIFOSZ, ulFIFOSize, 1);
- USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_RXFIFOADD,
- ulFIFOAddress >> 3, 2);
- }
-}
-
-//*****************************************************************************
-//
-//! Returns the FIFO configuration for an endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param pulFIFOAddress is the starting address for the FIFO.
-//! \param pulFIFOSize is the size of the FIFO in bytes.
-//! \param ulFlags specifies what information to retrieve from the FIFO
-//! configuration.
-//!
-//! This function will return the starting address and size of the FIFO for a
-//! given endpoint. Endpoint zero does not have a dynamically configurable
-//! FIFO so this function should not be called for endpoint zero. The
-//! \e ulFlags parameter specifies whether the endpoint's OUT or IN FIFO should
-//! be read. If in host mode, the \e ulFlags parameter should be
-//! \b USB_EP_HOST_OUT or \b USB_EP_HOST_IN, and if in device mode the
-//! \e ulFlags parameter should be either \b USB_EP_DEV_OUT or
-//! \b USB_EP_DEV_IN.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBFIFOConfigGet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long *pulFIFOAddress, unsigned long *pulFIFOSize,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
- (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
- (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
- (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
- (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
- (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
- (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
- (ulEndpoint == USB_EP_15));
-
- //
- // See if the transmit or receive FIFO is being configured.
- //
- if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
- {
- //
- // Get the transmit FIFO location and size for this endpoint.
- //
- *pulFIFOAddress = (USBIndexRead(ulBase, ulEndpoint >> 4,
- (unsigned long)USB_O_TXFIFOADD,
- 2)) << 3;
- *pulFIFOSize = USBIndexRead(ulBase, ulEndpoint >> 4,
- (unsigned long)USB_O_TXFIFOSZ, 1);
-
- }
- else
- {
- //
- // Get the receive FIFO location and size for this endpoint.
- //
- *pulFIFOAddress = (USBIndexRead(ulBase, ulEndpoint >> 4,
- (unsigned long)USB_O_RXFIFOADD,
- 2)) << 3;
- *pulFIFOSize = USBIndexRead(ulBase, ulEndpoint >> 4,
- (unsigned long)USB_O_RXFIFOSZ, 1);
- }
-}
-
-//*****************************************************************************
-//
-//! Enable DMA on a given endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFlags specifies which direction and what mode to use when enabling
-//! DMA.
-//!
-//! This function will enable DMA on a given endpoint and set the mode according
-//! to the values in the \e ulFlags parameter. The \e ulFlags parameter should
-//! have \b USB_EP_DEV_IN or \b USB_EP_DEV_OUT set.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBEndpointDMAEnable(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // See if the transmit DMA is being enabled.
- //
- if(ulFlags & USB_EP_DEV_IN)
- {
- //
- // Enable DMA on this end point.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) |=
- USB_TXCSRH1_DMAEN;
- }
-
- //
- // See if the receive DMA is being enabled.
- //
- if(ulFlags & USB_EP_DEV_OUT)
- {
- //
- // Enable DMA on this end point.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) |=
- USB_RXCSRH1_DMAEN;
- }
-}
-
-//*****************************************************************************
-//
-//! Disable DMA on a given endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFlags specifies which direction to disable.
-//!
-//! This function will disable DMA on a given end point to allow non-DMA
-//! USB transactions to generate interrupts normally. The ulFlags should be
-//! \b USB_EP_DEV_IN or \b USB_EP_DEV_OUT all other bits are ignored.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBEndpointDMADisable(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // If this was a reques to disable DMA on the IN portion of the end point
- // then handle it.
- //
- if(ulFlags & USB_EP_DEV_IN)
- {
- //
- // Just disable DMA leave the mode setting.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) &=
- ~USB_TXCSRH1_DMAEN;
- }
-
- //
- // If this was a request to disable DMA on the OUT portion of the end point
- // then handle it.
- //
- if(ulFlags & USB_EP_DEV_OUT)
- {
- //
- // Just disable DMA leave the mode setting.
- //
- HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) &=
- ~USB_RXCSRH1_DMAEN;
- }
-}
-
-//*****************************************************************************
-//
-//! Determine the number of bytes of data available in a given endpoint's FIFO.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//!
-//! This function will return the number of bytes of data currently available
-//! in the FIFO for the given receive (OUT) endpoint. It may be used prior to
-//! calling USBEndpointDataGet() to determine the size of buffer required to
-//! hold the newly-received packet.
-//!
-//! \return This call will return the number of bytes available in a given
-//! endpoint FIFO.
-//
-//*****************************************************************************
-unsigned long
-USBEndpointDataAvail(unsigned long ulBase, unsigned long ulEndpoint)
-{
- unsigned long ulRegister;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Get the address of the receive status register to use, based on the
- // endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- ulRegister = USB_O_CSRL0;
- }
- else
- {
- ulRegister = USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint);
- }
-
- //
- // Is there a packet ready in the FIFO?
- //
- if((HWREGH(ulBase + ulRegister) & USB_CSRL0_RXRDY) == 0)
- {
- return(0);
- }
-
- //
- // Return the byte count in the FIFO.
- //
- return(HWREGH(ulBase + USB_O_COUNT0 + ulEndpoint));
-}
-
-//*****************************************************************************
-//
-//! Retrieves data from the given endpoint's FIFO.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param pucData is a pointer to the data area used to return the data from
-//! the FIFO.
-//! \param pulSize is initially the size of the buffer passed into this call
-//! via the \e pucData parameter. It will be set to the amount of data
-//! returned in the buffer.
-//!
-//! This function will return the data from the FIFO for the given endpoint.
-//! The \e pulSize parameter should indicate the size of the buffer passed in
-//! the \e pulData parameter. The data in the \e pulSize parameter will be
-//! changed to match the amount of data returned in the \e pucData parameter.
-//! If a zero byte packet was received this call will not return a error but
-//! will instead just return a zero in the \e pulSize parameter. The only
-//! error case occurs when there is no data packet available.
-//!
-//! \return This call will return 0, or -1 if no packet was received.
-//
-//*****************************************************************************
-long
-USBEndpointDataGet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned char *pucData, unsigned long *pulSize)
-{
- unsigned long ulRegister, ulByteCount, ulFIFO;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Get the address of the receive status register to use, based on the
- // endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- ulRegister = USB_O_CSRL0;
- }
- else
- {
- ulRegister = USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint);
- }
-
- //
- // Don't allow reading of data if the RxPktRdy bit is not set.
- //
- if((HWREGH(ulBase + ulRegister) & USB_CSRL0_RXRDY) == 0)
- {
- //
- // Can't read the data because none is available.
- //
- *pulSize = 0;
-
- //
- // Return a failure since there is no data to read.
- //
- return(-1);
- }
-
- //
- // Get the byte count in the FIFO.
- //
- ulByteCount = HWREGH(ulBase + USB_O_COUNT0 + ulEndpoint);
-
- //
- // Determine how many bytes we will actually copy.
- //
- ulByteCount = (ulByteCount < *pulSize) ? ulByteCount : *pulSize;
-
- //
- // Return the number of bytes we are going to read.
- //
- *pulSize = ulByteCount;
-
- //
- // Calculate the FIFO address.
- //
- ulFIFO = ulBase + USB_O_FIFO0 + (ulEndpoint >> 2);
-
- //
- // Read the data out of the FIFO.
- //
- for(; ulByteCount > 0; ulByteCount--)
- {
- //
- // Read a byte at a time from the FIFO.
- //
- *pucData++ = HWREGB(ulFIFO);
- }
-
- //
- // Success.
- //
- return(0);
-}
-
-//*****************************************************************************
-//
-//! Acknowledge that data was read from the given endpoint's FIFO in device
-//! mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param bIsLastPacket indicates if this is the last packet.
-//!
-//! This function acknowledges that the data was read from the endpoint's FIFO.
-//! The \e bIsLastPacket parameter is set to a \b true value if this is the
-//! last in a series of data packets on endpoint zero. The \e bIsLastPacket
-//! parameter is not used for endpoints other than endpoint zero. This call
-//! can be used if processing is required between reading the data and
-//! acknowledging that the data has been read.
-//!
-//! \note This function should only be called in device mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBDevEndpointDataAck(unsigned long ulBase, unsigned long ulEndpoint,
- tBoolean bIsLastPacket)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Determine which endpoint is being acked.
- //
- if(ulEndpoint == USB_EP_0)
- {
- //
- // Clear RxPktRdy, and optionally DataEnd, on endpoint zero.
- //
- HWREGB(ulBase + USB_O_CSRL0) =
- USB_CSRL0_RXRDYC | (bIsLastPacket ? USB_CSRL0_DATAEND : 0);
- }
- else
- {
- //
- // Clear RxPktRdy on all other endpoints.
- //
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
- ~(USB_RXCSRL1_RXRDY);
- }
-}
-
-//*****************************************************************************
-//
-//! Acknowledge that data was read from the given endpoint's FIFO in host
-//! mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//!
-//! This function acknowledges that the data was read from the endpoint's FIFO.
-//! This call is used if processing is required between reading the data and
-//! acknowledging that the data has been read.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostEndpointDataAck(unsigned long ulBase, unsigned long ulEndpoint)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Clear RxPktRdy.
- //
- if(ulEndpoint == USB_EP_0)
- {
- HWREGB(ulBase + USB_O_CSRL0) &= ~USB_CSRL0_RXRDY;
- }
- else
- {
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
- ~(USB_RXCSRL1_RXRDY);
- }
-}
-
-//*****************************************************************************
-//
-//! Puts data into the given endpoint's FIFO.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param pucData is a pointer to the data area used as the source for the
-//! data to put into the FIFO.
-//! \param ulSize is the amount of data to put into the FIFO.
-//!
-//! This function will put the data from the \e pucData parameter into the FIFO
-//! for this endpoint. If a packet is already pending for transmission then
-//! this call will not put any of the data into the FIFO and will return -1.
-//! Care should be taken to not write more data than can fit into the FIFO
-//! allocated by the call to USBFIFOConfig().
-//!
-//! \return This call will return 0 on success, or -1 to indicate that the FIFO
-//! is in use and cannot be written.
-//
-//*****************************************************************************
-long
-USBEndpointDataPut(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned char *pucData, unsigned long ulSize)
-{
- unsigned long ulFIFO;
- unsigned char ucTxPktRdy;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Get the bit position of TxPktRdy based on the endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- ucTxPktRdy = USB_CSRL0_TXRDY;
- }
- else
- {
- ucTxPktRdy = USB_TXCSRL1_TXRDY;
- }
-
- //
- // Don't allow transmit of data if the TxPktRdy bit is already set.
- //
- if(HWREGB(ulBase + USB_O_CSRL0 + ulEndpoint) & ucTxPktRdy)
- {
- return(-1);
- }
-
- //
- // Calculate the FIFO address.
- //
- ulFIFO = ulBase + USB_O_FIFO0 + (ulEndpoint >> 2);
-
- //
- // Write the data to the FIFO.
- //
- for(; ulSize > 0; ulSize--)
- {
- HWREGB(ulFIFO) = *pucData++;
- }
-
- //
- // Success.
- //
- return(0);
-}
-
-//*****************************************************************************
-//
-//! Starts the transfer of data from an endpoint's FIFO.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulTransType is set to indicate what type of data is being sent.
-//!
-//! This function will start the transfer of data from the FIFO for a given
-//! endpoint. This is necessary if the \b USB_EP_AUTO_SET bit was not enabled
-//! for the endpoint. Setting the \e ulTransType parameter will allow the
-//! appropriate signaling on the USB bus for the type of transaction being
-//! requested. The \e ulTransType parameter should be one of the following:
-//!
-//! - USB_TRANS_OUT for OUT transaction on any endpoint in host mode.
-//! - USB_TRANS_IN for IN transaction on any endpoint in device mode.
-//! - USB_TRANS_IN_LAST for the last IN transactions on endpoint zero in a
-//! sequence of IN transactions.
-//! - USB_TRANS_SETUP for setup transactions on endpoint zero.
-//! - USB_TRANS_STATUS for status results on endpoint zero.
-//!
-//! \return This call will return 0 on success, or -1 if a transmission is
-//! already in progress.
-//
-//*****************************************************************************
-long
-USBEndpointDataSend(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulTransType)
-{
- unsigned long ulTxPktRdy;
-
- //
- // CHeck the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Get the bit position of TxPktRdy based on the endpoint.
- //
- if(ulEndpoint == USB_EP_0)
- {
- ulTxPktRdy = ulTransType & 0xff;
- }
- else
- {
- ulTxPktRdy = (ulTransType >> 8) & 0xff;
- }
-
- //
- // Don't allow transmit of data if the TxPktRdy bit is already set.
- //
- if(HWREGB(ulBase + USB_O_CSRL0 + ulEndpoint) & USB_CSRL0_TXRDY)
- {
- return(-1);
- }
-
- //
- // Set TxPktRdy in order to send the data.
- //
- HWREGB(ulBase + USB_O_CSRL0 + ulEndpoint) = ulTxPktRdy;
-
- //
- // Success.
- //
- return(0);
-}
-
-//*****************************************************************************
-//
-//! Forces a flush of an endpoint's FIFO.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFlags specifies if the IN or OUT endpoint should be accessed.
-//!
-//! This function will force the controller to flush out the data in the FIFO.
-//! The function can be called with either host or device controllers and
-//! requires the \e ulFlags parameter be one of \b USB_EP_HOST_OUT,
-//! \b USB_EP_HOST_IN, \b USB_EP_DEV_OUT, or \b USB_EP_DEV_IN.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBFIFOFlush(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Endpoint zero has a different register set for FIFO flushing.
- //
- if(ulEndpoint == USB_EP_0)
- {
- //
- // Nothing in the FIFO if neither of these bits are set.
- //
- if((HWREGB(ulBase + USB_O_CSRL0) &
- (USB_CSRL0_RXRDY | USB_CSRL0_TXRDY)) != 0)
- {
- //
- // Hit the Flush FIFO bit.
- //
- HWREGB(ulBase + USB_O_CSRH0) = USB_CSRH0_FLUSH;
- }
- }
- else
- {
- //
- // Only reset the IN or OUT FIFO.
- //
- if(ulFlags & (USB_EP_HOST_IN | USB_EP_DEV_OUT))
- {
- //
- // Nothing in the FIFO if neither of these bits are set.
- //
- if((HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &
- USB_RXCSRL1_RXRDY) == 0)
- {
- //
- // Hit the Flush FIFO bit.
- //
- HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_RXCSRL1_FLUSH;
- }
- }
- else
- {
- if((HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &
- USB_TXCSRL1_TXRDY) == 0)
- {
- //
- // Hit the Flush FIFO bit.
- //
- HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
- USB_TXCSRL1_FLUSH;
- }
- }
- }
-}
-
-//*****************************************************************************
-//
-//! Schedules a request for an IN transaction on an endpoint in host mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//!
-//! This function will schedule a request for an IN transaction. When the USB
-//! device being communicated with responds the data, the data can be retrieved
-//! by calling USBEndpointDataGet() or via a DMA transfer.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostRequestIN(unsigned long ulBase, unsigned long ulEndpoint)
-{
- unsigned long ulRegister;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // Endpoint zero uses a different offset than the other endpoints.
- //
- if(ulEndpoint == USB_EP_0)
- {
- ulRegister = USB_O_CSRL0;
- }
- else
- {
- ulRegister = USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint);
- }
-
- //
- // Set the request for an IN transaction.
- //
- HWREGB(ulBase + ulRegister) = USB_RXCSRL1_REQPKT;
-}
-
-//*****************************************************************************
-//
-//! Issues a request for a status IN transaction on endpoint zero.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function is used to cause a request for an status IN transaction from
-//! a device on endpoint zero. This function can only be used with endpoint
-//! zero as that is the only control endpoint that supports this ability. This
-//! is used to complete the last phase of a control transaction to a device and
-//! an interrupt will be signaled when the status packet has been received.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostRequestStatus(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Set the request for a status IN transaction.
- //
- HWREGB(ulBase + USB_O_CSRL0) = USB_CSRL0_REQPKT | USB_CSRL0_STATUS;
-}
-
-//*****************************************************************************
-//
-//! Sets the functional address for the device that is connected to an
-//! endpoint in host mode.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulAddr is the functional address for the controller to use for this
-//! endpoint.
-//! \param ulFlags determines if this is an IN or an OUT endpoint.
-//!
-//! This function will set the functional address for a device that is using
-//! this endpoint for communication. This \e ulAddr parameter is the address
-//! of the target device that this endpoint will be used to communicate with.
-//! The \e ulFlags parameter indicates if the IN or OUT endpoint should be set.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostAddrSet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulAddr, unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // See if the transmit or receive address should be set.
- //
- if(ulFlags & USB_EP_HOST_OUT)
- {
- //
- // Set the transmit address.
- //
- HWREGB(ulBase + USB_O_TXFUNCADDR0 + (ulEndpoint >> 1)) = ulAddr;
- }
- else
- {
- //
- // Set the receive address.
- //
- HWREGB(ulBase + USB_O_TXFUNCADDR0 + 4 + (ulEndpoint >> 1)) = ulAddr;
- }
-}
-
-//*****************************************************************************
-//
-//! Gets the current functional device address for an endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFlags determines if this is an IN or an OUT endpoint.
-//!
-//! This function returns the current functional address that an endpoint is
-//! using to communicate with a device. The \e ulFlags parameter determines if
-//! the IN or OUT endpoint's device address is returned.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return Returns the current function address being used by an endpoint.
-//
-//*****************************************************************************
-unsigned long
-USBHostAddrGet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // See if the transmit or receive address should be returned.
- //
- if(ulFlags & USB_EP_HOST_OUT)
- {
- //
- // Return this endpoint's transmit address.
- //
- return(HWREGB(ulBase + USB_O_TXFUNCADDR0 + (ulEndpoint >> 1)));
- }
- else
- {
- //
- // Return this endpoint's receive address.
- //
- return(HWREGB(ulBase + USB_O_TXFUNCADDR0 + 4 + (ulEndpoint >> 1)));
- }
-}
-
-//*****************************************************************************
-//
-//! Set the hub address for the device that is connected to an endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulAddr is the hub address for the device using this endpoint.
-//! \param ulFlags determines if this is an IN or an OUT endpoint.
-//!
-//! This function will set the hub address for a device that is using this
-//! endpoint for communication. The \e ulFlags parameter determines if the
-//! device address for the IN or the OUT endpoint is set by this call.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostHubAddrSet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulAddr, unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // See if the hub transmit or receive address is being set.
- //
- if(ulFlags & USB_EP_HOST_OUT)
- {
- //
- // Set the hub transmit address for this endpoint.
- //
- HWREGB(ulBase + USB_O_TXHUBADDR0 + (ulEndpoint >> 1)) = ulAddr;
- }
- else
- {
- //
- // Set the hub receive address for this endpoint.
- //
- HWREGB(ulBase + USB_O_TXHUBADDR0 + 4 + (ulEndpoint >> 1)) = ulAddr;
- }
-}
-
-//*****************************************************************************
-//
-//! Get the current device hub address for this endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint is the endpoint to access.
-//! \param ulFlags determines if this is an IN or an OUT endpoint.
-//!
-//! This function will return the current hub address that an endpoint is using
-//! to communicate with a device. The \e ulFlags parameter determines if the
-//! device address for the IN or OUT endpoint is returned.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return This function returns the current hub address being used by an
-//! endpoint.
-//
-//*****************************************************************************
-unsigned long
-USBHostHubAddrGet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
- (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
- (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
- (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
- (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
- (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
- (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
- (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
-
- //
- // See if the hub transmit or receive address should be returned.
- //
- if(ulFlags & USB_EP_HOST_OUT)
- {
- //
- // Return the hub transmit address for this endpoint.
- //
- return(HWREGB(ulBase + USB_O_TXHUBADDR0 + (ulEndpoint >> 1)));
- }
- else
- {
- //
- // Return the hub receive address for this endpoint.
- //
- return(HWREGB(ulBase + USB_O_TXHUBADDR0 + 4 + (ulEndpoint >> 1)));
- }
-}
-
-//*****************************************************************************
-//
-//! Sets the configuration for USB power fault.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulFlags specifies the configuration of the power fault.
-//!
-//! This function will set the behavior of the USB controller during a power
-//! fault and the behavior of the USBPEN pin. The flags specify the power
-//! fault level sensitivity, the power fault action, and the power enable level
-//! and source. One of the following can be selected as the power fault level
-//! sensitivity:
-//!
-//! - \b USB_HOST_PWRFLT_LOW - Power fault is indicated by the pin being driven
-//! low.
-//! - \b USB_HOST_PWRFLT_HIGH - Power fault is indicated by the pin being
-//! driven! high.
-//!
-//! One of the following can be selected as the power fault action:
-//!
-//! - \b USB_HOST_PWRFLT_EP_NONE - No automatic action when power fault
-//! detected.
-//! - \b USB_HOST_PWRFLT_EP_TRI - Automatically Tri-state the USBEPEN pin on a
-//! power fault.
-//! - \b USB_HOST_PWRFLT_EP_LOW - Automatically drive USBEPEN pin low on a
-//! power fault.
-//! - \b USB_HOST_PWRFLT_EP_HIGH - Automatically drive USBEPEN pin high on a
-//! power fault.
-//!
-//! One of the following can be selected as the power enable level and source:
-//!
-//! - \b USB_HOST_PWREN_LOW - USBEPEN is driven low when power is enabled.
-//! - \b USB_HOST_PWREN_HIGH - USBEPEN is driven high when power is enabled.
-//! - \b USB_HOST_PWREN_VBLOW - USBEPEN is driven high when VBUS is low.
-//! - \b USB_HOST_PWREN_VBHIGH - USBEPEN is driven high when VBUS is high.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostPwrFaultConfig(unsigned long ulBase, unsigned long ulFlags)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulFlags & ~(USB_EPC_PFLTACT_M | USB_EPC_PFLTAEN |
- USB_EPC_PFLTSEN_HIGH | USB_EPC_EPEN_M)) == 0);
-
- //
- // Set the power fault configuration as specified. This will not change
- // whether fault detection is enabled or not.
- //
- HWREGH(ulBase + USB_O_EPC) =
- (ulFlags | (HWREGH(ulBase + USB_O_EPC) &
- ~(USB_EPC_PFLTACT_M | USB_EPC_PFLTAEN |
- USB_EPC_PFLTSEN_HIGH | USB_EPC_EPEN_M)));
-}
-
-//*****************************************************************************
-//
-//! Enables power fault detection.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function enables power fault detection in the USB controller. If the
-//! USBPFLT pin is not in use this function should not be used.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostPwrFaultEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Enable power fault input.
- //
- HWREGH(ulBase + USB_O_EPC) |= USB_EPC_PFLTEN;
-}
-
-//*****************************************************************************
-//
-//! Disables power fault detection.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function disables power fault detection in the USB controller.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostPwrFaultDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Enable power fault input.
- //
- HWREGH(ulBase + USB_O_EPC) &= ~USB_EPC_PFLTEN;
-}
-
-//*****************************************************************************
-//
-//! Enables the external power pin.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function enables the USBEPEN signal to enable an external power supply
-//! in host mode operation.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostPwrEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Enable the external power suppply enable signal.
- //
- HWREGH(ulBase + USB_O_EPC) |= USB_EPC_EPENDE;
-}
-
-//*****************************************************************************
-//
-//! Disables the external power pin.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function disables the USBEPEN signal to disable an external power
-//! supply in host mode operation.
-//!
-//! \note This function should only be called in host mode.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostPwrDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Disable the external power supply enable signal.
- //
- HWREGH(ulBase + USB_O_EPC) &= ~USB_EPC_EPENDE;
-}
-
-//*****************************************************************************
-//
-//! Get the current frame number.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function returns the last frame number received.
-//!
-//! \return The last frame number received.
-//
-//*****************************************************************************
-unsigned long
-USBFrameNumberGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Return the most recent frame number.
- //
- return(HWREGH(ulBase + USB_O_FRAME));
-}
-
-//*****************************************************************************
-//
-//! Starts or ends a session.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param bStart specifies if this call starts or ends a session.
-//!
-//! This function is used in OTG mode to start a session request or end a
-//! session. If the \e bStart parameter is set to \b true, then this function
-//! start a session and if it is \b false it will end a session.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBOTGSessionRequest(unsigned long ulBase, tBoolean bStart)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Start or end the session as directed.
- //
- if(bStart)
- {
- HWREGB(ulBase + USB_O_DEVCTL) |= USB_DEVCTL_SESSION;
- }
- else
- {
- HWREGB(ulBase + USB_O_DEVCTL) &= ~USB_DEVCTL_SESSION;
- }
-}
-
-//*****************************************************************************
-//
-//! Returns the absolute FIFO address for a given endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint specifies which endpoint's FIFO address to return.
-//!
-//! This function returns the actual physical address of the FIFO. This is
-//! needed when the USB is going to be used with the uDMA controller and the
-//! source or destination address needs to be set to the physical FIFO address
-//! for a given endpoint.
-//!
-//! \return None.
-//
-//*****************************************************************************
-unsigned long
-USBFIFOAddrGet(unsigned long ulBase, unsigned long ulEndpoint)
-{
- //
- // Return the FIFO address for this endpoint.
- //
- return(ulBase + USB_O_FIFO0 + (ulEndpoint >> 2));
-}
-
-//*****************************************************************************
-//
-//! Returns the current operating mode of the controller.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function returns the current operating mode on USB controllers with
-//! OTG or Dual mode functionality.
-//!
-//! For OTG controllers:
-//!
-//! The function will return on of the following values on OTG controllers:
-//! \b USB_OTG_MODE_ASIDE_HOST, \b USB_OTG_MODE_ASIDE_DEV,
-//! \b USB_OTG_MODE_BSIDE_HOST, \b USB_OTG_MODE_BSIDE_DEV,
-//! \b USB_OTG_MODE_NONE.
-//!
-//! \b USB_OTG_MODE_ASIDE_HOST indicates that the controller is in host mode
-//! on the A-side of the cable.
-//!
-//! \b USB_OTG_MODE_ASIDE_DEV indicates that the controller is in device mode
-//! on the A-side of the cable.
-//!
-//! \b USB_OTG_MODE_BSIDE_HOST indicates that the controller is in host mode
-//! on the B-side of the cable.
-//!
-//! \b USB_OTG_MODE_BSIDE_DEV indicates that the controller is in device mode
-//! on the B-side of the cable. If and OTG session request is started with no
-//! cable in place this is the default mode for the controller.
-//!
-//! \b USB_OTG_MODE_NONE indicates that the controller is not attempting to
-//! determine its role in the system.
-//!
-//! For Dual Mode controllers:
-//!
-//! The function will return on of the following values:
-//! \b USB_DUAL_MODE_HOST, \b USB_DUAL_MODE_DEVICE, or
-//! \b USB_DUAL_MODE_NONE.
-//!
-//! \b USB_DUAL_MODE_HOST indicates that the controller is acting as a host.
-//!
-//! \b USB_DUAL_MODE_DEVICE indicates that the controller acting as a device.
-//!
-//! \b USB_DUAL_MODE_NONE indicates that the controller is not active as
-//! either a host or device.
-//!
-//! \return Returns \b USB_OTG_MODE_ASIDE_HOST, \b USB_OTG_MODE_ASIDE_DEV,
-//! \b USB_OTG_MODE_BSIDE_HOST, \b USB_OTG_MODE_BSIDE_DEV,
-//! \b USB_OTG_MODE_NONE, \b USB_DUAL_MODE_HOST, \b USB_DUAL_MODE_DEVICE, or
-//! \b USB_DUAL_MODE_NONE.
-//
-//*****************************************************************************
-unsigned long
-USBModeGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Checks the current mode in the USB_O_DEVCTL and returns the current
- // mode.
- //
- // USB_OTG_MODE_ASIDE_HOST: USB_DEVCTL_HOST | USB_DEVCTL_SESSION
- // USB_OTG_MODE_ASIDE_DEV: USB_DEVCTL_SESSION
- // USB_OTG_MODE_BSIDE_HOST: USB_DEVCTL_DEV | USB_DEVCTL_SESSION |
- // USB_DEVCTL_HOST
- // USB_OTG_MODE_BSIDE_DEV: USB_DEVCTL_DEV | USB_DEVCTL_SESSION
- // USB_OTG_MODE_NONE: USB_DEVCTL_DEV
- //
- return(HWREGB(ulBase + USB_O_DEVCTL) &
- (USB_DEVCTL_DEV | USB_DEVCTL_HOST | USB_DEVCTL_SESSION |
- USB_DEVCTL_VBUS_M));
-}
-
-//*****************************************************************************
-//
-//! Sets the DMA channel to use for a given endpoint.
-//!
-//! \param ulBase specifies the USB module base address.
-//! \param ulEndpoint specifies which endpoint's FIFO address to return.
-//! \param ulChannel specifies which DMA channel to use for which endpoint.
-//!
-//! This function is used to configure which DMA channel to use with a given
-//! endpoint. Receive DMA channels can only be used with receive endpoints
-//! and transmit DMA channels can only be used with transmit endpoints. This
-//! allows the 3 receive and 3 transmit DMA channels to be mapped to any
-//! endpoint other than 0. The values that should be passed into the \e
-//! ulChannel value are the UDMA_CHANNEL_USBEP* values defined in udma.h.
-//!
-//! \note This function only has an effect on microcontrollers that have the
-//! ability to change the DMA channel for an endpoint. Calling this function
-//! on other devices will have no effect.
-//!
-//! \return None.
-//!
-//*****************************************************************************
-void
-USBEndpointDMAChannel(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulChannel)
-{
- unsigned long ulMask;
-
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
- ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
- (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
- (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
- (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
- (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
- (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
- (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
- (ulEndpoint == USB_EP_15));
- ASSERT(ulChannel <= UDMA_CHANNEL_USBEP3TX);
-
- //
- // The input select mask needs to be shifted into the correct position
- // based on the channel.
- //
- ulMask = 0xf << (ulChannel * 4);
-
- //
- // Clear out the current selection for the channel.
- //
- ulMask = HWREG(ulBase + USB_O_EPS) & (~ulMask);
-
- //
- // The input select is now shifted into the correct position based on the
- // channel.
- //
- ulMask |= (USB_EP_TO_INDEX(ulEndpoint)) << (ulChannel * 4);
-
- //
- // Write the value out to the register.
- //
- HWREG(ulBase + USB_O_EPS) = ulMask;
-}
-
-//*****************************************************************************
-//
-//! Change the mode of the USB controller to host.
-//!
-//! \param ulBase specifies the USB module base address.
-//!
-//! This function changes the mode of the USB controller to host mode. This
-//! is only valid on microcontrollers that have the host and device
-//! capabilities and not the OTG capabilities.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-USBHostMode(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT(ulBase == USB0_BASE);
-
- //
- // Set the USB controller mode to host.
- //
- HWREGB(ulBase + USB_O_GPCS) &= ~(USB_GPCS_DEVMOD);
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/usb.h b/bsp/lm3s/driverlib/usb.h
deleted file mode 100644
index 7cc8ec9924d558488f877588c5ea8c3c41ada34c..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/usb.h
+++ /dev/null
@@ -1,433 +0,0 @@
-//*****************************************************************************
-//
-// usb.h - Prototypes for the USB Interface Driver.
-//
-// Copyright (c) 2007-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __USB_H__
-#define __USB_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following are values that can be passed to USBIntEnable(),
-// USBIntDisable(), and USBIntClear() as the ulIntFlags parameter, and which
-// are returned from USBIntStatus().
-//
-//*****************************************************************************
-#define USB_INT_ALL 0xFF030E0F // All Interrupt sources
-#define USB_INT_STATUS 0xFF000000 // Status Interrupts
-#define USB_INT_VBUS_ERR 0x80000000 // VBUS Error
-#define USB_INT_SESSION_START 0x40000000 // Session Start Detected
-#define USB_INT_SESSION_END 0x20000000 // Session End Detected
-#define USB_INT_DISCONNECT 0x20000000 // Disconnect Detected
-#define USB_INT_CONNECT 0x10000000 // Device Connect Detected
-#define USB_INT_SOF 0x08000000 // Start of Frame Detected
-#define USB_INT_BABBLE 0x04000000 // Babble signaled
-#define USB_INT_RESET 0x04000000 // Reset signaled
-#define USB_INT_RESUME 0x02000000 // Resume detected
-#define USB_INT_SUSPEND 0x01000000 // Suspend detected
-#define USB_INT_MODE_DETECT 0x00020000 // Mode value valid
-#define USB_INT_POWER_FAULT 0x00010000 // Power Fault detected
-#define USB_INT_HOST_IN 0x00000E00 // Host IN Interrupts
-#define USB_INT_DEV_OUT 0x00000E00 // Device OUT Interrupts
-#define USB_INT_HOST_IN_EP3 0x00000800 // Endpoint 3 Host IN Interrupt
-#define USB_INT_HOST_IN_EP2 0x00000400 // Endpoint 2 Host IN Interrupt
-#define USB_INT_HOST_IN_EP1 0x00000200 // Endpoint 1 Host IN Interrupt
-#define USB_INT_DEV_OUT_EP3 0x00000800 // Endpoint 3 Device OUT Interrupt
-#define USB_INT_DEV_OUT_EP2 0x00000400 // Endpoint 2 Device OUT Interrupt
-#define USB_INT_DEV_OUT_EP1 0x00000200 // Endpoint 1 Device OUT Interrupt
-#define USB_INT_HOST_OUT 0x0000000E // Host OUT Interrupts
-#define USB_INT_DEV_IN 0x0000000E // Device IN Interrupts
-#define USB_INT_HOST_OUT_EP3 0x00000008 // Endpoint 3 HOST_OUT Interrupt
-#define USB_INT_HOST_OUT_EP2 0x00000004 // Endpoint 2 HOST_OUT Interrupt
-#define USB_INT_HOST_OUT_EP1 0x00000002 // Endpoint 1 HOST_OUT Interrupt
-#define USB_INT_DEV_IN_EP3 0x00000008 // Endpoint 3 DEV_IN Interrupt
-#define USB_INT_DEV_IN_EP2 0x00000004 // Endpoint 2 DEV_IN Interrupt
-#define USB_INT_DEV_IN_EP1 0x00000002 // Endpoint 1 DEV_IN Interrupt
-#define USB_INT_EP0 0x00000001 // Endpoint 0 Interrupt
-
-//*****************************************************************************
-//
-// The following are values that are returned from USBSpeedGet().
-//
-//*****************************************************************************
-#define USB_UNDEF_SPEED 0x80000000 // Current speed is undefined
-#define USB_FULL_SPEED 0x00000001 // Current speed is Full Speed
-#define USB_LOW_SPEED 0x00000000 // Current speed is Low Speed
-
-//*****************************************************************************
-//
-// The following are values that are returned from USBEndpointStatus(). The
-// USB_HOST_* values are used when the USB controller is in host mode and the
-// USB_DEV_* values are used when the USB controller is in device mode.
-//
-//*****************************************************************************
-#define USB_HOST_IN_PID_ERROR 0x01000000 // Stall on this endpoint received
-#define USB_HOST_IN_NOT_COMP 0x00100000 // Device failed to respond
-#define USB_HOST_IN_STALL 0x00400000 // Stall on this endpoint received
-#define USB_HOST_IN_DATA_ERROR 0x00080000 // CRC or bit-stuff error
- // (ISOC Mode)
-#define USB_HOST_IN_NAK_TO 0x00080000 // NAK received for more than the
- // specified timeout period
-#define USB_HOST_IN_ERROR 0x00040000 // Failed to communicate with a
- // device
-#define USB_HOST_IN_FIFO_FULL 0x00020000 // RX FIFO full
-#define USB_HOST_IN_PKTRDY 0x00010000 // Data packet ready
-#define USB_HOST_OUT_NAK_TO 0x00000080 // NAK received for more than the
- // specified timeout period
-#define USB_HOST_OUT_NOT_COMP 0x00000080 // No response from device
- // (ISOC mode)
-#define USB_HOST_OUT_STALL 0x00000020 // Stall on this endpoint received
-#define USB_HOST_OUT_ERROR 0x00000004 // Failed to communicate with a
- // device
-#define USB_HOST_OUT_FIFO_NE 0x00000002 // TX FIFO is not empty
-#define USB_HOST_OUT_PKTPEND 0x00000001 // Transmit still being transmitted
-#define USB_HOST_EP0_NAK_TO 0x00000080 // NAK received for more than the
- // specified timeout period
-#define USB_HOST_EP0_STATUS 0x00000040 // This was a status packet
-#define USB_HOST_EP0_ERROR 0x00000010 // Failed to communicate with a
- // device
-#define USB_HOST_EP0_RX_STALL 0x00000004 // Stall on this endpoint received
-#define USB_HOST_EP0_RXPKTRDY 0x00000001 // Receive data packet ready
-#define USB_DEV_RX_SENT_STALL 0x00400000 // Stall was sent on this endpoint
-#define USB_DEV_RX_DATA_ERROR 0x00080000 // CRC error on the data
-#define USB_DEV_RX_OVERRUN 0x00040000 // OUT packet was not loaded due to
- // a full FIFO
-#define USB_DEV_RX_FIFO_FULL 0x00020000 // RX FIFO full
-#define USB_DEV_RX_PKT_RDY 0x00010000 // Data packet ready
-#define USB_DEV_TX_NOT_COMP 0x00000080 // Large packet split up, more data
- // to come
-#define USB_DEV_TX_SENT_STALL 0x00000020 // Stall was sent on this endpoint
-#define USB_DEV_TX_UNDERRUN 0x00000004 // IN received with no data ready
-#define USB_DEV_TX_FIFO_NE 0x00000002 // The TX FIFO is not empty
-#define USB_DEV_TX_TXPKTRDY 0x00000001 // Transmit still being transmitted
-#define USB_DEV_EP0_SETUP_END 0x00000010 // Control transaction ended before
- // Data End seen
-#define USB_DEV_EP0_SENT_STALL 0x00000004 // Stall was sent on this endpoint
-#define USB_DEV_EP0_IN_PKTPEND 0x00000002 // Transmit data packet pending
-#define USB_DEV_EP0_OUT_PKTRDY 0x00000001 // Receive data packet ready
-
-//*****************************************************************************
-//
-// The following are values that can be passed to USBHostEndpointConfig() and
-// USBDevEndpointConfig() as the ulFlags parameter.
-//
-//*****************************************************************************
-#define USB_EP_AUTO_SET 0x00000001 // Auto set feature enabled
-#define USB_EP_AUTO_REQUEST 0x00000002 // Auto request feature enabled
-#define USB_EP_AUTO_CLEAR 0x00000004 // Auto clear feature enabled
-#define USB_EP_DMA_MODE_0 0x00000008 // Enable DMA access using mode 0
-#define USB_EP_DMA_MODE_1 0x00000010 // Enable DMA access using mode 1
-#define USB_EP_MODE_ISOC 0x00000000 // Isochronous endpoint
-#define USB_EP_MODE_BULK 0x00000100 // Bulk endpoint
-#define USB_EP_MODE_INT 0x00000200 // Interrupt endpoint
-#define USB_EP_MODE_CTRL 0x00000300 // Control endpoint
-#define USB_EP_MODE_MASK 0x00000300 // Mode Mask
-#define USB_EP_SPEED_LOW 0x00000000 // Low Speed
-#define USB_EP_SPEED_FULL 0x00001000 // Full Speed
-#define USB_EP_HOST_EP0 0x00002000 // Host endpoint 0
-#define USB_EP_HOST_IN 0x00001000 // Host IN endpoint
-#define USB_EP_HOST_OUT 0x00002000 // Host OUT endpoint
-#define USB_EP_DEV_EP0 0x00002000 // Device endpoint 0
-#define USB_EP_DEV_IN 0x00002000 // Device IN endpoint
-#define USB_EP_DEV_OUT 0x00001000 // Device OUT endpoint
-
-//*****************************************************************************
-//
-// The following are values that can be passed to USBHostPwrFaultConfig() as
-// the ulFlags parameter.
-//
-//*****************************************************************************
-#define USB_HOST_PWRFLT_LOW 0x00000010
-#define USB_HOST_PWRFLT_HIGH 0x00000030
-#define USB_HOST_PWRFLT_EP_NONE 0x00000000
-#define USB_HOST_PWRFLT_EP_TRI 0x00000140
-#define USB_HOST_PWRFLT_EP_LOW 0x00000240
-#define USB_HOST_PWRFLT_EP_HIGH 0x00000340
-#define USB_HOST_PWREN_LOW 0x00000000
-#define USB_HOST_PWREN_HIGH 0x00000001
-#define USB_HOST_PWREN_VBLOW 0x00000002
-#define USB_HOST_PWREN_VBHIGH 0x00000003
-
-//*****************************************************************************
-//
-// The following are special values that can be passed to
-// USBHostEndpointConfig() as the ulNAKPollInterval parameter.
-//
-//*****************************************************************************
-#define MAX_NAK_LIMIT 31 // Maximum NAK interval
-#define DISABLE_NAK_LIMIT 0 // No NAK timeouts
-
-//*****************************************************************************
-//
-// This value specifies the maximum size of transfers on endpoint 0 as 64
-// bytes. This value is fixed in hardware as the FIFO size for endpoint 0.
-//
-//*****************************************************************************
-#define MAX_PACKET_SIZE_EP0 64
-
-//*****************************************************************************
-//
-// These values are used to indicate which endpoint to access.
-//
-//*****************************************************************************
-#define USB_EP_0 0x00000000 // Endpoint 0
-#define USB_EP_1 0x00000010 // Endpoint 1
-#define USB_EP_2 0x00000020 // Endpoint 2
-#define USB_EP_3 0x00000030 // Endpoint 3
-#define USB_EP_4 0x00000040 // Endpoint 4
-#define USB_EP_5 0x00000050 // Endpoint 5
-#define USB_EP_6 0x00000060 // Endpoint 6
-#define USB_EP_7 0x00000070 // Endpoint 7
-#define USB_EP_8 0x00000080 // Endpoint 8
-#define USB_EP_9 0x00000090 // Endpoint 9
-#define USB_EP_10 0x000000A0 // Endpoint 10
-#define USB_EP_11 0x000000B0 // Endpoint 11
-#define USB_EP_12 0x000000C0 // Endpoint 12
-#define USB_EP_13 0x000000D0 // Endpoint 13
-#define USB_EP_14 0x000000E0 // Endpoint 14
-#define USB_EP_15 0x000000F0 // Endpoint 15
-#define NUM_USB_EP 16 // Number of supported endpoints
-
-//*****************************************************************************
-//
-// These macros allow conversion between 0-based endpoint indices and the
-// USB_EP_x values required when calling various USB APIs.
-//
-//*****************************************************************************
-#define INDEX_TO_USB_EP(x) ((x) << 4)
-#define USB_EP_TO_INDEX(x) ((x) >> 4)
-
-//*****************************************************************************
-//
-// The following are values that can be passed to USBFIFOConfigSet() as the
-// ulFIFOSize parameter.
-//
-//*****************************************************************************
-#define USB_FIFO_SZ_8 0x00000000 // 8 byte FIFO
-#define USB_FIFO_SZ_16 0x00000001 // 16 byte FIFO
-#define USB_FIFO_SZ_32 0x00000002 // 32 byte FIFO
-#define USB_FIFO_SZ_64 0x00000003 // 64 byte FIFO
-#define USB_FIFO_SZ_128 0x00000004 // 128 byte FIFO
-#define USB_FIFO_SZ_256 0x00000005 // 256 byte FIFO
-#define USB_FIFO_SZ_512 0x00000006 // 512 byte FIFO
-#define USB_FIFO_SZ_1024 0x00000007 // 1024 byte FIFO
-#define USB_FIFO_SZ_2048 0x00000008 // 2048 byte FIFO
-#define USB_FIFO_SZ_4096 0x00000009 // 4096 byte FIFO
-#define USB_FIFO_SZ_8_DB 0x00000010 // 8 byte double buffered FIFO
- // (occupying 16 bytes)
-#define USB_FIFO_SZ_16_DB 0x00000011 // 16 byte double buffered FIFO
- // (occupying 32 bytes)
-#define USB_FIFO_SZ_32_DB 0x00000012 // 32 byte double buffered FIFO
- // (occupying 64 bytes)
-#define USB_FIFO_SZ_64_DB 0x00000013 // 64 byte double buffered FIFO
- // (occupying 128 bytes)
-#define USB_FIFO_SZ_128_DB 0x00000014 // 128 byte double buffered FIFO
- // (occupying 256 bytes)
-#define USB_FIFO_SZ_256_DB 0x00000015 // 256 byte double buffered FIFO
- // (occupying 512 bytes)
-#define USB_FIFO_SZ_512_DB 0x00000016 // 512 byte double buffered FIFO
- // (occupying 1024 bytes)
-#define USB_FIFO_SZ_1024_DB 0x00000017 // 1024 byte double buffered FIFO
- // (occupying 2048 bytes)
-#define USB_FIFO_SZ_2048_DB 0x00000018 // 2048 byte double buffered FIFO
- // (occupying 4096 bytes)
-
-//*****************************************************************************
-//
-// This macro allow conversion from a FIFO size label as defined above to
-// a number of bytes
-//
-//*****************************************************************************
-#define USB_FIFO_SIZE_DB_FLAG 0x00000010
-#define USB_FIFO_SZ_TO_BYTES(x) ((8 << ((x) & ~ USB_FIFO_SIZE_DB_FLAG)) * \
- (((x) & USB_FIFO_SIZE_DB_FLAG) ? 2 : 1))
-
-//*****************************************************************************
-//
-// The following are values that can be passed to USBEndpointDataSend() as the
-// ulTransType parameter.
-//
-//*****************************************************************************
-#define USB_TRANS_OUT 0x00000102 // Normal OUT transaction
-#define USB_TRANS_IN 0x00000102 // Normal IN transaction
-#define USB_TRANS_IN_LAST 0x0000010a // Final IN transaction (for
- // endpoint 0 in device mode)
-#define USB_TRANS_SETUP 0x0000110a // Setup transaction (for endpoint
- // 0)
-#define USB_TRANS_STATUS 0x00000142 // Status transaction (for endpoint
- // 0)
-
-//*****************************************************************************
-//
-// The following are values are returned by the USBModeGet function.
-//
-//*****************************************************************************
-#define USB_DUAL_MODE_HOST 0x00000001 // Dual mode controller is in Host
- // mode.
-#define USB_DUAL_MODE_DEVICE 0x00000081 // Dual mode controller is in
- // Device mode.
-#define USB_DUAL_MODE_NONE 0x00000080 // Dual mode controller mode is not
- // set.
-#define USB_OTG_MODE_ASIDE_HOST 0x0000001d // OTG controller on the A side of
- // the cable.
-#define USB_OTG_MODE_ASIDE_NPWR 0x00000001 // OTG controller on the A side of
- // the cable.
-#define USB_OTG_MODE_ASIDE_DEV 0x00000019 // OTG controller on the A side of
- // the cable.
-#define USB_OTG_MODE_BSIDE_HOST 0x0000009d // OTG controller on the B side of
- // the cable.
-#define USB_OTG_MODE_BSIDE_DEV 0x00000099 // OTG controller on the B side of
- // the cable.
-#define USB_OTG_MODE_BSIDE_NPWR 0x00000081 // OTG controller on the B side of
- // the cable.
-#define USB_OTG_MODE_NONE 0x00000080 // OTG controller mode is not set.
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern unsigned long USBDevAddrGet(unsigned long ulBase);
-extern void USBDevAddrSet(unsigned long ulBase, unsigned long ulAddress);
-extern void USBDevConnect(unsigned long ulBase);
-extern void USBDevDisconnect(unsigned long ulBase);
-extern void USBDevEndpointConfig(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulMaxPacketSize,
- unsigned long ulFlags);
-extern void USBDevEndpointConfigGet(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long *pulMaxPacketSize,
- unsigned long *pulFlags);
-extern void USBDevEndpointDataAck(unsigned long ulBase,
- unsigned long ulEndpoint,
- tBoolean bIsLastPacket);
-extern void USBDevEndpointStall(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern void USBDevEndpointStallClear(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern void USBDevEndpointStatusClear(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern unsigned long USBEndpointDataAvail(unsigned long ulBase,
- unsigned long ulEndpoint);
-extern void USBEndpointDMAEnable(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern void USBEndpointDMADisable(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern long USBEndpointDataGet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned char *pucData, unsigned long *pulSize);
-extern long USBEndpointDataPut(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned char *pucData, unsigned long ulSize);
-extern long USBEndpointDataSend(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulTransType);
-extern void USBEndpointDataToggleClear(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern unsigned long USBEndpointStatus(unsigned long ulBase,
- unsigned long ulEndpoint);
-extern unsigned long USBFIFOAddrGet(unsigned long ulBase,
- unsigned long ulEndpoint);
-extern void USBFIFOConfigGet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long *pulFIFOAddress,
- unsigned long *pulFIFOSize,
- unsigned long ulFlags);
-extern void USBFIFOConfigSet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFIFOAddress,
- unsigned long ulFIFOSize, unsigned long ulFlags);
-extern void USBFIFOFlush(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern unsigned long USBFrameNumberGet(unsigned long ulBase);
-extern unsigned long USBHostAddrGet(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern void USBHostAddrSet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulAddr, unsigned long ulFlags);
-extern void USBHostEndpointConfig(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulMaxPacketSize,
- unsigned long ulNAKPollInterval,
- unsigned long ulTargetEndpoint,
- unsigned long ulFlags);
-extern void USBHostEndpointDataAck(unsigned long ulBase,
- unsigned long ulEndpoint);
-extern void USBHostEndpointDataToggle(unsigned long ulBase,
- unsigned long ulEndpoint,
- tBoolean bDataToggle,
- unsigned long ulFlags);
-extern void USBHostEndpointStatusClear(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern unsigned long USBHostHubAddrGet(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulFlags);
-extern void USBHostHubAddrSet(unsigned long ulBase, unsigned long ulEndpoint,
- unsigned long ulAddr, unsigned long ulFlags);
-extern void USBHostPwrDisable(unsigned long ulBase);
-extern void USBHostPwrEnable(unsigned long ulBase);
-extern void USBHostPwrFaultConfig(unsigned long ulBase, unsigned long ulFlags);
-extern void USBHostPwrFaultDisable(unsigned long ulBase);
-extern void USBHostPwrFaultEnable(unsigned long ulBase);
-extern void USBHostRequestIN(unsigned long ulBase, unsigned long ulEndpoint);
-extern void USBHostRequestStatus(unsigned long ulBase);
-extern void USBHostReset(unsigned long ulBase, tBoolean bStart);
-extern void USBHostResume(unsigned long ulBase, tBoolean bStart);
-extern unsigned long USBHostSpeedGet(unsigned long ulBase);
-extern void USBHostSuspend(unsigned long ulBase);
-extern void USBIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void USBIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void USBIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
-extern unsigned long USBIntStatus(unsigned long ulBase);
-extern void USBIntUnregister(unsigned long ulBase);
-extern void USBOTGSessionRequest(unsigned long ulBase, tBoolean bStart);
-extern unsigned long USBModeGet(unsigned long ulBase);
-extern void USBEndpointDMAChannel(unsigned long ulBase,
- unsigned long ulEndpoint,
- unsigned long ulChannel);
-extern void USBHostMode(unsigned long ulBase);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __USB_H__
diff --git a/bsp/lm3s/driverlib/watchdog.c b/bsp/lm3s/driverlib/watchdog.c
deleted file mode 100644
index fdfd5e821d26a22406889518de9d1e10e813402f..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/watchdog.c
+++ /dev/null
@@ -1,567 +0,0 @@
-//*****************************************************************************
-//
-// watchdog.c - Driver for the Watchdog Timer Module.
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup watchdog_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "inc/hw_watchdog.h"
-#include "driverlib/debug.h"
-#include "driverlib/interrupt.h"
-#include "driverlib/watchdog.h"
-
-//*****************************************************************************
-//
-//! Determines if the watchdog timer is enabled.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! This will check to see if the watchdog timer is enabled.
-//!
-//! \return Returns \b true if the watchdog timer is enabled, and \b false
-//! if it is not.
-//
-//*****************************************************************************
-tBoolean
-WatchdogRunning(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // See if the watchdog timer module is enabled, and return.
- //
- return(HWREG(ulBase + WDT_O_CTL) & WDT_CTL_INTEN);
-}
-
-//*****************************************************************************
-//
-//! Enables the watchdog timer.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! This will enable the watchdog timer counter and interrupt.
-//!
-//! \note This function will have no effect if the watchdog timer has
-//! been locked.
-//!
-//! \sa WatchdogLock(), WatchdogUnlock()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Enable the watchdog timer module.
- //
- HWREG(ulBase + WDT_O_CTL) |= WDT_CTL_INTEN;
-}
-
-//*****************************************************************************
-//
-//! Enables the watchdog timer reset.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! Enables the capability of the watchdog timer to issue a reset to the
-//! processor upon a second timeout condition.
-//!
-//! \note This function will have no effect if the watchdog timer has
-//! been locked.
-//!
-//! \sa WatchdogLock(), WatchdogUnlock()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogResetEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Enable the watchdog reset.
- //
- HWREG(ulBase + WDT_O_CTL) |= WDT_CTL_RESEN;
-}
-
-//*****************************************************************************
-//
-//! Disables the watchdog timer reset.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! Disables the capability of the watchdog timer to issue a reset to the
-//! processor upon a second timeout condition.
-//!
-//! \note This function will have no effect if the watchdog timer has
-//! been locked.
-//!
-//! \sa WatchdogLock(), WatchdogUnlock()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogResetDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Disable the watchdog reset.
- //
- HWREG(ulBase + WDT_O_CTL) &= ~(WDT_CTL_RESEN);
-}
-
-//*****************************************************************************
-//
-//! Enables the watchdog timer lock mechanism.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! Locks out write access to the watchdog timer configuration registers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogLock(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Lock out watchdog register writes. Writing anything to the WDT_O_LOCK
- // register causes the lock to go into effect.
- //
- HWREG(ulBase + WDT_O_LOCK) = WDT_LOCK_LOCKED;
-}
-
-//*****************************************************************************
-//
-//! Disables the watchdog timer lock mechanism.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! Enables write access to the watchdog timer configuration registers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogUnlock(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Unlock watchdog register writes.
- //
- HWREG(ulBase + WDT_O_LOCK) = WDT_LOCK_UNLOCK;
-}
-
-//*****************************************************************************
-//
-//! Gets the state of the watchdog timer lock mechanism.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! Returns the lock state of the watchdog timer registers.
-//!
-//! \return Returns \b true if the watchdog timer registers are locked, and
-//! \b false if they are not locked.
-//
-//*****************************************************************************
-tBoolean
-WatchdogLockState(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Get the lock state.
- //
- return((HWREG(ulBase + WDT_O_LOCK) == WDT_LOCK_LOCKED) ? true : false);
-}
-
-//*****************************************************************************
-//
-//! Sets the watchdog timer reload value.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//! \param ulLoadVal is the load value for the watchdog timer.
-//!
-//! This function sets the value to load into the watchdog timer when the count
-//! reaches zero for the first time; if the watchdog timer is running when this
-//! function is called, then the value will be immediately loaded into the
-//! watchdog timer counter. If the \e ulLoadVal parameter is 0, then an
-//! interrupt is immediately generated.
-//!
-//! \note This function will have no effect if the watchdog timer has
-//! been locked.
-//!
-//! \sa WatchdogLock(), WatchdogUnlock(), WatchdogReloadGet()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Set the load register.
- //
- HWREG(ulBase + WDT_O_LOAD) = ulLoadVal;
-}
-
-//*****************************************************************************
-//
-//! Gets the watchdog timer reload value.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! This function gets the value that is loaded into the watchdog timer when
-//! the count reaches zero for the first time.
-//!
-//! \sa WatchdogReloadSet()
-//!
-//! \return None.
-//
-//*****************************************************************************
-unsigned long
-WatchdogReloadGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Get the load register.
- //
- return(HWREG(ulBase + WDT_O_LOAD));
-}
-
-//*****************************************************************************
-//
-//! Gets the current watchdog timer value.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! This function reads the current value of the watchdog timer.
-//!
-//! \return Returns the current value of the watchdog timer.
-//
-//*****************************************************************************
-unsigned long
-WatchdogValueGet(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Get the current watchdog timer register value.
- //
- return(HWREG(ulBase + WDT_O_VALUE));
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for watchdog timer interrupt.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! watchdog timer interrupt occurs.
-//!
-//! This function does the actual registering of the interrupt handler. This
-//! will enable the global interrupt in the interrupt controller; the watchdog
-//! timer interrupt must be enabled via WatchdogEnable(). It is the interrupt
-//! handler's responsibility to clear the interrupt source via
-//! WatchdogIntClear().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Register the interrupt handler.
- //
- IntRegister(INT_WATCHDOG, pfnHandler);
-
- //
- // Enable the watchdog timer interrupt.
- //
- IntEnable(INT_WATCHDOG);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the watchdog timer interrupt.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! This function does the actual unregistering of the interrupt handler. This
-//! function will clear the handler to be called when a watchdog timer
-//! interrupt occurs. This will also mask off the interrupt in the interrupt
-//! controller so that the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogIntUnregister(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Disable the interrupt.
- //
- IntDisable(INT_WATCHDOG);
-
- //
- // Unregister the interrupt handler.
- //
- IntUnregister(INT_WATCHDOG);
-}
-
-//*****************************************************************************
-//
-//! Enables the watchdog timer interrupt.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! Enables the watchdog timer interrupt.
-//!
-//! \note This function will have no effect if the watchdog timer has
-//! been locked.
-//!
-//! \sa WatchdogLock(), WatchdogUnlock(), WatchdogEnable()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogIntEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Enable the watchdog interrupt.
- //
- HWREG(ulBase + WDT_O_CTL) |= WDT_CTL_INTEN;
-}
-
-//*****************************************************************************
-//
-//! Gets the current watchdog timer interrupt status.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//! \param bMasked is \b false if the raw interrupt status is required and
-//! \b true if the masked interrupt status is required.
-//!
-//! This returns the interrupt status for the watchdog timer module. Either
-//! the raw interrupt status or the status of interrupt that is allowed to
-//! reflect to the processor can be returned.
-//!
-//! \return Returns the current interrupt status, where a 1 indicates that the
-//! watchdog interrupt is active, and a 0 indicates that it is not active.
-//
-//*****************************************************************************
-unsigned long
-WatchdogIntStatus(unsigned long ulBase, tBoolean bMasked)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Return either the interrupt status or the raw interrupt status as
- // requested.
- //
- if(bMasked)
- {
- return(HWREG(ulBase + WDT_O_MIS));
- }
- else
- {
- return(HWREG(ulBase + WDT_O_RIS));
- }
-}
-
-//*****************************************************************************
-//
-//! Clears the watchdog timer interrupt.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! The watchdog timer interrupt source is cleared, so that it no longer
-//! asserts.
-//!
-//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
-//! several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared. Failure to do so may result in the interrupt handler
-//! being immediately reentered (since NVIC still sees the interrupt source
-//! asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogIntClear(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Clear the interrupt source.
- //
- HWREG(ulBase + WDT_O_ICR) = WDT_INT_TIMEOUT;
-}
-
-//*****************************************************************************
-//
-//! Enables stalling of the watchdog timer during debug events.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! This function allows the watchdog timer to stop counting when the processor
-//! is stopped by the debugger. By doing so, the watchdog is prevented from
-//! expiring (typically almost immediately from a human time perspective) and
-//! resetting the system (if reset is enabled). The watchdog will instead
-//! expired after the appropriate number of processor cycles have been executed
-//! while debugging (or at the appropriate time after the processor has been
-//! restarted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogStallEnable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Enable timer stalling.
- //
- HWREG(ulBase + WDT_O_TEST) |= WDT_TEST_STALL;
-}
-
-//*****************************************************************************
-//
-//! Disables stalling of the watchdog timer during debug events.
-//!
-//! \param ulBase is the base address of the watchdog timer module.
-//!
-//! This function disables the debug mode stall of the watchdog timer. By
-//! doing so, the watchdog timer continues to count regardless of the processor
-//! debug state.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-WatchdogStallDisable(unsigned long ulBase)
-{
- //
- // Check the arguments.
- //
- ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE));
-
- //
- // Disable timer stalling.
- //
- HWREG(ulBase + WDT_O_TEST) &= ~(WDT_TEST_STALL);
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/bsp/lm3s/driverlib/watchdog.h b/bsp/lm3s/driverlib/watchdog.h
deleted file mode 100644
index 50fde76e6776fef098e6bff060c1b1c709463a9b..0000000000000000000000000000000000000000
--- a/bsp/lm3s/driverlib/watchdog.h
+++ /dev/null
@@ -1,74 +0,0 @@
-//*****************************************************************************
-//
-// watchdog.h - Prototypes for the Watchdog Timer API
-//
-// Copyright (c) 2005-2009 Luminary Micro, Inc. All rights reserved.
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws. All rights are reserved. You may not combine
-// this software with "viral" open-source software in order to form a larger
-// program. Any use in violation of the foregoing restrictions may subject
-// the user to criminal sanctions under applicable laws, as well as to civil
-// liability for the breach of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-// This is part of revision 4694 of the Stellaris Peripheral Driver Library.
-//
-//*****************************************************************************
-
-#ifndef __WATCHDOG_H__
-#define __WATCHDOG_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern tBoolean WatchdogRunning(unsigned long ulBase);
-extern void WatchdogEnable(unsigned long ulBase);
-extern void WatchdogResetEnable(unsigned long ulBase);
-extern void WatchdogResetDisable(unsigned long ulBase);
-extern void WatchdogLock(unsigned long ulBase);
-extern void WatchdogUnlock(unsigned long ulBase);
-extern tBoolean WatchdogLockState(unsigned long ulBase);
-extern void WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal);
-extern unsigned long WatchdogReloadGet(unsigned long ulBase);
-extern unsigned long WatchdogValueGet(unsigned long ulBase);
-extern void WatchdogIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
-extern void WatchdogIntUnregister(unsigned long ulBase);
-extern void WatchdogIntEnable(unsigned long ulBase);
-extern unsigned long WatchdogIntStatus(unsigned long ulBase, tBoolean bMasked);
-extern void WatchdogIntClear(unsigned long ulBase);
-extern void WatchdogStallEnable(unsigned long ulBase);
-extern void WatchdogStallDisable(unsigned long ulBase);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __WATCHDOG_H__