diff --git a/apps/hpmdriver/events.h b/apps/hpmdriver/events.h
index 79d64257f676b5595d7f13a68b97626e10e5bf7a..87f73409d1ef94645ba30ee575291485b11b76a0 100644
--- a/apps/hpmdriver/events.h
+++ b/apps/hpmdriver/events.h
@@ -1,6 +1,7 @@
 #ifndef __EVENTS_H__
 #define __EVENTS_H__
 
+#define noEvent 0
 #define Frontend_noEvent 0
 #define Frontend_frontendFlush 1
 #define Frontend_ifu_req 2
diff --git a/apps/hpmdriver/hpmdriver.c b/apps/hpmdriver/hpmdriver.c
index 7c930aa4a9038fbd7ecb4739e39d1a59e1345ba0..2e3234ec340c4019fd6a7052d00b8613fedeef00 100644
--- a/apps/hpmdriver/hpmdriver.c
+++ b/apps/hpmdriver/hpmdriver.c
@@ -12,7 +12,23 @@ int main() {
     printf("mcycle: %ld\n", csr_read(mcycle));
     printf("minstret: %ld\n", csr_read(minstret));
 
-#if 1
+    se_cc_single(3, MODE_M, Frontend_frontendFlush);
+    se_cc_single(11, MODE_M, Frontend_frontendFlush);
+
+    // === tmp workload ===
+    volatile uint64_t a = 0;
+    for(uint64_t i = 0; i < 100; i++) {
+        a += a + i;
+    }
+    printf("%lu\n",a);
+    // *** tmp workload ***
+
+    print_event(3);
+    print_counter(3);
+    print_event(11);
+    print_counter(11);
+
+#if 0
     uint64_t set_mode_M = (0x1UL << 63);
     // ===== frontend ==================================================
     csr_write(mhpmevent3, csr_read(mhpmevent3)|set_mode_M);
diff --git a/apps/hpmdriver/hpmdriver.h b/apps/hpmdriver/hpmdriver.h
index 1c79282040b99ce18baf0e0abfcf3aa29cf2d258..e9a54645a2e1517a81b6a2ebb69f301300ab8f58 100644
--- a/apps/hpmdriver/hpmdriver.h
+++ b/apps/hpmdriver/hpmdriver.h
@@ -6,34 +6,68 @@
 #include "events.h"
 
 #define MODE_OFFSET 59
-#define MODE_MASK 0x1FUL
-#define MODE_M 0x10UL
-#define MODE_H 0x08UL
-#define MODE_S 0x04UL
-#define MODE_U 0x02UL
-#define MODE_D 0x01UL
+#define MODE_MASK 0x1F
+#define MODE_M 0x10
+#define MODE_H 0x08
+#define MODE_S 0x04
+#define MODE_U 0x02
+#define MODE_D 0x01
 
 #define OPTYPE2_OFFSET 50
-#define OPTYPE2_MASK 0x1FUL
+#define OPTYPE2_MASK 0x1F
 #define OPTYPE1_OFFSET 45
-#define OPTYPE1_MASK 0x1FUL
+#define OPTYPE1_MASK 0x1F
 #define OPTYPE0_OFFSET 40
-#define OPTYPE0_MASK 0x1FUL
-#define OPTYPE_OR 0x0UL
-#define OPTYPE_AND 0x1UL
-#define OPTYPE_XOR 0x2UL
-#define OPTYPE_ADD 0x4UL
+#define OPTYPE0_MASK 0x1F
+#define OPTYPE_OR 0x0
+#define OPTYPE_AND 0x1
+#define OPTYPE_XOR 0x2
+#define OPTYPE_ADD 0x4
 
 #define EVENT3_OFFSET 30
-#define EVENT3_MASK 0x3FFUL
+#define EVENT3_MASK 0x3FF
 #define EVENT2_OFFSET 20
-#define EVENT2_MASK 0x3FFUL
+#define EVENT2_MASK 0x3FF
 #define EVENT1_OFFSET 10
-#define EVENT1_MASK 0x3FFUL
+#define EVENT1_MASK 0x3FF
 #define EVENT0_OFFSET 0
-#define EVENT0_MASK 0x3FFUL
+#define EVENT0_MASK 0x3FF
+
+#define SET(reg, field, value) (reg) = ((reg) & ~((uint64_t)(field##_MASK) << (field##_OFFSET))) | ((uint64_t)(value) << (field##_OFFSET));
+
+#define clear_event(id) csr_write(mhpmevent##id, 0x0UL)
+#define print_event(id) printf("mhpmevent%d: %lx\n", id, csr_read(mhpmevent##id))
+#define clear_counter(id) csr_write(mhpmcounter##id, 0x0UL)
+#define print_counter(id) printf("mhpmcounter%d: %lu\n", id, csr_read(mhpmcounter##id))
+
+#define set_event_quad(csr_id, mode, optype2, optype1, optype0, event3, event2, event1, event0) \
+    {   \
+        uint64_t value = csr_read(mhpmevent##csr_id); \
+        SET(value, MODE, mode); \
+        SET(value, OPTYPE2, optype2); \
+        SET(value, OPTYPE1, optype1); \
+        SET(value, OPTYPE0, optype0); \
+        SET(value, EVENT3, event3); \
+        SET(value, EVENT2, event2); \
+        SET(value, EVENT1, event1); \
+        SET(value, EVENT0, event0); \
+        csr_write(mhpmevent##csr_id, value); \
+    }
+
+#define set_event_double(csr_id, mode, optype0, event1, event0) \
+    set_event_quad(csr_id, mode, OPTYPE_OR, OPTYPE_OR, optype0, noEvent, noEvent, event1, event0)
+
+#define set_event_single(csr_id, mode, event)\
+    set_event_quad(csr_id, mode, OPTYPE_OR, OPTYPE_OR, OPTYPE_OR, noEvent, noEvent, noEvent, event)
+
+// set event and clear counter
+#define se_cc_quad(csr_id, mode, optype2, optype1, optype0, event3, event2, event1, event0) \
+    {set_event_quad(csr_id, mode, optype2, optype1, optype0, event3, event2, event1, event0);clear_counter(csr_id);}
+#define se_cc_double(csr_id, mode, optype0, event1, event0) \
+    {set_event_double(csr_id, mode, optype0, event1, event0);clear_counter(csr_id);}
+#define se_cc_single(csr_id, mode, event) \
+    {set_event_single(csr_id, mode, event);clear_counter(csr_id);}
 
-#define SET(reg, field, value) ((reg) = ((reg) & ~((field##_MASK) << (field##_OFFSET))) | ((value) << (field##_OFFSET)));