diff --git a/src/main/scala/xiangshan/cache/dcacheWrapper.scala b/src/main/scala/xiangshan/cache/dcacheWrapper.scala
index adc9c9de6d127300e6f9437e0dbeb28b9e52bd11..64837e41090bfc0300d2abd3e4baf427a9659eac 100644
--- a/src/main/scala/xiangshan/cache/dcacheWrapper.scala
+++ b/src/main/scala/xiangshan/cache/dcacheWrapper.scala
@@ -140,10 +140,10 @@ class DCache extends DCacheModule {
   }
 
   //----------------------------------------
-  // meta array
+  // data array
   val DataWritePortCount = 2
-  val MissQueueDataWritePort = 0
-  val StorePipeDataWritePort = 1
+  val StorePipeDataWritePort = 0
+  val MissQueueDataWritePort = 1
 
   val dataWriteArb = Module(new Arbiter(new L1DataWriteReq, DataWritePortCount))