diff --git a/src/main/scala/xiangshan/frontend/RAS.scala b/src/main/scala/xiangshan/frontend/RAS.scala
index 98b12dda5d41a4fd80ed8c31cb65d2f9972a913c..c3af9366e20d7446e6463b11119b6d947a56085b 100644
--- a/src/main/scala/xiangshan/frontend/RAS.scala
+++ b/src/main/scala/xiangshan/frontend/RAS.scala
@@ -74,8 +74,8 @@ class RAS(implicit p: Parameters) extends BasePredictor {
     
     val wen = WireInit(false.B)
     val write_bypass_entry = Reg(new RASEntry())
-    val write_bypass_ptr = Reg(UInt(log2Up(rasSize).W))
-    val write_bypass_valid = Reg(Bool())
+    val write_bypass_ptr = RegInit(0.U(log2Up(rasSize).W))
+    val write_bypass_valid = RegInit(false.B)
     when (wen) {
       write_bypass_valid := true.B
     }.elsewhen (write_bypass_valid) {