From eae78b101013b890de9c882ecd88c1f012c0df50 Mon Sep 17 00:00:00 2001 From: Yinan Xu Date: Tue, 30 Mar 2021 13:24:08 +0800 Subject: [PATCH] scripts,vlsi_mem_gen: never split srams (#728) --- scripts/vlsi_mem_gen | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/scripts/vlsi_mem_gen b/scripts/vlsi_mem_gen index 0c815c687..6702e8838 100755 --- a/scripts/vlsi_mem_gen +++ b/scripts/vlsi_mem_gen @@ -328,7 +328,7 @@ class SRAM_TSMC28(SRAM): def __split(self): (name, width, depth, mask_gran, mask_seg, ports) = self.conf - if ports == ["mrw"] and mask_gran >= 32: + '''if ports == ["mrw"] and mask_gran >= 32: new_conf = (name + "_sub", str(depth), str(mask_gran), "rw") line_field = ("name", "depth", "width", "ports") new_line = " ".join(map(lambda x: " ".join(x), zip(line_field, new_conf))) @@ -336,7 +336,7 @@ class SRAM_TSMC28(SRAM): self.sub_srams.append(new_sram) reshaper = Spliter(self.conf, new_sram.conf) reshaper.generate(self.mem) - return True + return True''' return False def __reshape(self): -- GitLab