From 8fd27dfa00075af4e067b60be7838447c27f4a41 Mon Sep 17 00:00:00 2001 From: William Wang Date: Tue, 27 Oct 2020 16:21:16 +0800 Subject: [PATCH] [WIP]: LoadUnit: flush s1 if needFlush --- src/main/scala/xiangshan/mem/pipeline/LoadUnit.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/xiangshan/mem/pipeline/LoadUnit.scala b/src/main/scala/xiangshan/mem/pipeline/LoadUnit.scala index 79666b4cf..b075c2af7 100644 --- a/src/main/scala/xiangshan/mem/pipeline/LoadUnit.scala +++ b/src/main/scala/xiangshan/mem/pipeline/LoadUnit.scala @@ -236,7 +236,7 @@ class LoadUnit extends XSModule { load_s0.io.dcacheReq <> io.dcache.req load_s0.io.tlbFeedback <> io.tlbFeedback - PipelineConnect(load_s0.io.out, load_s1.io.in, load_s1.io.out.fire(), false.B) + PipelineConnect(load_s0.io.out, load_s1.io.in, load_s1.io.out.fire() || load_s1.io.out.bits.uop.needFlush(io.redirect), false.B) io.dcache.s1_paddr := load_s1.io.out.bits.paddr load_s1.io.redirect <> io.redirect -- GitLab