提交 d84f5e1a 编写于 作者: P Parallels

Modify some details for compatibility

上级 f25d435d
#ifndef __COMMON_H__ #ifndef __COMMON_H__
#define __COMMON_H__ #define __COMMON_H__
#define DEBUG //#define DEBUG
//#define DIFF_TEST //#define DIFF_TEST
#define ISA64 #define ISA64
......
...@@ -22,7 +22,7 @@ extern void (*ref_difftest_exec)(uint64_t n); ...@@ -22,7 +22,7 @@ extern void (*ref_difftest_exec)(uint64_t n);
static inline bool difftest_check_reg(const char *name, vaddr_t pc, rtlreg_t ref, rtlreg_t dut) { static inline bool difftest_check_reg(const char *name, vaddr_t pc, rtlreg_t ref, rtlreg_t dut) {
if (ref != dut) { if (ref != dut) {
#ifdef ISA64 #ifdef ISA64
Log("%s is different after executing instruction at pc = 0x%16lx, right = 0x%16lx, wrong = 0x%16lx", Log("%s is different after executing instruction at pc = 0x%016lx, right = 0x%016lx, wrong = 0x%016lx",
name, pc, ref, dut); name, pc, ref, dut);
#else #else
Log("%s is different after executing instruction at pc = 0x%08x, right = 0x%08x, wrong = 0x%08x", Log("%s is different after executing instruction at pc = 0x%08x, right = 0x%08x, wrong = 0x%08x",
......
...@@ -13,7 +13,7 @@ bool interpret_relop(uint32_t relop, const rtlreg_t src1, const rtlreg_t src2); ...@@ -13,7 +13,7 @@ bool interpret_relop(uint32_t relop, const rtlreg_t src1, const rtlreg_t src2);
/* RTL basic instructions */ /* RTL basic instructions */
static inline void interpret_rtl_li(rtlreg_t* dest, uint64_t imm) { static inline void interpret_rtl_li(rtlreg_t* dest, rtlreg_t imm) {
*dest = imm; *dest = imm;
} }
...@@ -158,17 +158,24 @@ static inline void rtl_not(rtlreg_t *dest, const rtlreg_t* src1) { ...@@ -158,17 +158,24 @@ static inline void rtl_not(rtlreg_t *dest, const rtlreg_t* src1) {
static inline void rtl_sext(rtlreg_t* dest, const rtlreg_t* src1, int width) { static inline void rtl_sext(rtlreg_t* dest, const rtlreg_t* src1, int width) {
// dest <- signext(src1[(width * 8 - 1) .. 0]) // dest <- signext(src1[(width * 8 - 1) .. 0])
// TODO(); // TODO();
#ifdef ISA64
if (width == 8) { if (width == 8) {
rtl_mv(dest, src1); rtl_mv(dest, src1);
} else { } else {
assert(width == 1 || width == 2 || width == 4); assert(width == 1 || width == 2 || width == 4);
rtl_shli(dest, src1, (8 - width) * 8); rtl_shli(dest, src1, (8 - width) * 8);
#ifdef ISA64
rtl_sar64i(dest, dest, (8 - width) * 8); rtl_sar64i(dest, dest, (8 - width) * 8);
}
#else #else
rtl_sari(dest, dest, (8 - width) * 8); if (width == 4) {
#endif rtl_mv(dest, src1);
} else {
assert(width == 1 || width == 2);
rtl_shli(dest, src1, (4 - width) * 8);
rtl_sari(dest, dest, (4 - width) * 8);
} }
#endif
} }
static inline void rtl_setrelopi(uint32_t relop, rtlreg_t *dest, static inline void rtl_setrelopi(uint32_t relop, rtlreg_t *dest,
......
...@@ -30,7 +30,7 @@ for file in $files; do ...@@ -30,7 +30,7 @@ for file in $files; do
if (grep 'nemu: .*HIT GOOD TRAP' $logfile > /dev/null) then if (grep 'nemu: .*HIT GOOD TRAP' $logfile > /dev/null) then
echo -e "\033[1;32mPASS!\033[0m" echo -e "\033[1;32mPASS!\033[0m"
#rm $logfile rm $logfile
else else
echo -e "\033[1;31mFAIL!\033[0m see $logfile for more information" echo -e "\033[1;31mFAIL!\033[0m see $logfile for more information"
if (test -e $ori_log) then if (test -e $ori_log) then
......
...@@ -5,9 +5,9 @@ void display_inv_msg(vaddr_t pc) { ...@@ -5,9 +5,9 @@ void display_inv_msg(vaddr_t pc) {
#ifdef ISA64 #ifdef ISA64
printf("There are two cases which will trigger this unexpected exception:\n" printf("There are two cases which will trigger this unexpected exception:\n"
"1. The instruction at PC = 0x%16lx is not implemented.\n" "1. The instruction at PC = 0x%016lx is not implemented.\n"
"2. Something is implemented incorrectly.\n", pc); "2. Something is implemented incorrectly.\n", pc);
printf("Find this PC(0x%16lx) in the disassembling result to distinguish which case it is.\n\n", pc); printf("Find this PC(0x%016lx) in the disassembling result to distinguish which case it is.\n\n", pc);
#else #else
printf("There are two cases which will trigger this unexpected exception:\n" printf("There are two cases which will trigger this unexpected exception:\n"
"1. The instruction at PC = 0x%08x is not implemented.\n" "1. The instruction at PC = 0x%08x is not implemented.\n"
......
...@@ -19,7 +19,7 @@ uint8_t* new_space(int size) { ...@@ -19,7 +19,7 @@ uint8_t* new_space(int size) {
static inline void check_bound(IOMap *map, paddr_t addr) { static inline void check_bound(IOMap *map, paddr_t addr) {
#ifdef ISA64 #ifdef ISA64
Assert(map != NULL && addr <= map->high && addr >= map->low, Assert(map != NULL && addr <= map->high && addr >= map->low,
"address (0x%08x) is out of bound {%s} [0x%08x, 0x%08x] at pc = 0x%16lx", "address (0x%08x) is out of bound {%s} [0x%08x, 0x%08x] at pc = 0x%016lx",
addr, (map ? map->name : "???"), (map ? map->low : 0), (map ? map->high : 0), cpu.pc); addr, (map ? map->name : "???"), (map ? map->low : 0), (map ? map->high : 0), cpu.pc);
#else #else
Assert(map != NULL && addr <= map->high && addr >= map->low, Assert(map != NULL && addr <= map->high && addr >= map->low,
......
#include "cpu/decode.h" #include "cpu/decode.h"
#include "rtl/rtl.h" #include "rtl/rtl.h"
// decode operand helper (i & r) // decode operand helper
#define make_DopHelper(name) void concat(decode_op_, name) (Operand *op, uint32_t val, bool load_val) #define make_DopHelper(name) void concat(decode_op_, name) (Operand *op, uint32_t val, bool load_val)
static inline make_DopHelper(i) { static inline make_DopHelper(i) {
...@@ -16,13 +16,12 @@ static inline make_DopHelper(r) { ...@@ -16,13 +16,12 @@ static inline make_DopHelper(r) {
op->type = OP_TYPE_REG; op->type = OP_TYPE_REG;
op->reg = val; op->reg = val;
if (load_val) { if (load_val) {
rtl_lr(&op->val, op->reg, 4); // here reg is index of reg, width is ignored rtl_lr(&op->val, op->reg, 4);
} }
print_Dop(op->str, OP_STR_SIZE, "%s", reg_name(op->reg, 4)); print_Dop(op->str, OP_STR_SIZE, "%s", reg_name(op->reg, 4));
} }
// decode helper (I, R, U, J, B, ld, st, csr)
make_DHelper(I) { make_DHelper(I) {
decode_op_r(id_src, decinfo.isa.instr.rs1, true); decode_op_r(id_src, decinfo.isa.instr.rs1, true);
decode_op_i(id_src2, decinfo.isa.instr.simm11_0, true); decode_op_i(id_src2, decinfo.isa.instr.simm11_0, true);
......
...@@ -9,7 +9,7 @@ make_EHelper(inv) { ...@@ -9,7 +9,7 @@ make_EHelper(inv) {
instr[0] = instr_fetch(pc, 4); instr[0] = instr_fetch(pc, 4);
instr[1] = instr_fetch(pc, 4); instr[1] = instr_fetch(pc, 4);
printf("invalid opcode(PC = 0x%16lx): %08x %08x ...\n\n", printf("invalid opcode(PC = 0x%016lx): %08x %08x ...\n\n",
cpu.pc, instr[0], instr[1]); cpu.pc, instr[0], instr[1]);
display_inv_msg(cpu.pc); display_inv_msg(cpu.pc);
......
...@@ -10,12 +10,12 @@ const char *regsl[] = { ...@@ -10,12 +10,12 @@ const char *regsl[] = {
void isa_reg_display() { void isa_reg_display() {
int i; int i;
for (i = 0; i < 32; i ++) { for (i = 0; i < 32; i ++) {
printf("%s: 0x%16lx ", regsl[i], cpu.gpr[i]._64); printf("%s: 0x%016lx ", regsl[i], cpu.gpr[i]._64);
if (i % 4 == 3) { if (i % 4 == 3) {
printf("\n"); printf("\n");
} }
} }
printf("pc: 0x%16lx\n", cpu.pc); printf("pc: 0x%016lx\n", cpu.pc);
} }
rtlreg_t isa_reg_str2val(const char *s, bool *success) { rtlreg_t isa_reg_str2val(const char *s, bool *success) {
......
...@@ -62,7 +62,7 @@ void cpu_exec(uint64_t n) { ...@@ -62,7 +62,7 @@ void cpu_exec(uint64_t n) {
WP *wp = scan_watchpoint(); WP *wp = scan_watchpoint();
if(wp != NULL) { if(wp != NULL) {
#ifdef ISA64 #ifdef ISA64
printf("\n\nHint watchpoint %d at address 0x%16lx, expr = %s\n", wp->NO, ori_pc, wp->expr); printf("\n\nHint watchpoint %d at address 0x%016lx, expr = %s\n", wp->NO, ori_pc, wp->expr);
#else #else
printf("\n\nHint watchpoint %d at address 0x%08x, expr = %s\n", wp->NO, ori_pc, wp->expr); printf("\n\nHint watchpoint %d at address 0x%08x, expr = %s\n", wp->NO, ori_pc, wp->expr);
#endif #endif
...@@ -88,7 +88,7 @@ void cpu_exec(uint64_t n) { ...@@ -88,7 +88,7 @@ void cpu_exec(uint64_t n) {
case NEMU_END: case NEMU_ABORT: case NEMU_END: case NEMU_ABORT:
#ifdef ISA64 #ifdef ISA64
_Log("nemu: %s\33[0m at pc = 0x%16lx\n\n", _Log("nemu: %s\33[0m at pc = 0x%016lx\n\n",
(nemu_state.state == NEMU_ABORT ? "\33[1;31mABORT" : (nemu_state.state == NEMU_ABORT ? "\33[1;31mABORT" :
(nemu_state.halt_ret == 0 ? "\33[1;32mHIT GOOD TRAP" : "\33[1;31mHIT BAD TRAP")), (nemu_state.halt_ret == 0 ? "\33[1;32mHIT GOOD TRAP" : "\33[1;31mHIT BAD TRAP")),
nemu_state.halt_pc); nemu_state.halt_pc);
......
...@@ -175,7 +175,7 @@ static int find_dominated_op(int s, int e, bool *success) { ...@@ -175,7 +175,7 @@ static int find_dominated_op(int s, int e, bool *success) {
uint32_t isa_reg_str2val(const char*, bool *); uint32_t isa_reg_str2val(const char*, bool *);
static uint64_t eval(int s, int e, bool *success) { static rtlreg_t eval(int s, int e, bool *success) {
if (s > e) { if (s > e) {
// bad expression // bad expression
*success = false; *success = false;
...@@ -183,7 +183,7 @@ static uint64_t eval(int s, int e, bool *success) { ...@@ -183,7 +183,7 @@ static uint64_t eval(int s, int e, bool *success) {
} }
else if (s == e) { else if (s == e) {
// single token // single token
uint64_t val; rtlreg_t val;
switch (tokens[s].type) { switch (tokens[s].type) {
case TK_REG: val = isa_reg_str2val(tokens[s].str + 1, success); // +1 to skip '$' case TK_REG: val = isa_reg_str2val(tokens[s].str + 1, success); // +1 to skip '$'
if (!*success) { return 0; } if (!*success) { return 0; }
...@@ -205,7 +205,7 @@ static uint64_t eval(int s, int e, bool *success) { ...@@ -205,7 +205,7 @@ static uint64_t eval(int s, int e, bool *success) {
int op_type = tokens[dominated_op].type; int op_type = tokens[dominated_op].type;
if (op_type == '!' || op_type == TK_NEG || op_type == TK_REF) { if (op_type == '!' || op_type == TK_NEG || op_type == TK_REF) {
uint64_t val = eval(dominated_op + 1, e, success); rtlreg_t val = eval(dominated_op + 1, e, success);
if (!*success) { return 0; } if (!*success) { return 0; }
switch (op_type) { switch (op_type) {
...@@ -216,9 +216,9 @@ static uint64_t eval(int s, int e, bool *success) { ...@@ -216,9 +216,9 @@ static uint64_t eval(int s, int e, bool *success) {
} }
} }
uint64_t val1 = eval(s, dominated_op - 1, success); rtlreg_t val1 = eval(s, dominated_op - 1, success);
if (!*success) { return 0; } if (!*success) { return 0; }
uint64_t val2 = eval(dominated_op + 1, e, success); rtlreg_t val2 = eval(dominated_op + 1, e, success);
if (!*success) { return 0; } if (!*success) { return 0; }
switch (op_type) { switch (op_type) {
...@@ -236,7 +236,7 @@ static uint64_t eval(int s, int e, bool *success) { ...@@ -236,7 +236,7 @@ static uint64_t eval(int s, int e, bool *success) {
} }
} }
uint64_t expr(char *e, bool *success) { rtlreg_t expr(char *e, bool *success) {
if (!make_token(e)) { if (!make_token(e)) {
*success = false; *success = false;
return 0; return 0;
......
...@@ -23,10 +23,10 @@ void strcatf(char *buf, const char *fmt, ...) { ...@@ -23,10 +23,10 @@ void strcatf(char *buf, const char *fmt, ...) {
void asm_print(vaddr_t ori_pc, int instr_len, bool print_flag) { void asm_print(vaddr_t ori_pc, int instr_len, bool print_flag) {
#ifdef ISA64 #ifdef ISA64
snprintf(tempbuf, sizeof(tempbuf), "%16lx: %s%*.s%s", ori_pc, log_bytebuf, snprintf(tempbuf, sizeof(tempbuf), "%016lx: %s%*.s%s", ori_pc, log_bytebuf,
50 - (12 + 3 * instr_len), "", log_asmbuf); 50 - (12 + 3 * instr_len), "", log_asmbuf);
#else #else
snprintf(tempbuf, sizeof(tempbuf), "%08x: %s%*.s%s", ori_pc, log_bytebuf, snprintf(tempbuf, sizeof(tempbuf), "%8x: %s%*.s%s", ori_pc, log_bytebuf,
50 - (12 + 3 * instr_len), "", log_asmbuf); 50 - (12 + 3 * instr_len), "", log_asmbuf);
#endif #endif
log_write("%s\n", tempbuf); log_write("%s\n", tempbuf);
......
...@@ -93,7 +93,7 @@ static int cmd_p(char *args) { ...@@ -93,7 +93,7 @@ static int cmd_p(char *args) {
if(success) { printf("0x%lx\n", r); } if(success) { printf("0x%lx\n", r); }
#else #else
uint32_t r = expr(args, &success); uint32_t r = expr(args, &success);
if(success) { printf("0x%x\n", r); } if(success) { printf("%d\n", r); }
#endif #endif
else { printf("Bad expression\n"); } else { printf("Bad expression\n"); }
} }
...@@ -128,7 +128,7 @@ static int cmd_x(char *args) { ...@@ -128,7 +128,7 @@ static int cmd_x(char *args) {
for (i = 0; i < n; i ++) { for (i = 0; i < n; i ++) {
if (i % 4 == 0) { if (i % 4 == 0) {
#ifdef ISA64 #ifdef ISA64
printf("0x%16lx: ", addr); printf("0x%016lx: ", addr);
#else #else
printf("0x%08x: ", addr); printf("0x%08x: ", addr);
#endif #endif
......
...@@ -68,6 +68,7 @@ void difftest_init(void) { ...@@ -68,6 +68,7 @@ void difftest_init(void) {
printf("Connect to QEMU successfully\n"); printf("Connect to QEMU successfully\n");
atexit(gdb_exit); atexit(gdb_exit);
init_isa(); init_isa();
} }
} }
...@@ -90,7 +90,6 @@ bool gdb_setregs(union isa_gdb_regs *r) { ...@@ -90,7 +90,6 @@ bool gdb_setregs(union isa_gdb_regs *r) {
} }
bool gdb_si(void) { bool gdb_si(void) {
char buf[] = "vCont;s:1"; char buf[] = "vCont;s:1";
gdb_send(conn, (const uint8_t *)buf, strlen(buf)); gdb_send(conn, (const uint8_t *)buf, strlen(buf));
size_t size; size_t size;
......
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